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authorDavid Weinehall <david.weinehall@linux.intel.com>2016-08-22 06:59:31 -0400
committerChris Wilson <chris@chris-wilson.co.uk>2016-08-22 07:19:52 -0400
commit36cdd0138b7f51f204df871c548b65ea2d59522d (patch)
tree1b8211da7cc01d40310dc3fecb5832d3c72d11c0
parent52a05c302bcfe571aa4896118e3d22feb51ab1c7 (diff)
drm/i915: debugfs spring cleaning
Just like with sysfs, we do some major overhaul. Pass dev_priv instead of dev to all feature macros (IS_, HAS_, INTEL_, etc.). This has the side effect that a bunch of functions now get dev_priv passed instead of dev. All calls to INTEL_INFO()->gen have been replaced with INTEL_GEN(). We want access to to_i915(node->minor->dev) in a lot of places, so add the node_to_i915() helper to accommodate for this. Finally, we have quite a few cases where we get a void * pointer, and need to cast it to drm_device *, only to run to_i915() on it. Add cast_to_i915() to do this. v2: Don't introduce extra dev (Chris) v3: Make pipe_crc_info have a pointer to drm_i915_private instead of drm_device. This saves a bit of space, since we never use drm_device anywhere in these functions. Also some minor fixup that I missed in the previous version. v4: Changed the code a bit so that dev_priv is passed directly to various functions, thus removing the need for the cast_to_i915() helper. Also did some additional cleanup. v5: Additional cleanup of newly introduced changes. v6: Rebase again because of conflict. Signed-off-by: David Weinehall <david.weinehall@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20160822105931.pcbe2lpsgzckzboa@boom Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat
-rw-r--r--drivers/gpu/drm/i915/i915_debugfs.c796
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c2
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h2
3 files changed, 358 insertions, 442 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index c82afb113f0a..3054bd62c5fd 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -40,6 +40,11 @@
40#include <drm/i915_drm.h> 40#include <drm/i915_drm.h>
41#include "i915_drv.h" 41#include "i915_drv.h"
42 42
43static inline struct drm_i915_private *node_to_i915(struct drm_info_node *node)
44{
45 return to_i915(node->minor->dev);
46}
47
43/* As the drm_debugfs_init() routines are called before dev->dev_private is 48/* As the drm_debugfs_init() routines are called before dev->dev_private is
44 * allocated we need to hook into the minor for release. */ 49 * allocated we need to hook into the minor for release. */
45static int 50static int
@@ -57,7 +62,7 @@ drm_add_fake_info_node(struct drm_minor *minor,
57 62
58 node->minor = minor; 63 node->minor = minor;
59 node->dent = ent; 64 node->dent = ent;
60 node->info_ent = (void *) key; 65 node->info_ent = (void *)key;
61 66
62 mutex_lock(&minor->debugfs_lock); 67 mutex_lock(&minor->debugfs_lock);
63 list_add(&node->list, &minor->debugfs_list); 68 list_add(&node->list, &minor->debugfs_list);
@@ -68,12 +73,11 @@ drm_add_fake_info_node(struct drm_minor *minor,
68 73
69static int i915_capabilities(struct seq_file *m, void *data) 74static int i915_capabilities(struct seq_file *m, void *data)
70{ 75{
71 struct drm_info_node *node = m->private; 76 struct drm_i915_private *dev_priv = node_to_i915(m->private);
72 struct drm_device *dev = node->minor->dev; 77 const struct intel_device_info *info = INTEL_INFO(dev_priv);
73 const struct intel_device_info *info = INTEL_INFO(dev);
74 78
75 seq_printf(m, "gen: %d\n", info->gen); 79 seq_printf(m, "gen: %d\n", INTEL_GEN(dev_priv));
76 seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev)); 80 seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev_priv));
77#define PRINT_FLAG(x) seq_printf(m, #x ": %s\n", yesno(info->x)) 81#define PRINT_FLAG(x) seq_printf(m, #x ": %s\n", yesno(info->x))
78#define SEP_SEMICOLON ; 82#define SEP_SEMICOLON ;
79 DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG, SEP_SEMICOLON); 83 DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG, SEP_SEMICOLON);
@@ -155,7 +159,7 @@ describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
155 seq_printf(m, "] %x %s%s%s", 159 seq_printf(m, "] %x %s%s%s",
156 i915_gem_active_get_seqno(&obj->last_write, 160 i915_gem_active_get_seqno(&obj->last_write,
157 &obj->base.dev->struct_mutex), 161 &obj->base.dev->struct_mutex),
158 i915_cache_level_str(to_i915(obj->base.dev), obj->cache_level), 162 i915_cache_level_str(dev_priv, obj->cache_level),
159 obj->dirty ? " dirty" : "", 163 obj->dirty ? " dirty" : "",
160 obj->madv == I915_MADV_DONTNEED ? " purgeable" : ""); 164 obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
161 if (obj->base.name) 165 if (obj->base.name)
@@ -195,7 +199,7 @@ describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
195 } 199 }
196 200
197 engine = i915_gem_active_get_engine(&obj->last_write, 201 engine = i915_gem_active_get_engine(&obj->last_write,
198 &obj->base.dev->struct_mutex); 202 &dev_priv->drm.struct_mutex);
199 if (engine) 203 if (engine)
200 seq_printf(m, " (%s)", engine->name); 204 seq_printf(m, " (%s)", engine->name);
201 205
@@ -221,9 +225,8 @@ static int obj_rank_by_stolen(void *priv,
221 225
222static int i915_gem_stolen_list_info(struct seq_file *m, void *data) 226static int i915_gem_stolen_list_info(struct seq_file *m, void *data)
223{ 227{
224 struct drm_info_node *node = m->private; 228 struct drm_i915_private *dev_priv = node_to_i915(m->private);
225 struct drm_device *dev = node->minor->dev; 229 struct drm_device *dev = &dev_priv->drm;
226 struct drm_i915_private *dev_priv = to_i915(dev);
227 struct drm_i915_gem_object *obj; 230 struct drm_i915_gem_object *obj;
228 u64 total_obj_size, total_gtt_size; 231 u64 total_obj_size, total_gtt_size;
229 LIST_HEAD(stolen); 232 LIST_HEAD(stolen);
@@ -365,29 +368,29 @@ static int per_file_ctx_stats(int id, void *ptr, void *data)
365static void print_context_stats(struct seq_file *m, 368static void print_context_stats(struct seq_file *m,
366 struct drm_i915_private *dev_priv) 369 struct drm_i915_private *dev_priv)
367{ 370{
371 struct drm_device *dev = &dev_priv->drm;
368 struct file_stats stats; 372 struct file_stats stats;
369 struct drm_file *file; 373 struct drm_file *file;
370 374
371 memset(&stats, 0, sizeof(stats)); 375 memset(&stats, 0, sizeof(stats));
372 376
373 mutex_lock(&dev_priv->drm.struct_mutex); 377 mutex_lock(&dev->struct_mutex);
374 if (dev_priv->kernel_context) 378 if (dev_priv->kernel_context)
375 per_file_ctx_stats(0, dev_priv->kernel_context, &stats); 379 per_file_ctx_stats(0, dev_priv->kernel_context, &stats);
376 380
377 list_for_each_entry(file, &dev_priv->drm.filelist, lhead) { 381 list_for_each_entry(file, &dev->filelist, lhead) {
378 struct drm_i915_file_private *fpriv = file->driver_priv; 382 struct drm_i915_file_private *fpriv = file->driver_priv;
379 idr_for_each(&fpriv->context_idr, per_file_ctx_stats, &stats); 383 idr_for_each(&fpriv->context_idr, per_file_ctx_stats, &stats);
380 } 384 }
381 mutex_unlock(&dev_priv->drm.struct_mutex); 385 mutex_unlock(&dev->struct_mutex);
382 386
383 print_file_stats(m, "[k]contexts", stats); 387 print_file_stats(m, "[k]contexts", stats);
384} 388}
385 389
386static int i915_gem_object_info(struct seq_file *m, void* data) 390static int i915_gem_object_info(struct seq_file *m, void *data)
387{ 391{
388 struct drm_info_node *node = m->private; 392 struct drm_i915_private *dev_priv = node_to_i915(m->private);
389 struct drm_device *dev = node->minor->dev; 393 struct drm_device *dev = &dev_priv->drm;
390 struct drm_i915_private *dev_priv = to_i915(dev);
391 struct i915_ggtt *ggtt = &dev_priv->ggtt; 394 struct i915_ggtt *ggtt = &dev_priv->ggtt;
392 u32 count, mapped_count, purgeable_count, dpy_count; 395 u32 count, mapped_count, purgeable_count, dpy_count;
393 u64 size, mapped_size, purgeable_size, dpy_size; 396 u64 size, mapped_size, purgeable_size, dpy_size;
@@ -497,8 +500,8 @@ static int i915_gem_object_info(struct seq_file *m, void* data)
497static int i915_gem_gtt_info(struct seq_file *m, void *data) 500static int i915_gem_gtt_info(struct seq_file *m, void *data)
498{ 501{
499 struct drm_info_node *node = m->private; 502 struct drm_info_node *node = m->private;
500 struct drm_device *dev = node->minor->dev; 503 struct drm_i915_private *dev_priv = node_to_i915(node);
501 struct drm_i915_private *dev_priv = to_i915(dev); 504 struct drm_device *dev = &dev_priv->drm;
502 bool show_pin_display_only = !!node->info_ent->data; 505 bool show_pin_display_only = !!node->info_ent->data;
503 struct drm_i915_gem_object *obj; 506 struct drm_i915_gem_object *obj;
504 u64 total_obj_size, total_gtt_size; 507 u64 total_obj_size, total_gtt_size;
@@ -531,9 +534,8 @@ static int i915_gem_gtt_info(struct seq_file *m, void *data)
531 534
532static int i915_gem_pageflip_info(struct seq_file *m, void *data) 535static int i915_gem_pageflip_info(struct seq_file *m, void *data)
533{ 536{
534 struct drm_info_node *node = m->private; 537 struct drm_i915_private *dev_priv = node_to_i915(m->private);
535 struct drm_device *dev = node->minor->dev; 538 struct drm_device *dev = &dev_priv->drm;
536 struct drm_i915_private *dev_priv = to_i915(dev);
537 struct intel_crtc *crtc; 539 struct intel_crtc *crtc;
538 int ret; 540 int ret;
539 541
@@ -580,7 +582,7 @@ static int i915_gem_pageflip_info(struct seq_file *m, void *data)
580 intel_crtc_get_vblank_counter(crtc)); 582 intel_crtc_get_vblank_counter(crtc));
581 seq_printf(m, "%d prepares\n", atomic_read(&work->pending)); 583 seq_printf(m, "%d prepares\n", atomic_read(&work->pending));
582 584
583 if (INTEL_INFO(dev)->gen >= 4) 585 if (INTEL_GEN(dev_priv) >= 4)
584 addr = I915_HI_DISPBASE(I915_READ(DSPSURF(crtc->plane))); 586 addr = I915_HI_DISPBASE(I915_READ(DSPSURF(crtc->plane)));
585 else 587 else
586 addr = I915_READ(DSPADDR(crtc->plane)); 588 addr = I915_READ(DSPADDR(crtc->plane));
@@ -601,9 +603,8 @@ static int i915_gem_pageflip_info(struct seq_file *m, void *data)
601 603
602static int i915_gem_batch_pool_info(struct seq_file *m, void *data) 604static int i915_gem_batch_pool_info(struct seq_file *m, void *data)
603{ 605{
604 struct drm_info_node *node = m->private; 606 struct drm_i915_private *dev_priv = node_to_i915(m->private);
605 struct drm_device *dev = node->minor->dev; 607 struct drm_device *dev = &dev_priv->drm;
606 struct drm_i915_private *dev_priv = to_i915(dev);
607 struct drm_i915_gem_object *obj; 608 struct drm_i915_gem_object *obj;
608 struct intel_engine_cs *engine; 609 struct intel_engine_cs *engine;
609 int total = 0; 610 int total = 0;
@@ -646,9 +647,8 @@ static int i915_gem_batch_pool_info(struct seq_file *m, void *data)
646 647
647static int i915_gem_request_info(struct seq_file *m, void *data) 648static int i915_gem_request_info(struct seq_file *m, void *data)
648{ 649{
649 struct drm_info_node *node = m->private; 650 struct drm_i915_private *dev_priv = node_to_i915(m->private);
650 struct drm_device *dev = node->minor->dev; 651 struct drm_device *dev = &dev_priv->drm;
651 struct drm_i915_private *dev_priv = to_i915(dev);
652 struct intel_engine_cs *engine; 652 struct intel_engine_cs *engine;
653 struct drm_i915_gem_request *req; 653 struct drm_i915_gem_request *req;
654 int ret, any; 654 int ret, any;
@@ -713,9 +713,8 @@ static void i915_ring_seqno_info(struct seq_file *m,
713 713
714static int i915_gem_seqno_info(struct seq_file *m, void *data) 714static int i915_gem_seqno_info(struct seq_file *m, void *data)
715{ 715{
716 struct drm_info_node *node = m->private; 716 struct drm_i915_private *dev_priv = node_to_i915(m->private);
717 struct drm_device *dev = node->minor->dev; 717 struct drm_device *dev = &dev_priv->drm;
718 struct drm_i915_private *dev_priv = to_i915(dev);
719 struct intel_engine_cs *engine; 718 struct intel_engine_cs *engine;
720 int ret; 719 int ret;
721 720
@@ -736,9 +735,8 @@ static int i915_gem_seqno_info(struct seq_file *m, void *data)
736 735
737static int i915_interrupt_info(struct seq_file *m, void *data) 736static int i915_interrupt_info(struct seq_file *m, void *data)
738{ 737{
739 struct drm_info_node *node = m->private; 738 struct drm_i915_private *dev_priv = node_to_i915(m->private);
740 struct drm_device *dev = node->minor->dev; 739 struct drm_device *dev = &dev_priv->drm;
741 struct drm_i915_private *dev_priv = to_i915(dev);
742 struct intel_engine_cs *engine; 740 struct intel_engine_cs *engine;
743 int ret, i, pipe; 741 int ret, i, pipe;
744 742
@@ -747,7 +745,7 @@ static int i915_interrupt_info(struct seq_file *m, void *data)
747 return ret; 745 return ret;
748 intel_runtime_pm_get(dev_priv); 746 intel_runtime_pm_get(dev_priv);
749 747
750 if (IS_CHERRYVIEW(dev)) { 748 if (IS_CHERRYVIEW(dev_priv)) {
751 seq_printf(m, "Master Interrupt Control:\t%08x\n", 749 seq_printf(m, "Master Interrupt Control:\t%08x\n",
752 I915_READ(GEN8_MASTER_IRQ)); 750 I915_READ(GEN8_MASTER_IRQ));
753 751
@@ -786,7 +784,7 @@ static int i915_interrupt_info(struct seq_file *m, void *data)
786 I915_READ(GEN8_PCU_IIR)); 784 I915_READ(GEN8_PCU_IIR));
787 seq_printf(m, "PCU interrupt enable:\t%08x\n", 785 seq_printf(m, "PCU interrupt enable:\t%08x\n",
788 I915_READ(GEN8_PCU_IER)); 786 I915_READ(GEN8_PCU_IER));
789 } else if (INTEL_INFO(dev)->gen >= 8) { 787 } else if (INTEL_GEN(dev_priv) >= 8) {
790 seq_printf(m, "Master Interrupt Control:\t%08x\n", 788 seq_printf(m, "Master Interrupt Control:\t%08x\n",
791 I915_READ(GEN8_MASTER_IRQ)); 789 I915_READ(GEN8_MASTER_IRQ));
792 790
@@ -842,7 +840,7 @@ static int i915_interrupt_info(struct seq_file *m, void *data)
842 I915_READ(GEN8_PCU_IIR)); 840 I915_READ(GEN8_PCU_IIR));
843 seq_printf(m, "PCU interrupt enable:\t%08x\n", 841 seq_printf(m, "PCU interrupt enable:\t%08x\n",
844 I915_READ(GEN8_PCU_IER)); 842 I915_READ(GEN8_PCU_IER));
845 } else if (IS_VALLEYVIEW(dev)) { 843 } else if (IS_VALLEYVIEW(dev_priv)) {
846 seq_printf(m, "Display IER:\t%08x\n", 844 seq_printf(m, "Display IER:\t%08x\n",
847 I915_READ(VLV_IER)); 845 I915_READ(VLV_IER));
848 seq_printf(m, "Display IIR:\t%08x\n", 846 seq_printf(m, "Display IIR:\t%08x\n",
@@ -880,7 +878,7 @@ static int i915_interrupt_info(struct seq_file *m, void *data)
880 seq_printf(m, "DPINVGTT:\t%08x\n", 878 seq_printf(m, "DPINVGTT:\t%08x\n",
881 I915_READ(DPINVGTT)); 879 I915_READ(DPINVGTT));
882 880
883 } else if (!HAS_PCH_SPLIT(dev)) { 881 } else if (!HAS_PCH_SPLIT(dev_priv)) {
884 seq_printf(m, "Interrupt enable: %08x\n", 882 seq_printf(m, "Interrupt enable: %08x\n",
885 I915_READ(IER)); 883 I915_READ(IER));
886 seq_printf(m, "Interrupt identity: %08x\n", 884 seq_printf(m, "Interrupt identity: %08x\n",
@@ -912,7 +910,7 @@ static int i915_interrupt_info(struct seq_file *m, void *data)
912 I915_READ(GTIMR)); 910 I915_READ(GTIMR));
913 } 911 }
914 for_each_engine(engine, dev_priv) { 912 for_each_engine(engine, dev_priv) {
915 if (INTEL_INFO(dev)->gen >= 6) { 913 if (INTEL_GEN(dev_priv) >= 6) {
916 seq_printf(m, 914 seq_printf(m,
917 "Graphics Interrupt mask (%s): %08x\n", 915 "Graphics Interrupt mask (%s): %08x\n",
918 engine->name, I915_READ_IMR(engine)); 916 engine->name, I915_READ_IMR(engine));
@@ -927,9 +925,8 @@ static int i915_interrupt_info(struct seq_file *m, void *data)
927 925
928static int i915_gem_fence_regs_info(struct seq_file *m, void *data) 926static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
929{ 927{
930 struct drm_info_node *node = m->private; 928 struct drm_i915_private *dev_priv = node_to_i915(m->private);
931 struct drm_device *dev = node->minor->dev; 929 struct drm_device *dev = &dev_priv->drm;
932 struct drm_i915_private *dev_priv = to_i915(dev);
933 int i, ret; 930 int i, ret;
934 931
935 ret = mutex_lock_interruptible(&dev->struct_mutex); 932 ret = mutex_lock_interruptible(&dev->struct_mutex);
@@ -956,8 +953,7 @@ static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
956static int i915_hws_info(struct seq_file *m, void *data) 953static int i915_hws_info(struct seq_file *m, void *data)
957{ 954{
958 struct drm_info_node *node = m->private; 955 struct drm_info_node *node = m->private;
959 struct drm_device *dev = node->minor->dev; 956 struct drm_i915_private *dev_priv = node_to_i915(node);
960 struct drm_i915_private *dev_priv = to_i915(dev);
961 struct intel_engine_cs *engine; 957 struct intel_engine_cs *engine;
962 const u32 *hws; 958 const u32 *hws;
963 int i; 959 int i;
@@ -999,16 +995,16 @@ i915_error_state_write(struct file *filp,
999 995
1000static int i915_error_state_open(struct inode *inode, struct file *file) 996static int i915_error_state_open(struct inode *inode, struct file *file)
1001{ 997{
1002 struct drm_device *dev = inode->i_private; 998 struct drm_i915_private *dev_priv = inode->i_private;
1003 struct i915_error_state_file_priv *error_priv; 999 struct i915_error_state_file_priv *error_priv;
1004 1000
1005 error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL); 1001 error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL);
1006 if (!error_priv) 1002 if (!error_priv)
1007 return -ENOMEM; 1003 return -ENOMEM;
1008 1004
1009 error_priv->dev = dev; 1005 error_priv->dev = &dev_priv->drm;
1010 1006
1011 i915_error_state_get(dev, error_priv); 1007 i915_error_state_get(&dev_priv->drm, error_priv);
1012 1008
1013 file->private_data = error_priv; 1009 file->private_data = error_priv;
1014 1010
@@ -1034,7 +1030,8 @@ static ssize_t i915_error_state_read(struct file *file, char __user *userbuf,
1034 ssize_t ret_count = 0; 1030 ssize_t ret_count = 0;
1035 int ret; 1031 int ret;
1036 1032
1037 ret = i915_error_state_buf_init(&error_str, to_i915(error_priv->dev), count, *pos); 1033 ret = i915_error_state_buf_init(&error_str,
1034 to_i915(error_priv->dev), count, *pos);
1038 if (ret) 1035 if (ret)
1039 return ret; 1036 return ret;
1040 1037
@@ -1067,16 +1064,15 @@ static const struct file_operations i915_error_state_fops = {
1067static int 1064static int
1068i915_next_seqno_get(void *data, u64 *val) 1065i915_next_seqno_get(void *data, u64 *val)
1069{ 1066{
1070 struct drm_device *dev = data; 1067 struct drm_i915_private *dev_priv = data;
1071 struct drm_i915_private *dev_priv = to_i915(dev);
1072 int ret; 1068 int ret;
1073 1069
1074 ret = mutex_lock_interruptible(&dev->struct_mutex); 1070 ret = mutex_lock_interruptible(&dev_priv->drm.struct_mutex);
1075 if (ret) 1071 if (ret)
1076 return ret; 1072 return ret;
1077 1073
1078 *val = dev_priv->next_seqno; 1074 *val = dev_priv->next_seqno;
1079 mutex_unlock(&dev->struct_mutex); 1075 mutex_unlock(&dev_priv->drm.struct_mutex);
1080 1076
1081 return 0; 1077 return 0;
1082} 1078}
@@ -1084,7 +1080,8 @@ i915_next_seqno_get(void *data, u64 *val)
1084static int 1080static int
1085i915_next_seqno_set(void *data, u64 val) 1081i915_next_seqno_set(void *data, u64 val)
1086{ 1082{
1087 struct drm_device *dev = data; 1083 struct drm_i915_private *dev_priv = data;
1084 struct drm_device *dev = &dev_priv->drm;
1088 int ret; 1085 int ret;
1089 1086
1090 ret = mutex_lock_interruptible(&dev->struct_mutex); 1087 ret = mutex_lock_interruptible(&dev->struct_mutex);
@@ -1103,14 +1100,13 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_next_seqno_fops,
1103 1100
1104static int i915_frequency_info(struct seq_file *m, void *unused) 1101static int i915_frequency_info(struct seq_file *m, void *unused)
1105{ 1102{
1106 struct drm_info_node *node = m->private; 1103 struct drm_i915_private *dev_priv = node_to_i915(m->private);
1107 struct drm_device *dev = node->minor->dev; 1104 struct drm_device *dev = &dev_priv->drm;
1108 struct drm_i915_private *dev_priv = to_i915(dev);
1109 int ret = 0; 1105 int ret = 0;
1110 1106
1111 intel_runtime_pm_get(dev_priv); 1107 intel_runtime_pm_get(dev_priv);
1112 1108
1113 if (IS_GEN5(dev)) { 1109 if (IS_GEN5(dev_priv)) {
1114 u16 rgvswctl = I915_READ16(MEMSWCTL); 1110 u16 rgvswctl = I915_READ16(MEMSWCTL);
1115 u16 rgvstat = I915_READ16(MEMSTAT_ILK); 1111 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
1116 1112
@@ -1120,7 +1116,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
1120 MEMSTAT_VID_SHIFT); 1116 MEMSTAT_VID_SHIFT);
1121 seq_printf(m, "Current P-state: %d\n", 1117 seq_printf(m, "Current P-state: %d\n",
1122 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT); 1118 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
1123 } else if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) { 1119 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
1124 u32 freq_sts; 1120 u32 freq_sts;
1125 1121
1126 mutex_lock(&dev_priv->rps.hw_lock); 1122 mutex_lock(&dev_priv->rps.hw_lock);
@@ -1147,7 +1143,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
1147 "efficient (RPe) frequency: %d MHz\n", 1143 "efficient (RPe) frequency: %d MHz\n",
1148 intel_gpu_freq(dev_priv, dev_priv->rps.efficient_freq)); 1144 intel_gpu_freq(dev_priv, dev_priv->rps.efficient_freq));
1149 mutex_unlock(&dev_priv->rps.hw_lock); 1145 mutex_unlock(&dev_priv->rps.hw_lock);
1150 } else if (INTEL_INFO(dev)->gen >= 6) { 1146 } else if (INTEL_GEN(dev_priv) >= 6) {
1151 u32 rp_state_limits; 1147 u32 rp_state_limits;
1152 u32 gt_perf_status; 1148 u32 gt_perf_status;
1153 u32 rp_state_cap; 1149 u32 rp_state_cap;
@@ -1159,7 +1155,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
1159 int max_freq; 1155 int max_freq;
1160 1156
1161 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS); 1157 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
1162 if (IS_BROXTON(dev)) { 1158 if (IS_BROXTON(dev_priv)) {
1163 rp_state_cap = I915_READ(BXT_RP_STATE_CAP); 1159 rp_state_cap = I915_READ(BXT_RP_STATE_CAP);
1164 gt_perf_status = I915_READ(BXT_GT_PERF_STATUS); 1160 gt_perf_status = I915_READ(BXT_GT_PERF_STATUS);
1165 } else { 1161 } else {
@@ -1175,11 +1171,11 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
1175 intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL); 1171 intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
1176 1172
1177 reqf = I915_READ(GEN6_RPNSWREQ); 1173 reqf = I915_READ(GEN6_RPNSWREQ);
1178 if (IS_GEN9(dev)) 1174 if (IS_GEN9(dev_priv))
1179 reqf >>= 23; 1175 reqf >>= 23;
1180 else { 1176 else {
1181 reqf &= ~GEN6_TURBO_DISABLE; 1177 reqf &= ~GEN6_TURBO_DISABLE;
1182 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) 1178 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
1183 reqf >>= 24; 1179 reqf >>= 24;
1184 else 1180 else
1185 reqf >>= 25; 1181 reqf >>= 25;
@@ -1197,9 +1193,9 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
1197 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI) & GEN6_CURIAVG_MASK; 1193 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI) & GEN6_CURIAVG_MASK;
1198 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN) & GEN6_CURBSYTAVG_MASK; 1194 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN) & GEN6_CURBSYTAVG_MASK;
1199 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN) & GEN6_CURBSYTAVG_MASK; 1195 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN) & GEN6_CURBSYTAVG_MASK;
1200 if (IS_GEN9(dev)) 1196 if (IS_GEN9(dev_priv))
1201 cagf = (rpstat & GEN9_CAGF_MASK) >> GEN9_CAGF_SHIFT; 1197 cagf = (rpstat & GEN9_CAGF_MASK) >> GEN9_CAGF_SHIFT;
1202 else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) 1198 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
1203 cagf = (rpstat & HSW_CAGF_MASK) >> HSW_CAGF_SHIFT; 1199 cagf = (rpstat & HSW_CAGF_MASK) >> HSW_CAGF_SHIFT;
1204 else 1200 else
1205 cagf = (rpstat & GEN6_CAGF_MASK) >> GEN6_CAGF_SHIFT; 1201 cagf = (rpstat & GEN6_CAGF_MASK) >> GEN6_CAGF_SHIFT;
@@ -1208,7 +1204,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
1208 intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); 1204 intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
1209 mutex_unlock(&dev->struct_mutex); 1205 mutex_unlock(&dev->struct_mutex);
1210 1206
1211 if (IS_GEN6(dev) || IS_GEN7(dev)) { 1207 if (IS_GEN6(dev_priv) || IS_GEN7(dev_priv)) {
1212 pm_ier = I915_READ(GEN6_PMIER); 1208 pm_ier = I915_READ(GEN6_PMIER);
1213 pm_imr = I915_READ(GEN6_PMIMR); 1209 pm_imr = I915_READ(GEN6_PMIMR);
1214 pm_isr = I915_READ(GEN6_PMISR); 1210 pm_isr = I915_READ(GEN6_PMISR);
@@ -1226,7 +1222,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
1226 seq_printf(m, "pm_intr_keep: 0x%08x\n", dev_priv->rps.pm_intr_keep); 1222 seq_printf(m, "pm_intr_keep: 0x%08x\n", dev_priv->rps.pm_intr_keep);
1227 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status); 1223 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
1228 seq_printf(m, "Render p-state ratio: %d\n", 1224 seq_printf(m, "Render p-state ratio: %d\n",
1229 (gt_perf_status & (IS_GEN9(dev) ? 0x1ff00 : 0xff00)) >> 8); 1225 (gt_perf_status & (IS_GEN9(dev_priv) ? 0x1ff00 : 0xff00)) >> 8);
1230 seq_printf(m, "Render p-state VID: %d\n", 1226 seq_printf(m, "Render p-state VID: %d\n",
1231 gt_perf_status & 0xff); 1227 gt_perf_status & 0xff);
1232 seq_printf(m, "Render p-state limit: %d\n", 1228 seq_printf(m, "Render p-state limit: %d\n",
@@ -1255,22 +1251,22 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
1255 seq_printf(m, "Down threshold: %d%%\n", 1251 seq_printf(m, "Down threshold: %d%%\n",
1256 dev_priv->rps.down_threshold); 1252 dev_priv->rps.down_threshold);
1257 1253
1258 max_freq = (IS_BROXTON(dev) ? rp_state_cap >> 0 : 1254 max_freq = (IS_BROXTON(dev_priv) ? rp_state_cap >> 0 :
1259 rp_state_cap >> 16) & 0xff; 1255 rp_state_cap >> 16) & 0xff;
1260 max_freq *= (IS_SKYLAKE(dev) || IS_KABYLAKE(dev) ? 1256 max_freq *= (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv) ?
1261 GEN9_FREQ_SCALER : 1); 1257 GEN9_FREQ_SCALER : 1);
1262 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n", 1258 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
1263 intel_gpu_freq(dev_priv, max_freq)); 1259 intel_gpu_freq(dev_priv, max_freq));
1264 1260
1265 max_freq = (rp_state_cap & 0xff00) >> 8; 1261 max_freq = (rp_state_cap & 0xff00) >> 8;
1266 max_freq *= (IS_SKYLAKE(dev) || IS_KABYLAKE(dev) ? 1262 max_freq *= (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv) ?
1267 GEN9_FREQ_SCALER : 1); 1263 GEN9_FREQ_SCALER : 1);
1268 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n", 1264 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
1269 intel_gpu_freq(dev_priv, max_freq)); 1265 intel_gpu_freq(dev_priv, max_freq));
1270 1266
1271 max_freq = (IS_BROXTON(dev) ? rp_state_cap >> 16 : 1267 max_freq = (IS_BROXTON(dev_priv) ? rp_state_cap >> 16 :
1272 rp_state_cap >> 0) & 0xff; 1268 rp_state_cap >> 0) & 0xff;
1273 max_freq *= (IS_SKYLAKE(dev) || IS_KABYLAKE(dev) ? 1269 max_freq *= (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv) ?
1274 GEN9_FREQ_SCALER : 1); 1270 GEN9_FREQ_SCALER : 1);
1275 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n", 1271 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
1276 intel_gpu_freq(dev_priv, max_freq)); 1272 intel_gpu_freq(dev_priv, max_freq));
@@ -1306,9 +1302,7 @@ out:
1306 1302
1307static int i915_hangcheck_info(struct seq_file *m, void *unused) 1303static int i915_hangcheck_info(struct seq_file *m, void *unused)
1308{ 1304{
1309 struct drm_info_node *node = m->private; 1305 struct drm_i915_private *dev_priv = node_to_i915(m->private);
1310 struct drm_device *dev = node->minor->dev;
1311 struct drm_i915_private *dev_priv = to_i915(dev);
1312 struct intel_engine_cs *engine; 1306 struct intel_engine_cs *engine;
1313 u64 acthd[I915_NUM_ENGINES]; 1307 u64 acthd[I915_NUM_ENGINES];
1314 u32 seqno[I915_NUM_ENGINES]; 1308 u32 seqno[I915_NUM_ENGINES];
@@ -1376,9 +1370,8 @@ static int i915_hangcheck_info(struct seq_file *m, void *unused)
1376 1370
1377static int ironlake_drpc_info(struct seq_file *m) 1371static int ironlake_drpc_info(struct seq_file *m)
1378{ 1372{
1379 struct drm_info_node *node = m->private; 1373 struct drm_i915_private *dev_priv = node_to_i915(m->private);
1380 struct drm_device *dev = node->minor->dev; 1374 struct drm_device *dev = &dev_priv->drm;
1381 struct drm_i915_private *dev_priv = to_i915(dev);
1382 u32 rgvmodectl, rstdbyctl; 1375 u32 rgvmodectl, rstdbyctl;
1383 u16 crstandvid; 1376 u16 crstandvid;
1384 int ret; 1377 int ret;
@@ -1444,9 +1437,7 @@ static int ironlake_drpc_info(struct seq_file *m)
1444 1437
1445static int i915_forcewake_domains(struct seq_file *m, void *data) 1438static int i915_forcewake_domains(struct seq_file *m, void *data)
1446{ 1439{
1447 struct drm_info_node *node = m->private; 1440 struct drm_i915_private *dev_priv = node_to_i915(m->private);
1448 struct drm_device *dev = node->minor->dev;
1449 struct drm_i915_private *dev_priv = to_i915(dev);
1450 struct intel_uncore_forcewake_domain *fw_domain; 1441 struct intel_uncore_forcewake_domain *fw_domain;
1451 1442
1452 spin_lock_irq(&dev_priv->uncore.lock); 1443 spin_lock_irq(&dev_priv->uncore.lock);
@@ -1462,9 +1453,7 @@ static int i915_forcewake_domains(struct seq_file *m, void *data)
1462 1453
1463static int vlv_drpc_info(struct seq_file *m) 1454static int vlv_drpc_info(struct seq_file *m)
1464{ 1455{
1465 struct drm_info_node *node = m->private; 1456 struct drm_i915_private *dev_priv = node_to_i915(m->private);
1466 struct drm_device *dev = node->minor->dev;
1467 struct drm_i915_private *dev_priv = to_i915(dev);
1468 u32 rpmodectl1, rcctl1, pw_status; 1457 u32 rpmodectl1, rcctl1, pw_status;
1469 1458
1470 intel_runtime_pm_get(dev_priv); 1459 intel_runtime_pm_get(dev_priv);
@@ -1502,9 +1491,8 @@ static int vlv_drpc_info(struct seq_file *m)
1502 1491
1503static int gen6_drpc_info(struct seq_file *m) 1492static int gen6_drpc_info(struct seq_file *m)
1504{ 1493{
1505 struct drm_info_node *node = m->private; 1494 struct drm_i915_private *dev_priv = node_to_i915(m->private);
1506 struct drm_device *dev = node->minor->dev; 1495 struct drm_device *dev = &dev_priv->drm;
1507 struct drm_i915_private *dev_priv = to_i915(dev);
1508 u32 rpmodectl1, gt_core_status, rcctl1, rc6vids = 0; 1496 u32 rpmodectl1, gt_core_status, rcctl1, rc6vids = 0;
1509 u32 gen9_powergate_enable = 0, gen9_powergate_status = 0; 1497 u32 gen9_powergate_enable = 0, gen9_powergate_status = 0;
1510 unsigned forcewake_count; 1498 unsigned forcewake_count;
@@ -1534,7 +1522,7 @@ static int gen6_drpc_info(struct seq_file *m)
1534 1522
1535 rpmodectl1 = I915_READ(GEN6_RP_CONTROL); 1523 rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
1536 rcctl1 = I915_READ(GEN6_RC_CONTROL); 1524 rcctl1 = I915_READ(GEN6_RC_CONTROL);
1537 if (INTEL_INFO(dev)->gen >= 9) { 1525 if (INTEL_GEN(dev_priv) >= 9) {
1538 gen9_powergate_enable = I915_READ(GEN9_PG_ENABLE); 1526 gen9_powergate_enable = I915_READ(GEN9_PG_ENABLE);
1539 gen9_powergate_status = I915_READ(GEN9_PWRGT_DOMAIN_STATUS); 1527 gen9_powergate_status = I915_READ(GEN9_PWRGT_DOMAIN_STATUS);
1540 } 1528 }
@@ -1556,7 +1544,7 @@ static int gen6_drpc_info(struct seq_file *m)
1556 yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE)); 1544 yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE));
1557 seq_printf(m, "RC6 Enabled: %s\n", 1545 seq_printf(m, "RC6 Enabled: %s\n",
1558 yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE)); 1546 yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE));
1559 if (INTEL_INFO(dev)->gen >= 9) { 1547 if (INTEL_GEN(dev_priv) >= 9) {
1560 seq_printf(m, "Render Well Gating Enabled: %s\n", 1548 seq_printf(m, "Render Well Gating Enabled: %s\n",
1561 yesno(gen9_powergate_enable & GEN9_RENDER_PG_ENABLE)); 1549 yesno(gen9_powergate_enable & GEN9_RENDER_PG_ENABLE));
1562 seq_printf(m, "Media Well Gating Enabled: %s\n", 1550 seq_printf(m, "Media Well Gating Enabled: %s\n",
@@ -1590,7 +1578,7 @@ static int gen6_drpc_info(struct seq_file *m)
1590 1578
1591 seq_printf(m, "Core Power Down: %s\n", 1579 seq_printf(m, "Core Power Down: %s\n",
1592 yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK)); 1580 yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK));
1593 if (INTEL_INFO(dev)->gen >= 9) { 1581 if (INTEL_GEN(dev_priv) >= 9) {
1594 seq_printf(m, "Render Power Well: %s\n", 1582 seq_printf(m, "Render Power Well: %s\n",
1595 (gen9_powergate_status & 1583 (gen9_powergate_status &
1596 GEN9_PWRGT_RENDER_STATUS_MASK) ? "Up" : "Down"); 1584 GEN9_PWRGT_RENDER_STATUS_MASK) ? "Up" : "Down");
@@ -1620,12 +1608,11 @@ static int gen6_drpc_info(struct seq_file *m)
1620 1608
1621static int i915_drpc_info(struct seq_file *m, void *unused) 1609static int i915_drpc_info(struct seq_file *m, void *unused)
1622{ 1610{
1623 struct drm_info_node *node = m->private; 1611 struct drm_i915_private *dev_priv = node_to_i915(m->private);
1624 struct drm_device *dev = node->minor->dev;
1625 1612
1626 if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) 1613 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
1627 return vlv_drpc_info(m); 1614 return vlv_drpc_info(m);
1628 else if (INTEL_INFO(dev)->gen >= 6) 1615 else if (INTEL_GEN(dev_priv) >= 6)
1629 return gen6_drpc_info(m); 1616 return gen6_drpc_info(m);
1630 else 1617 else
1631 return ironlake_drpc_info(m); 1618 return ironlake_drpc_info(m);
@@ -1633,9 +1620,7 @@ static int i915_drpc_info(struct seq_file *m, void *unused)
1633 1620
1634static int i915_frontbuffer_tracking(struct seq_file *m, void *unused) 1621static int i915_frontbuffer_tracking(struct seq_file *m, void *unused)
1635{ 1622{
1636 struct drm_info_node *node = m->private; 1623 struct drm_i915_private *dev_priv = node_to_i915(m->private);
1637 struct drm_device *dev = node->minor->dev;
1638 struct drm_i915_private *dev_priv = to_i915(dev);
1639 1624
1640 seq_printf(m, "FB tracking busy bits: 0x%08x\n", 1625 seq_printf(m, "FB tracking busy bits: 0x%08x\n",
1641 dev_priv->fb_tracking.busy_bits); 1626 dev_priv->fb_tracking.busy_bits);
@@ -1648,11 +1633,9 @@ static int i915_frontbuffer_tracking(struct seq_file *m, void *unused)
1648 1633
1649static int i915_fbc_status(struct seq_file *m, void *unused) 1634static int i915_fbc_status(struct seq_file *m, void *unused)
1650{ 1635{
1651 struct drm_info_node *node = m->private; 1636 struct drm_i915_private *dev_priv = node_to_i915(m->private);
1652 struct drm_device *dev = node->minor->dev;
1653 struct drm_i915_private *dev_priv = to_i915(dev);
1654 1637
1655 if (!HAS_FBC(dev)) { 1638 if (!HAS_FBC(dev_priv)) {
1656 seq_puts(m, "FBC unsupported on this chipset\n"); 1639 seq_puts(m, "FBC unsupported on this chipset\n");
1657 return 0; 1640 return 0;
1658 } 1641 }
@@ -1666,7 +1649,7 @@ static int i915_fbc_status(struct seq_file *m, void *unused)
1666 seq_printf(m, "FBC disabled: %s\n", 1649 seq_printf(m, "FBC disabled: %s\n",
1667 dev_priv->fbc.no_fbc_reason); 1650 dev_priv->fbc.no_fbc_reason);
1668 1651
1669 if (INTEL_INFO(dev_priv)->gen >= 7) 1652 if (INTEL_GEN(dev_priv) >= 7)
1670 seq_printf(m, "Compressing: %s\n", 1653 seq_printf(m, "Compressing: %s\n",
1671 yesno(I915_READ(FBC_STATUS2) & 1654 yesno(I915_READ(FBC_STATUS2) &
1672 FBC_COMPRESSION_MASK)); 1655 FBC_COMPRESSION_MASK));
@@ -1679,10 +1662,9 @@ static int i915_fbc_status(struct seq_file *m, void *unused)
1679 1662
1680static int i915_fbc_fc_get(void *data, u64 *val) 1663static int i915_fbc_fc_get(void *data, u64 *val)
1681{ 1664{
1682 struct drm_device *dev = data; 1665 struct drm_i915_private *dev_priv = data;
1683 struct drm_i915_private *dev_priv = to_i915(dev);
1684 1666
1685 if (INTEL_INFO(dev)->gen < 7 || !HAS_FBC(dev)) 1667 if (INTEL_GEN(dev_priv) < 7 || !HAS_FBC(dev_priv))
1686 return -ENODEV; 1668 return -ENODEV;
1687 1669
1688 *val = dev_priv->fbc.false_color; 1670 *val = dev_priv->fbc.false_color;
@@ -1692,11 +1674,10 @@ static int i915_fbc_fc_get(void *data, u64 *val)
1692 1674
1693static int i915_fbc_fc_set(void *data, u64 val) 1675static int i915_fbc_fc_set(void *data, u64 val)
1694{ 1676{
1695 struct drm_device *dev = data; 1677 struct drm_i915_private *dev_priv = data;
1696 struct drm_i915_private *dev_priv = to_i915(dev);
1697 u32 reg; 1678 u32 reg;
1698 1679
1699 if (INTEL_INFO(dev)->gen < 7 || !HAS_FBC(dev)) 1680 if (INTEL_GEN(dev_priv) < 7 || !HAS_FBC(dev_priv))
1700 return -ENODEV; 1681 return -ENODEV;
1701 1682
1702 mutex_lock(&dev_priv->fbc.lock); 1683 mutex_lock(&dev_priv->fbc.lock);
@@ -1718,11 +1699,9 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_fbc_fc_fops,
1718 1699
1719static int i915_ips_status(struct seq_file *m, void *unused) 1700static int i915_ips_status(struct seq_file *m, void *unused)
1720{ 1701{
1721 struct drm_info_node *node = m->private; 1702 struct drm_i915_private *dev_priv = node_to_i915(m->private);
1722 struct drm_device *dev = node->minor->dev;
1723 struct drm_i915_private *dev_priv = to_i915(dev);
1724 1703
1725 if (!HAS_IPS(dev)) { 1704 if (!HAS_IPS(dev_priv)) {
1726 seq_puts(m, "not supported\n"); 1705 seq_puts(m, "not supported\n");
1727 return 0; 1706 return 0;
1728 } 1707 }
@@ -1732,7 +1711,7 @@ static int i915_ips_status(struct seq_file *m, void *unused)
1732 seq_printf(m, "Enabled by kernel parameter: %s\n", 1711 seq_printf(m, "Enabled by kernel parameter: %s\n",
1733 yesno(i915.enable_ips)); 1712 yesno(i915.enable_ips));
1734 1713
1735 if (INTEL_INFO(dev)->gen >= 8) { 1714 if (INTEL_GEN(dev_priv) >= 8) {
1736 seq_puts(m, "Currently: unknown\n"); 1715 seq_puts(m, "Currently: unknown\n");
1737 } else { 1716 } else {
1738 if (I915_READ(IPS_CTL) & IPS_ENABLE) 1717 if (I915_READ(IPS_CTL) & IPS_ENABLE)
@@ -1748,23 +1727,21 @@ static int i915_ips_status(struct seq_file *m, void *unused)
1748 1727
1749static int i915_sr_status(struct seq_file *m, void *unused) 1728static int i915_sr_status(struct seq_file *m, void *unused)
1750{ 1729{
1751 struct drm_info_node *node = m->private; 1730 struct drm_i915_private *dev_priv = node_to_i915(m->private);
1752 struct drm_device *dev = node->minor->dev;
1753 struct drm_i915_private *dev_priv = to_i915(dev);
1754 bool sr_enabled = false; 1731 bool sr_enabled = false;
1755 1732
1756 intel_runtime_pm_get(dev_priv); 1733 intel_runtime_pm_get(dev_priv);
1757 1734
1758 if (HAS_PCH_SPLIT(dev)) 1735 if (HAS_PCH_SPLIT(dev_priv))
1759 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN; 1736 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
1760 else if (IS_CRESTLINE(dev) || IS_G4X(dev) || 1737 else if (IS_CRESTLINE(dev_priv) || IS_G4X(dev_priv) ||
1761 IS_I945G(dev) || IS_I945GM(dev)) 1738 IS_I945G(dev_priv) || IS_I945GM(dev_priv))
1762 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN; 1739 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
1763 else if (IS_I915GM(dev)) 1740 else if (IS_I915GM(dev_priv))
1764 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN; 1741 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
1765 else if (IS_PINEVIEW(dev)) 1742 else if (IS_PINEVIEW(dev_priv))
1766 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN; 1743 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
1767 else if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) 1744 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
1768 sr_enabled = I915_READ(FW_BLC_SELF_VLV) & FW_CSPWRDWNEN; 1745 sr_enabled = I915_READ(FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
1769 1746
1770 intel_runtime_pm_put(dev_priv); 1747 intel_runtime_pm_put(dev_priv);
@@ -1777,13 +1754,12 @@ static int i915_sr_status(struct seq_file *m, void *unused)
1777 1754
1778static int i915_emon_status(struct seq_file *m, void *unused) 1755static int i915_emon_status(struct seq_file *m, void *unused)
1779{ 1756{
1780 struct drm_info_node *node = m->private; 1757 struct drm_i915_private *dev_priv = node_to_i915(m->private);
1781 struct drm_device *dev = node->minor->dev; 1758 struct drm_device *dev = &dev_priv->drm;
1782 struct drm_i915_private *dev_priv = to_i915(dev);
1783 unsigned long temp, chipset, gfx; 1759 unsigned long temp, chipset, gfx;
1784 int ret; 1760 int ret;
1785 1761
1786 if (!IS_GEN5(dev)) 1762 if (!IS_GEN5(dev_priv))
1787 return -ENODEV; 1763 return -ENODEV;
1788 1764
1789 ret = mutex_lock_interruptible(&dev->struct_mutex); 1765 ret = mutex_lock_interruptible(&dev->struct_mutex);
@@ -1805,14 +1781,12 @@ static int i915_emon_status(struct seq_file *m, void *unused)
1805 1781
1806static int i915_ring_freq_table(struct seq_file *m, void *unused) 1782static int i915_ring_freq_table(struct seq_file *m, void *unused)
1807{ 1783{
1808 struct drm_info_node *node = m->private; 1784 struct drm_i915_private *dev_priv = node_to_i915(m->private);
1809 struct drm_device *dev = node->minor->dev;
1810 struct drm_i915_private *dev_priv = to_i915(dev);
1811 int ret = 0; 1785 int ret = 0;
1812 int gpu_freq, ia_freq; 1786 int gpu_freq, ia_freq;
1813 unsigned int max_gpu_freq, min_gpu_freq; 1787 unsigned int max_gpu_freq, min_gpu_freq;
1814 1788
1815 if (!HAS_CORE_RING_FREQ(dev)) { 1789 if (!HAS_CORE_RING_FREQ(dev_priv)) {
1816 seq_puts(m, "unsupported on this chipset\n"); 1790 seq_puts(m, "unsupported on this chipset\n");
1817 return 0; 1791 return 0;
1818 } 1792 }
@@ -1823,7 +1797,7 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused)
1823 if (ret) 1797 if (ret)
1824 goto out; 1798 goto out;
1825 1799
1826 if (IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) { 1800 if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
1827 /* Convert GT frequency to 50 HZ units */ 1801 /* Convert GT frequency to 50 HZ units */
1828 min_gpu_freq = 1802 min_gpu_freq =
1829 dev_priv->rps.min_freq_softlimit / GEN9_FREQ_SCALER; 1803 dev_priv->rps.min_freq_softlimit / GEN9_FREQ_SCALER;
@@ -1843,7 +1817,7 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused)
1843 &ia_freq); 1817 &ia_freq);
1844 seq_printf(m, "%d\t\t%d\t\t\t\t%d\n", 1818 seq_printf(m, "%d\t\t%d\t\t\t\t%d\n",
1845 intel_gpu_freq(dev_priv, (gpu_freq * 1819 intel_gpu_freq(dev_priv, (gpu_freq *
1846 (IS_SKYLAKE(dev) || IS_KABYLAKE(dev) ? 1820 (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv) ?
1847 GEN9_FREQ_SCALER : 1))), 1821 GEN9_FREQ_SCALER : 1))),
1848 ((ia_freq >> 0) & 0xff) * 100, 1822 ((ia_freq >> 0) & 0xff) * 100,
1849 ((ia_freq >> 8) & 0xff) * 100); 1823 ((ia_freq >> 8) & 0xff) * 100);
@@ -1858,9 +1832,8 @@ out:
1858 1832
1859static int i915_opregion(struct seq_file *m, void *unused) 1833static int i915_opregion(struct seq_file *m, void *unused)
1860{ 1834{
1861 struct drm_info_node *node = m->private; 1835 struct drm_i915_private *dev_priv = node_to_i915(m->private);
1862 struct drm_device *dev = node->minor->dev; 1836 struct drm_device *dev = &dev_priv->drm;
1863 struct drm_i915_private *dev_priv = to_i915(dev);
1864 struct intel_opregion *opregion = &dev_priv->opregion; 1837 struct intel_opregion *opregion = &dev_priv->opregion;
1865 int ret; 1838 int ret;
1866 1839
@@ -1879,10 +1852,7 @@ out:
1879 1852
1880static int i915_vbt(struct seq_file *m, void *unused) 1853static int i915_vbt(struct seq_file *m, void *unused)
1881{ 1854{
1882 struct drm_info_node *node = m->private; 1855 struct intel_opregion *opregion = &node_to_i915(m->private)->opregion;
1883 struct drm_device *dev = node->minor->dev;
1884 struct drm_i915_private *dev_priv = to_i915(dev);
1885 struct intel_opregion *opregion = &dev_priv->opregion;
1886 1856
1887 if (opregion->vbt) 1857 if (opregion->vbt)
1888 seq_write(m, opregion->vbt, opregion->vbt_size); 1858 seq_write(m, opregion->vbt, opregion->vbt_size);
@@ -1892,8 +1862,8 @@ static int i915_vbt(struct seq_file *m, void *unused)
1892 1862
1893static int i915_gem_framebuffer_info(struct seq_file *m, void *data) 1863static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
1894{ 1864{
1895 struct drm_info_node *node = m->private; 1865 struct drm_i915_private *dev_priv = node_to_i915(m->private);
1896 struct drm_device *dev = node->minor->dev; 1866 struct drm_device *dev = &dev_priv->drm;
1897 struct intel_framebuffer *fbdev_fb = NULL; 1867 struct intel_framebuffer *fbdev_fb = NULL;
1898 struct drm_framebuffer *drm_fb; 1868 struct drm_framebuffer *drm_fb;
1899 int ret; 1869 int ret;
@@ -1903,8 +1873,8 @@ static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
1903 return ret; 1873 return ret;
1904 1874
1905#ifdef CONFIG_DRM_FBDEV_EMULATION 1875#ifdef CONFIG_DRM_FBDEV_EMULATION
1906 if (to_i915(dev)->fbdev) { 1876 if (dev_priv->fbdev) {
1907 fbdev_fb = to_intel_framebuffer(to_i915(dev)->fbdev->helper.fb); 1877 fbdev_fb = to_intel_framebuffer(dev_priv->fbdev->helper.fb);
1908 1878
1909 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", 1879 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
1910 fbdev_fb->base.width, 1880 fbdev_fb->base.width,
@@ -1949,9 +1919,8 @@ static void describe_ctx_ring(struct seq_file *m, struct intel_ring *ring)
1949 1919
1950static int i915_context_status(struct seq_file *m, void *unused) 1920static int i915_context_status(struct seq_file *m, void *unused)
1951{ 1921{
1952 struct drm_info_node *node = m->private; 1922 struct drm_i915_private *dev_priv = node_to_i915(m->private);
1953 struct drm_device *dev = node->minor->dev; 1923 struct drm_device *dev = &dev_priv->drm;
1954 struct drm_i915_private *dev_priv = to_i915(dev);
1955 struct intel_engine_cs *engine; 1924 struct intel_engine_cs *engine;
1956 struct i915_gem_context *ctx; 1925 struct i915_gem_context *ctx;
1957 int ret; 1926 int ret;
@@ -2043,9 +2012,8 @@ static void i915_dump_lrc_obj(struct seq_file *m,
2043 2012
2044static int i915_dump_lrc(struct seq_file *m, void *unused) 2013static int i915_dump_lrc(struct seq_file *m, void *unused)
2045{ 2014{
2046 struct drm_info_node *node = (struct drm_info_node *) m->private; 2015 struct drm_i915_private *dev_priv = node_to_i915(m->private);
2047 struct drm_device *dev = node->minor->dev; 2016 struct drm_device *dev = &dev_priv->drm;
2048 struct drm_i915_private *dev_priv = to_i915(dev);
2049 struct intel_engine_cs *engine; 2017 struct intel_engine_cs *engine;
2050 struct i915_gem_context *ctx; 2018 struct i915_gem_context *ctx;
2051 int ret; 2019 int ret;
@@ -2070,9 +2038,8 @@ static int i915_dump_lrc(struct seq_file *m, void *unused)
2070 2038
2071static int i915_execlists(struct seq_file *m, void *data) 2039static int i915_execlists(struct seq_file *m, void *data)
2072{ 2040{
2073 struct drm_info_node *node = (struct drm_info_node *)m->private; 2041 struct drm_i915_private *dev_priv = node_to_i915(m->private);
2074 struct drm_device *dev = node->minor->dev; 2042 struct drm_device *dev = &dev_priv->drm;
2075 struct drm_i915_private *dev_priv = to_i915(dev);
2076 struct intel_engine_cs *engine; 2043 struct intel_engine_cs *engine;
2077 u32 status_pointer; 2044 u32 status_pointer;
2078 u8 read_pointer; 2045 u8 read_pointer;
@@ -2173,9 +2140,8 @@ static const char *swizzle_string(unsigned swizzle)
2173 2140
2174static int i915_swizzle_info(struct seq_file *m, void *data) 2141static int i915_swizzle_info(struct seq_file *m, void *data)
2175{ 2142{
2176 struct drm_info_node *node = m->private; 2143 struct drm_i915_private *dev_priv = node_to_i915(m->private);
2177 struct drm_device *dev = node->minor->dev; 2144 struct drm_device *dev = &dev_priv->drm;
2178 struct drm_i915_private *dev_priv = to_i915(dev);
2179 int ret; 2145 int ret;
2180 2146
2181 ret = mutex_lock_interruptible(&dev->struct_mutex); 2147 ret = mutex_lock_interruptible(&dev->struct_mutex);
@@ -2188,7 +2154,7 @@ static int i915_swizzle_info(struct seq_file *m, void *data)
2188 seq_printf(m, "bit6 swizzle for Y-tiling = %s\n", 2154 seq_printf(m, "bit6 swizzle for Y-tiling = %s\n",
2189 swizzle_string(dev_priv->mm.bit_6_swizzle_y)); 2155 swizzle_string(dev_priv->mm.bit_6_swizzle_y));
2190 2156
2191 if (IS_GEN3(dev) || IS_GEN4(dev)) { 2157 if (IS_GEN3(dev_priv) || IS_GEN4(dev_priv)) {
2192 seq_printf(m, "DDC = 0x%08x\n", 2158 seq_printf(m, "DDC = 0x%08x\n",
2193 I915_READ(DCC)); 2159 I915_READ(DCC));
2194 seq_printf(m, "DDC2 = 0x%08x\n", 2160 seq_printf(m, "DDC2 = 0x%08x\n",
@@ -2197,7 +2163,7 @@ static int i915_swizzle_info(struct seq_file *m, void *data)
2197 I915_READ16(C0DRB3)); 2163 I915_READ16(C0DRB3));
2198 seq_printf(m, "C1DRB3 = 0x%04x\n", 2164 seq_printf(m, "C1DRB3 = 0x%04x\n",
2199 I915_READ16(C1DRB3)); 2165 I915_READ16(C1DRB3));
2200 } else if (INTEL_INFO(dev)->gen >= 6) { 2166 } else if (INTEL_GEN(dev_priv) >= 6) {
2201 seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n", 2167 seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
2202 I915_READ(MAD_DIMM_C0)); 2168 I915_READ(MAD_DIMM_C0));
2203 seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n", 2169 seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
@@ -2206,7 +2172,7 @@ static int i915_swizzle_info(struct seq_file *m, void *data)
2206 I915_READ(MAD_DIMM_C2)); 2172 I915_READ(MAD_DIMM_C2));
2207 seq_printf(m, "TILECTL = 0x%08x\n", 2173 seq_printf(m, "TILECTL = 0x%08x\n",
2208 I915_READ(TILECTL)); 2174 I915_READ(TILECTL));
2209 if (INTEL_INFO(dev)->gen >= 8) 2175 if (INTEL_GEN(dev_priv) >= 8)
2210 seq_printf(m, "GAMTARBMODE = 0x%08x\n", 2176 seq_printf(m, "GAMTARBMODE = 0x%08x\n",
2211 I915_READ(GAMTARBMODE)); 2177 I915_READ(GAMTARBMODE));
2212 else 2178 else
@@ -2246,9 +2212,9 @@ static int per_file_ctx(int id, void *ptr, void *data)
2246 return 0; 2212 return 0;
2247} 2213}
2248 2214
2249static void gen8_ppgtt_info(struct seq_file *m, struct drm_device *dev) 2215static void gen8_ppgtt_info(struct seq_file *m,
2216 struct drm_i915_private *dev_priv)
2250{ 2217{
2251 struct drm_i915_private *dev_priv = to_i915(dev);
2252 struct intel_engine_cs *engine; 2218 struct intel_engine_cs *engine;
2253 struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt; 2219 struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
2254 int i; 2220 int i;
@@ -2267,9 +2233,9 @@ static void gen8_ppgtt_info(struct seq_file *m, struct drm_device *dev)
2267 } 2233 }
2268} 2234}
2269 2235
2270static void gen6_ppgtt_info(struct seq_file *m, struct drm_device *dev) 2236static void gen6_ppgtt_info(struct seq_file *m,
2237 struct drm_i915_private *dev_priv)
2271{ 2238{
2272 struct drm_i915_private *dev_priv = to_i915(dev);
2273 struct intel_engine_cs *engine; 2239 struct intel_engine_cs *engine;
2274 2240
2275 if (IS_GEN6(dev_priv)) 2241 if (IS_GEN6(dev_priv))
@@ -2301,9 +2267,8 @@ static void gen6_ppgtt_info(struct seq_file *m, struct drm_device *dev)
2301 2267
2302static int i915_ppgtt_info(struct seq_file *m, void *data) 2268static int i915_ppgtt_info(struct seq_file *m, void *data)
2303{ 2269{
2304 struct drm_info_node *node = m->private; 2270 struct drm_i915_private *dev_priv = node_to_i915(m->private);
2305 struct drm_device *dev = node->minor->dev; 2271 struct drm_device *dev = &dev_priv->drm;
2306 struct drm_i915_private *dev_priv = to_i915(dev);
2307 struct drm_file *file; 2272 struct drm_file *file;
2308 2273
2309 int ret = mutex_lock_interruptible(&dev->struct_mutex); 2274 int ret = mutex_lock_interruptible(&dev->struct_mutex);
@@ -2311,10 +2276,10 @@ static int i915_ppgtt_info(struct seq_file *m, void *data)
2311 return ret; 2276 return ret;
2312 intel_runtime_pm_get(dev_priv); 2277 intel_runtime_pm_get(dev_priv);
2313 2278
2314 if (INTEL_INFO(dev)->gen >= 8) 2279 if (INTEL_GEN(dev_priv) >= 8)
2315 gen8_ppgtt_info(m, dev); 2280 gen8_ppgtt_info(m, dev_priv);
2316 else if (INTEL_INFO(dev)->gen >= 6) 2281 else if (INTEL_GEN(dev_priv) >= 6)
2317 gen6_ppgtt_info(m, dev); 2282 gen6_ppgtt_info(m, dev_priv);
2318 2283
2319 mutex_lock(&dev->filelist_mutex); 2284 mutex_lock(&dev->filelist_mutex);
2320 list_for_each_entry_reverse(file, &dev->filelist, lhead) { 2285 list_for_each_entry_reverse(file, &dev->filelist, lhead) {
@@ -2367,9 +2332,8 @@ static const char *rps_power_to_str(unsigned int power)
2367 2332
2368static int i915_rps_boost_info(struct seq_file *m, void *data) 2333static int i915_rps_boost_info(struct seq_file *m, void *data)
2369{ 2334{
2370 struct drm_info_node *node = m->private; 2335 struct drm_i915_private *dev_priv = node_to_i915(m->private);
2371 struct drm_device *dev = node->minor->dev; 2336 struct drm_device *dev = &dev_priv->drm;
2372 struct drm_i915_private *dev_priv = to_i915(dev);
2373 struct drm_file *file; 2337 struct drm_file *file;
2374 2338
2375 seq_printf(m, "RPS enabled? %d\n", dev_priv->rps.enabled); 2339 seq_printf(m, "RPS enabled? %d\n", dev_priv->rps.enabled);
@@ -2437,12 +2401,10 @@ static int i915_rps_boost_info(struct seq_file *m, void *data)
2437 2401
2438static int i915_llc(struct seq_file *m, void *data) 2402static int i915_llc(struct seq_file *m, void *data)
2439{ 2403{
2440 struct drm_info_node *node = m->private; 2404 struct drm_i915_private *dev_priv = node_to_i915(m->private);
2441 struct drm_device *dev = node->minor->dev;
2442 struct drm_i915_private *dev_priv = to_i915(dev);
2443 const bool edram = INTEL_GEN(dev_priv) > 8; 2405 const bool edram = INTEL_GEN(dev_priv) > 8;
2444 2406
2445 seq_printf(m, "LLC: %s\n", yesno(HAS_LLC(dev))); 2407 seq_printf(m, "LLC: %s\n", yesno(HAS_LLC(dev_priv)));
2446 seq_printf(m, "%s: %lluMB\n", edram ? "eDRAM" : "eLLC", 2408 seq_printf(m, "%s: %lluMB\n", edram ? "eDRAM" : "eLLC",
2447 intel_uncore_edram_size(dev_priv)/1024/1024); 2409 intel_uncore_edram_size(dev_priv)/1024/1024);
2448 2410
@@ -2451,8 +2413,7 @@ static int i915_llc(struct seq_file *m, void *data)
2451 2413
2452static int i915_guc_load_status_info(struct seq_file *m, void *data) 2414static int i915_guc_load_status_info(struct seq_file *m, void *data)
2453{ 2415{
2454 struct drm_info_node *node = m->private; 2416 struct drm_i915_private *dev_priv = node_to_i915(m->private);
2455 struct drm_i915_private *dev_priv = to_i915(node->minor->dev);
2456 struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw; 2417 struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw;
2457 u32 tmp, i; 2418 u32 tmp, i;
2458 2419
@@ -2523,9 +2484,8 @@ static void i915_guc_client_info(struct seq_file *m,
2523 2484
2524static int i915_guc_info(struct seq_file *m, void *data) 2485static int i915_guc_info(struct seq_file *m, void *data)
2525{ 2486{
2526 struct drm_info_node *node = m->private; 2487 struct drm_i915_private *dev_priv = node_to_i915(m->private);
2527 struct drm_device *dev = node->minor->dev; 2488 struct drm_device *dev = &dev_priv->drm;
2528 struct drm_i915_private *dev_priv = to_i915(dev);
2529 struct intel_guc guc; 2489 struct intel_guc guc;
2530 struct i915_guc_client client = {}; 2490 struct i915_guc_client client = {};
2531 struct intel_engine_cs *engine; 2491 struct intel_engine_cs *engine;
@@ -2574,9 +2534,7 @@ static int i915_guc_info(struct seq_file *m, void *data)
2574 2534
2575static int i915_guc_log_dump(struct seq_file *m, void *data) 2535static int i915_guc_log_dump(struct seq_file *m, void *data)
2576{ 2536{
2577 struct drm_info_node *node = m->private; 2537 struct drm_i915_private *dev_priv = node_to_i915(m->private);
2578 struct drm_device *dev = node->minor->dev;
2579 struct drm_i915_private *dev_priv = to_i915(dev);
2580 struct drm_i915_gem_object *obj; 2538 struct drm_i915_gem_object *obj;
2581 int i = 0, pg; 2539 int i = 0, pg;
2582 2540
@@ -2602,15 +2560,13 @@ static int i915_guc_log_dump(struct seq_file *m, void *data)
2602 2560
2603static int i915_edp_psr_status(struct seq_file *m, void *data) 2561static int i915_edp_psr_status(struct seq_file *m, void *data)
2604{ 2562{
2605 struct drm_info_node *node = m->private; 2563 struct drm_i915_private *dev_priv = node_to_i915(m->private);
2606 struct drm_device *dev = node->minor->dev;
2607 struct drm_i915_private *dev_priv = to_i915(dev);
2608 u32 psrperf = 0; 2564 u32 psrperf = 0;
2609 u32 stat[3]; 2565 u32 stat[3];
2610 enum pipe pipe; 2566 enum pipe pipe;
2611 bool enabled = false; 2567 bool enabled = false;
2612 2568
2613 if (!HAS_PSR(dev)) { 2569 if (!HAS_PSR(dev_priv)) {
2614 seq_puts(m, "PSR not supported\n"); 2570 seq_puts(m, "PSR not supported\n");
2615 return 0; 2571 return 0;
2616 } 2572 }
@@ -2627,7 +2583,7 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
2627 seq_printf(m, "Re-enable work scheduled: %s\n", 2583 seq_printf(m, "Re-enable work scheduled: %s\n",
2628 yesno(work_busy(&dev_priv->psr.work.work))); 2584 yesno(work_busy(&dev_priv->psr.work.work)));
2629 2585
2630 if (HAS_DDI(dev)) 2586 if (HAS_DDI(dev_priv))
2631 enabled = I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE; 2587 enabled = I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE;
2632 else { 2588 else {
2633 for_each_pipe(dev_priv, pipe) { 2589 for_each_pipe(dev_priv, pipe) {
@@ -2644,7 +2600,7 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
2644 2600
2645 seq_printf(m, "HW Enabled & Active bit: %s", yesno(enabled)); 2601 seq_printf(m, "HW Enabled & Active bit: %s", yesno(enabled));
2646 2602
2647 if (!HAS_DDI(dev)) 2603 if (!HAS_DDI(dev_priv))
2648 for_each_pipe(dev_priv, pipe) { 2604 for_each_pipe(dev_priv, pipe) {
2649 if ((stat[pipe] == VLV_EDP_PSR_ACTIVE_NORFB_UP) || 2605 if ((stat[pipe] == VLV_EDP_PSR_ACTIVE_NORFB_UP) ||
2650 (stat[pipe] == VLV_EDP_PSR_ACTIVE_SF_UPDATE)) 2606 (stat[pipe] == VLV_EDP_PSR_ACTIVE_SF_UPDATE))
@@ -2656,7 +2612,7 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
2656 * VLV/CHV PSR has no kind of performance counter 2612 * VLV/CHV PSR has no kind of performance counter
2657 * SKL+ Perf counter is reset to 0 everytime DC state is entered 2613 * SKL+ Perf counter is reset to 0 everytime DC state is entered
2658 */ 2614 */
2659 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { 2615 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
2660 psrperf = I915_READ(EDP_PSR_PERF_CNT) & 2616 psrperf = I915_READ(EDP_PSR_PERF_CNT) &
2661 EDP_PSR_PERF_CNT_MASK; 2617 EDP_PSR_PERF_CNT_MASK;
2662 2618
@@ -2670,8 +2626,8 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
2670 2626
2671static int i915_sink_crc(struct seq_file *m, void *data) 2627static int i915_sink_crc(struct seq_file *m, void *data)
2672{ 2628{
2673 struct drm_info_node *node = m->private; 2629 struct drm_i915_private *dev_priv = node_to_i915(m->private);
2674 struct drm_device *dev = node->minor->dev; 2630 struct drm_device *dev = &dev_priv->drm;
2675 struct intel_connector *connector; 2631 struct intel_connector *connector;
2676 struct intel_dp *intel_dp = NULL; 2632 struct intel_dp *intel_dp = NULL;
2677 int ret; 2633 int ret;
@@ -2710,13 +2666,11 @@ out:
2710 2666
2711static int i915_energy_uJ(struct seq_file *m, void *data) 2667static int i915_energy_uJ(struct seq_file *m, void *data)
2712{ 2668{
2713 struct drm_info_node *node = m->private; 2669 struct drm_i915_private *dev_priv = node_to_i915(m->private);
2714 struct drm_device *dev = node->minor->dev;
2715 struct drm_i915_private *dev_priv = to_i915(dev);
2716 u64 power; 2670 u64 power;
2717 u32 units; 2671 u32 units;
2718 2672
2719 if (INTEL_INFO(dev)->gen < 6) 2673 if (INTEL_GEN(dev_priv) < 6)
2720 return -ENODEV; 2674 return -ENODEV;
2721 2675
2722 intel_runtime_pm_get(dev_priv); 2676 intel_runtime_pm_get(dev_priv);
@@ -2736,9 +2690,7 @@ static int i915_energy_uJ(struct seq_file *m, void *data)
2736 2690
2737static int i915_runtime_pm_status(struct seq_file *m, void *unused) 2691static int i915_runtime_pm_status(struct seq_file *m, void *unused)
2738{ 2692{
2739 struct drm_info_node *node = m->private; 2693 struct drm_i915_private *dev_priv = node_to_i915(m->private);
2740 struct drm_device *dev = node->minor->dev;
2741 struct drm_i915_private *dev_priv = to_i915(dev);
2742 struct pci_dev *pdev = dev_priv->drm.pdev; 2694 struct pci_dev *pdev = dev_priv->drm.pdev;
2743 2695
2744 if (!HAS_RUNTIME_PM(dev_priv)) 2696 if (!HAS_RUNTIME_PM(dev_priv))
@@ -2749,7 +2701,7 @@ static int i915_runtime_pm_status(struct seq_file *m, void *unused)
2749 yesno(!intel_irqs_enabled(dev_priv))); 2701 yesno(!intel_irqs_enabled(dev_priv)));
2750#ifdef CONFIG_PM 2702#ifdef CONFIG_PM
2751 seq_printf(m, "Usage count: %d\n", 2703 seq_printf(m, "Usage count: %d\n",
2752 atomic_read(&dev->dev->power.usage_count)); 2704 atomic_read(&dev_priv->drm.dev->power.usage_count));
2753#else 2705#else
2754 seq_printf(m, "Device Power Management (CONFIG_PM) disabled\n"); 2706 seq_printf(m, "Device Power Management (CONFIG_PM) disabled\n");
2755#endif 2707#endif
@@ -2762,9 +2714,7 @@ static int i915_runtime_pm_status(struct seq_file *m, void *unused)
2762 2714
2763static int i915_power_domain_info(struct seq_file *m, void *unused) 2715static int i915_power_domain_info(struct seq_file *m, void *unused)
2764{ 2716{
2765 struct drm_info_node *node = m->private; 2717 struct drm_i915_private *dev_priv = node_to_i915(m->private);
2766 struct drm_device *dev = node->minor->dev;
2767 struct drm_i915_private *dev_priv = to_i915(dev);
2768 struct i915_power_domains *power_domains = &dev_priv->power_domains; 2718 struct i915_power_domains *power_domains = &dev_priv->power_domains;
2769 int i; 2719 int i;
2770 2720
@@ -2797,12 +2747,10 @@ static int i915_power_domain_info(struct seq_file *m, void *unused)
2797 2747
2798static int i915_dmc_info(struct seq_file *m, void *unused) 2748static int i915_dmc_info(struct seq_file *m, void *unused)
2799{ 2749{
2800 struct drm_info_node *node = m->private; 2750 struct drm_i915_private *dev_priv = node_to_i915(m->private);
2801 struct drm_device *dev = node->minor->dev;
2802 struct drm_i915_private *dev_priv = to_i915(dev);
2803 struct intel_csr *csr; 2751 struct intel_csr *csr;
2804 2752
2805 if (!HAS_CSR(dev)) { 2753 if (!HAS_CSR(dev_priv)) {
2806 seq_puts(m, "not supported\n"); 2754 seq_puts(m, "not supported\n");
2807 return 0; 2755 return 0;
2808 } 2756 }
@@ -2820,12 +2768,12 @@ static int i915_dmc_info(struct seq_file *m, void *unused)
2820 seq_printf(m, "version: %d.%d\n", CSR_VERSION_MAJOR(csr->version), 2768 seq_printf(m, "version: %d.%d\n", CSR_VERSION_MAJOR(csr->version),
2821 CSR_VERSION_MINOR(csr->version)); 2769 CSR_VERSION_MINOR(csr->version));
2822 2770
2823 if (IS_SKYLAKE(dev) && csr->version >= CSR_VERSION(1, 6)) { 2771 if (IS_SKYLAKE(dev_priv) && csr->version >= CSR_VERSION(1, 6)) {
2824 seq_printf(m, "DC3 -> DC5 count: %d\n", 2772 seq_printf(m, "DC3 -> DC5 count: %d\n",
2825 I915_READ(SKL_CSR_DC3_DC5_COUNT)); 2773 I915_READ(SKL_CSR_DC3_DC5_COUNT));
2826 seq_printf(m, "DC5 -> DC6 count: %d\n", 2774 seq_printf(m, "DC5 -> DC6 count: %d\n",
2827 I915_READ(SKL_CSR_DC5_DC6_COUNT)); 2775 I915_READ(SKL_CSR_DC5_DC6_COUNT));
2828 } else if (IS_BROXTON(dev) && csr->version >= CSR_VERSION(1, 4)) { 2776 } else if (IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) {
2829 seq_printf(m, "DC3 -> DC5 count: %d\n", 2777 seq_printf(m, "DC3 -> DC5 count: %d\n",
2830 I915_READ(BXT_CSR_DC3_DC5_COUNT)); 2778 I915_READ(BXT_CSR_DC3_DC5_COUNT));
2831 } 2779 }
@@ -2862,8 +2810,8 @@ static void intel_encoder_info(struct seq_file *m,
2862 struct intel_crtc *intel_crtc, 2810 struct intel_crtc *intel_crtc,
2863 struct intel_encoder *intel_encoder) 2811 struct intel_encoder *intel_encoder)
2864{ 2812{
2865 struct drm_info_node *node = m->private; 2813 struct drm_i915_private *dev_priv = node_to_i915(m->private);
2866 struct drm_device *dev = node->minor->dev; 2814 struct drm_device *dev = &dev_priv->drm;
2867 struct drm_crtc *crtc = &intel_crtc->base; 2815 struct drm_crtc *crtc = &intel_crtc->base;
2868 struct intel_connector *intel_connector; 2816 struct intel_connector *intel_connector;
2869 struct drm_encoder *encoder; 2817 struct drm_encoder *encoder;
@@ -2889,8 +2837,8 @@ static void intel_encoder_info(struct seq_file *m,
2889 2837
2890static void intel_crtc_info(struct seq_file *m, struct intel_crtc *intel_crtc) 2838static void intel_crtc_info(struct seq_file *m, struct intel_crtc *intel_crtc)
2891{ 2839{
2892 struct drm_info_node *node = m->private; 2840 struct drm_i915_private *dev_priv = node_to_i915(m->private);
2893 struct drm_device *dev = node->minor->dev; 2841 struct drm_device *dev = &dev_priv->drm;
2894 struct drm_crtc *crtc = &intel_crtc->base; 2842 struct drm_crtc *crtc = &intel_crtc->base;
2895 struct intel_encoder *intel_encoder; 2843 struct intel_encoder *intel_encoder;
2896 struct drm_plane_state *plane_state = crtc->primary->state; 2844 struct drm_plane_state *plane_state = crtc->primary->state;
@@ -2988,12 +2936,11 @@ static void intel_connector_info(struct seq_file *m,
2988 intel_seq_print_mode(m, 2, mode); 2936 intel_seq_print_mode(m, 2, mode);
2989} 2937}
2990 2938
2991static bool cursor_active(struct drm_device *dev, int pipe) 2939static bool cursor_active(struct drm_i915_private *dev_priv, int pipe)
2992{ 2940{
2993 struct drm_i915_private *dev_priv = to_i915(dev);
2994 u32 state; 2941 u32 state;
2995 2942
2996 if (IS_845G(dev) || IS_I865G(dev)) 2943 if (IS_845G(dev_priv) || IS_I865G(dev_priv))
2997 state = I915_READ(CURCNTR(PIPE_A)) & CURSOR_ENABLE; 2944 state = I915_READ(CURCNTR(PIPE_A)) & CURSOR_ENABLE;
2998 else 2945 else
2999 state = I915_READ(CURCNTR(pipe)) & CURSOR_MODE; 2946 state = I915_READ(CURCNTR(pipe)) & CURSOR_MODE;
@@ -3001,9 +2948,9 @@ static bool cursor_active(struct drm_device *dev, int pipe)
3001 return state; 2948 return state;
3002} 2949}
3003 2950
3004static bool cursor_position(struct drm_device *dev, int pipe, int *x, int *y) 2951static bool cursor_position(struct drm_i915_private *dev_priv,
2952 int pipe, int *x, int *y)
3005{ 2953{
3006 struct drm_i915_private *dev_priv = to_i915(dev);
3007 u32 pos; 2954 u32 pos;
3008 2955
3009 pos = I915_READ(CURPOS(pipe)); 2956 pos = I915_READ(CURPOS(pipe));
@@ -3016,7 +2963,7 @@ static bool cursor_position(struct drm_device *dev, int pipe, int *x, int *y)
3016 if (pos & (CURSOR_POS_SIGN << CURSOR_Y_SHIFT)) 2963 if (pos & (CURSOR_POS_SIGN << CURSOR_Y_SHIFT))
3017 *y = -*y; 2964 *y = -*y;
3018 2965
3019 return cursor_active(dev, pipe); 2966 return cursor_active(dev_priv, pipe);
3020} 2967}
3021 2968
3022static const char *plane_type(enum drm_plane_type type) 2969static const char *plane_type(enum drm_plane_type type)
@@ -3059,8 +3006,8 @@ static const char *plane_rotation(unsigned int rotation)
3059 3006
3060static void intel_plane_info(struct seq_file *m, struct intel_crtc *intel_crtc) 3007static void intel_plane_info(struct seq_file *m, struct intel_crtc *intel_crtc)
3061{ 3008{
3062 struct drm_info_node *node = m->private; 3009 struct drm_i915_private *dev_priv = node_to_i915(m->private);
3063 struct drm_device *dev = node->minor->dev; 3010 struct drm_device *dev = &dev_priv->drm;
3064 struct intel_plane *intel_plane; 3011 struct intel_plane *intel_plane;
3065 3012
3066 for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { 3013 for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
@@ -3122,9 +3069,8 @@ static void intel_scaler_info(struct seq_file *m, struct intel_crtc *intel_crtc)
3122 3069
3123static int i915_display_info(struct seq_file *m, void *unused) 3070static int i915_display_info(struct seq_file *m, void *unused)
3124{ 3071{
3125 struct drm_info_node *node = m->private; 3072 struct drm_i915_private *dev_priv = node_to_i915(m->private);
3126 struct drm_device *dev = node->minor->dev; 3073 struct drm_device *dev = &dev_priv->drm;
3127 struct drm_i915_private *dev_priv = to_i915(dev);
3128 struct intel_crtc *crtc; 3074 struct intel_crtc *crtc;
3129 struct drm_connector *connector; 3075 struct drm_connector *connector;
3130 3076
@@ -3148,7 +3094,7 @@ static int i915_display_info(struct seq_file *m, void *unused)
3148 if (pipe_config->base.active) { 3094 if (pipe_config->base.active) {
3149 intel_crtc_info(m, crtc); 3095 intel_crtc_info(m, crtc);
3150 3096
3151 active = cursor_position(dev, crtc->pipe, &x, &y); 3097 active = cursor_position(dev_priv, crtc->pipe, &x, &y);
3152 seq_printf(m, "\tcursor visible? %s, position (%d, %d), size %dx%d, addr 0x%08x, active? %s\n", 3098 seq_printf(m, "\tcursor visible? %s, position (%d, %d), size %dx%d, addr 0x%08x, active? %s\n",
3153 yesno(crtc->cursor_base), 3099 yesno(crtc->cursor_base),
3154 x, y, crtc->base.cursor->state->crtc_w, 3100 x, y, crtc->base.cursor->state->crtc_w,
@@ -3177,11 +3123,10 @@ static int i915_display_info(struct seq_file *m, void *unused)
3177 3123
3178static int i915_semaphore_status(struct seq_file *m, void *unused) 3124static int i915_semaphore_status(struct seq_file *m, void *unused)
3179{ 3125{
3180 struct drm_info_node *node = (struct drm_info_node *) m->private; 3126 struct drm_i915_private *dev_priv = node_to_i915(m->private);
3181 struct drm_device *dev = node->minor->dev; 3127 struct drm_device *dev = &dev_priv->drm;
3182 struct drm_i915_private *dev_priv = to_i915(dev);
3183 struct intel_engine_cs *engine; 3128 struct intel_engine_cs *engine;
3184 int num_rings = INTEL_INFO(dev)->num_rings; 3129 int num_rings = INTEL_INFO(dev_priv)->num_rings;
3185 enum intel_engine_id id; 3130 enum intel_engine_id id;
3186 int j, ret; 3131 int j, ret;
3187 3132
@@ -3195,7 +3140,7 @@ static int i915_semaphore_status(struct seq_file *m, void *unused)
3195 return ret; 3140 return ret;
3196 intel_runtime_pm_get(dev_priv); 3141 intel_runtime_pm_get(dev_priv);
3197 3142
3198 if (IS_BROADWELL(dev)) { 3143 if (IS_BROADWELL(dev_priv)) {
3199 struct page *page; 3144 struct page *page;
3200 uint64_t *seqno; 3145 uint64_t *seqno;
3201 3146
@@ -3250,9 +3195,8 @@ static int i915_semaphore_status(struct seq_file *m, void *unused)
3250 3195
3251static int i915_shared_dplls_info(struct seq_file *m, void *unused) 3196static int i915_shared_dplls_info(struct seq_file *m, void *unused)
3252{ 3197{
3253 struct drm_info_node *node = (struct drm_info_node *) m->private; 3198 struct drm_i915_private *dev_priv = node_to_i915(m->private);
3254 struct drm_device *dev = node->minor->dev; 3199 struct drm_device *dev = &dev_priv->drm;
3255 struct drm_i915_private *dev_priv = to_i915(dev);
3256 int i; 3200 int i;
3257 3201
3258 drm_modeset_lock_all(dev); 3202 drm_modeset_lock_all(dev);
@@ -3280,9 +3224,8 @@ static int i915_wa_registers(struct seq_file *m, void *unused)
3280 int i; 3224 int i;
3281 int ret; 3225 int ret;
3282 struct intel_engine_cs *engine; 3226 struct intel_engine_cs *engine;
3283 struct drm_info_node *node = (struct drm_info_node *) m->private; 3227 struct drm_i915_private *dev_priv = node_to_i915(m->private);
3284 struct drm_device *dev = node->minor->dev; 3228 struct drm_device *dev = &dev_priv->drm;
3285 struct drm_i915_private *dev_priv = to_i915(dev);
3286 struct i915_workarounds *workarounds = &dev_priv->workarounds; 3229 struct i915_workarounds *workarounds = &dev_priv->workarounds;
3287 enum intel_engine_id id; 3230 enum intel_engine_id id;
3288 3231
@@ -3318,15 +3261,14 @@ static int i915_wa_registers(struct seq_file *m, void *unused)
3318 3261
3319static int i915_ddb_info(struct seq_file *m, void *unused) 3262static int i915_ddb_info(struct seq_file *m, void *unused)
3320{ 3263{
3321 struct drm_info_node *node = m->private; 3264 struct drm_i915_private *dev_priv = node_to_i915(m->private);
3322 struct drm_device *dev = node->minor->dev; 3265 struct drm_device *dev = &dev_priv->drm;
3323 struct drm_i915_private *dev_priv = to_i915(dev);
3324 struct skl_ddb_allocation *ddb; 3266 struct skl_ddb_allocation *ddb;
3325 struct skl_ddb_entry *entry; 3267 struct skl_ddb_entry *entry;
3326 enum pipe pipe; 3268 enum pipe pipe;
3327 int plane; 3269 int plane;
3328 3270
3329 if (INTEL_INFO(dev)->gen < 9) 3271 if (INTEL_GEN(dev_priv) < 9)
3330 return 0; 3272 return 0;
3331 3273
3332 drm_modeset_lock_all(dev); 3274 drm_modeset_lock_all(dev);
@@ -3356,7 +3298,8 @@ static int i915_ddb_info(struct seq_file *m, void *unused)
3356} 3298}
3357 3299
3358static void drrs_status_per_crtc(struct seq_file *m, 3300static void drrs_status_per_crtc(struct seq_file *m,
3359 struct drm_device *dev, struct intel_crtc *intel_crtc) 3301 struct drm_device *dev,
3302 struct intel_crtc *intel_crtc)
3360{ 3303{
3361 struct drm_i915_private *dev_priv = to_i915(dev); 3304 struct drm_i915_private *dev_priv = to_i915(dev);
3362 struct i915_drrs *drrs = &dev_priv->drrs; 3305 struct i915_drrs *drrs = &dev_priv->drrs;
@@ -3425,8 +3368,8 @@ static void drrs_status_per_crtc(struct seq_file *m,
3425 3368
3426static int i915_drrs_status(struct seq_file *m, void *unused) 3369static int i915_drrs_status(struct seq_file *m, void *unused)
3427{ 3370{
3428 struct drm_info_node *node = m->private; 3371 struct drm_i915_private *dev_priv = node_to_i915(m->private);
3429 struct drm_device *dev = node->minor->dev; 3372 struct drm_device *dev = &dev_priv->drm;
3430 struct intel_crtc *intel_crtc; 3373 struct intel_crtc *intel_crtc;
3431 int active_crtc_cnt = 0; 3374 int active_crtc_cnt = 0;
3432 3375
@@ -3449,14 +3392,14 @@ static int i915_drrs_status(struct seq_file *m, void *unused)
3449 3392
3450struct pipe_crc_info { 3393struct pipe_crc_info {
3451 const char *name; 3394 const char *name;
3452 struct drm_device *dev; 3395 struct drm_i915_private *dev_priv;
3453 enum pipe pipe; 3396 enum pipe pipe;
3454}; 3397};
3455 3398
3456static int i915_dp_mst_info(struct seq_file *m, void *unused) 3399static int i915_dp_mst_info(struct seq_file *m, void *unused)
3457{ 3400{
3458 struct drm_info_node *node = (struct drm_info_node *) m->private; 3401 struct drm_i915_private *dev_priv = node_to_i915(m->private);
3459 struct drm_device *dev = node->minor->dev; 3402 struct drm_device *dev = &dev_priv->drm;
3460 struct intel_encoder *intel_encoder; 3403 struct intel_encoder *intel_encoder;
3461 struct intel_digital_port *intel_dig_port; 3404 struct intel_digital_port *intel_dig_port;
3462 struct drm_connector *connector; 3405 struct drm_connector *connector;
@@ -3485,10 +3428,10 @@ static int i915_dp_mst_info(struct seq_file *m, void *unused)
3485static int i915_pipe_crc_open(struct inode *inode, struct file *filep) 3428static int i915_pipe_crc_open(struct inode *inode, struct file *filep)
3486{ 3429{
3487 struct pipe_crc_info *info = inode->i_private; 3430 struct pipe_crc_info *info = inode->i_private;
3488 struct drm_i915_private *dev_priv = to_i915(info->dev); 3431 struct drm_i915_private *dev_priv = info->dev_priv;
3489 struct intel_pipe_crc *pipe_crc = &dev_priv->pipe_crc[info->pipe]; 3432 struct intel_pipe_crc *pipe_crc = &dev_priv->pipe_crc[info->pipe];
3490 3433
3491 if (info->pipe >= INTEL_INFO(info->dev)->num_pipes) 3434 if (info->pipe >= INTEL_INFO(dev_priv)->num_pipes)
3492 return -ENODEV; 3435 return -ENODEV;
3493 3436
3494 spin_lock_irq(&pipe_crc->lock); 3437 spin_lock_irq(&pipe_crc->lock);
@@ -3509,7 +3452,7 @@ static int i915_pipe_crc_open(struct inode *inode, struct file *filep)
3509static int i915_pipe_crc_release(struct inode *inode, struct file *filep) 3452static int i915_pipe_crc_release(struct inode *inode, struct file *filep)
3510{ 3453{
3511 struct pipe_crc_info *info = inode->i_private; 3454 struct pipe_crc_info *info = inode->i_private;
3512 struct drm_i915_private *dev_priv = to_i915(info->dev); 3455 struct drm_i915_private *dev_priv = info->dev_priv;
3513 struct intel_pipe_crc *pipe_crc = &dev_priv->pipe_crc[info->pipe]; 3456 struct intel_pipe_crc *pipe_crc = &dev_priv->pipe_crc[info->pipe];
3514 3457
3515 spin_lock_irq(&pipe_crc->lock); 3458 spin_lock_irq(&pipe_crc->lock);
@@ -3536,8 +3479,7 @@ i915_pipe_crc_read(struct file *filep, char __user *user_buf, size_t count,
3536 loff_t *pos) 3479 loff_t *pos)
3537{ 3480{
3538 struct pipe_crc_info *info = filep->private_data; 3481 struct pipe_crc_info *info = filep->private_data;
3539 struct drm_device *dev = info->dev; 3482 struct drm_i915_private *dev_priv = info->dev_priv;
3540 struct drm_i915_private *dev_priv = to_i915(dev);
3541 struct intel_pipe_crc *pipe_crc = &dev_priv->pipe_crc[info->pipe]; 3483 struct intel_pipe_crc *pipe_crc = &dev_priv->pipe_crc[info->pipe];
3542 char buf[PIPE_CRC_BUFFER_LEN]; 3484 char buf[PIPE_CRC_BUFFER_LEN];
3543 int n_entries; 3485 int n_entries;
@@ -3633,11 +3575,11 @@ static struct pipe_crc_info i915_pipe_crc_data[I915_MAX_PIPES] = {
3633static int i915_pipe_crc_create(struct dentry *root, struct drm_minor *minor, 3575static int i915_pipe_crc_create(struct dentry *root, struct drm_minor *minor,
3634 enum pipe pipe) 3576 enum pipe pipe)
3635{ 3577{
3636 struct drm_device *dev = minor->dev; 3578 struct drm_i915_private *dev_priv = to_i915(minor->dev);
3637 struct dentry *ent; 3579 struct dentry *ent;
3638 struct pipe_crc_info *info = &i915_pipe_crc_data[pipe]; 3580 struct pipe_crc_info *info = &i915_pipe_crc_data[pipe];
3639 3581
3640 info->dev = dev; 3582 info->dev_priv = dev_priv;
3641 ent = debugfs_create_file(info->name, S_IRUGO, root, info, 3583 ent = debugfs_create_file(info->name, S_IRUGO, root, info,
3642 &i915_pipe_crc_fops); 3584 &i915_pipe_crc_fops);
3643 if (!ent) 3585 if (!ent)
@@ -3667,8 +3609,7 @@ static const char *pipe_crc_source_name(enum intel_pipe_crc_source source)
3667 3609
3668static int display_crc_ctl_show(struct seq_file *m, void *data) 3610static int display_crc_ctl_show(struct seq_file *m, void *data)
3669{ 3611{
3670 struct drm_device *dev = m->private; 3612 struct drm_i915_private *dev_priv = m->private;
3671 struct drm_i915_private *dev_priv = to_i915(dev);
3672 int i; 3613 int i;
3673 3614
3674 for (i = 0; i < I915_MAX_PIPES; i++) 3615 for (i = 0; i < I915_MAX_PIPES; i++)
@@ -3680,9 +3621,7 @@ static int display_crc_ctl_show(struct seq_file *m, void *data)
3680 3621
3681static int display_crc_ctl_open(struct inode *inode, struct file *file) 3622static int display_crc_ctl_open(struct inode *inode, struct file *file)
3682{ 3623{
3683 struct drm_device *dev = inode->i_private; 3624 return single_open(file, display_crc_ctl_show, inode->i_private);
3684
3685 return single_open(file, display_crc_ctl_show, dev);
3686} 3625}
3687 3626
3688static int i8xx_pipe_crc_ctl_reg(enum intel_pipe_crc_source *source, 3627static int i8xx_pipe_crc_ctl_reg(enum intel_pipe_crc_source *source,
@@ -3705,9 +3644,11 @@ static int i8xx_pipe_crc_ctl_reg(enum intel_pipe_crc_source *source,
3705 return 0; 3644 return 0;
3706} 3645}
3707 3646
3708static int i9xx_pipe_crc_auto_source(struct drm_device *dev, enum pipe pipe, 3647static int i9xx_pipe_crc_auto_source(struct drm_i915_private *dev_priv,
3648 enum pipe pipe,
3709 enum intel_pipe_crc_source *source) 3649 enum intel_pipe_crc_source *source)
3710{ 3650{
3651 struct drm_device *dev = &dev_priv->drm;
3711 struct intel_encoder *encoder; 3652 struct intel_encoder *encoder;
3712 struct intel_crtc *crtc; 3653 struct intel_crtc *crtc;
3713 struct intel_digital_port *dig_port; 3654 struct intel_digital_port *dig_port;
@@ -3757,16 +3698,15 @@ static int i9xx_pipe_crc_auto_source(struct drm_device *dev, enum pipe pipe,
3757 return ret; 3698 return ret;
3758} 3699}
3759 3700
3760static int vlv_pipe_crc_ctl_reg(struct drm_device *dev, 3701static int vlv_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv,
3761 enum pipe pipe, 3702 enum pipe pipe,
3762 enum intel_pipe_crc_source *source, 3703 enum intel_pipe_crc_source *source,
3763 uint32_t *val) 3704 uint32_t *val)
3764{ 3705{
3765 struct drm_i915_private *dev_priv = to_i915(dev);
3766 bool need_stable_symbols = false; 3706 bool need_stable_symbols = false;
3767 3707
3768 if (*source == INTEL_PIPE_CRC_SOURCE_AUTO) { 3708 if (*source == INTEL_PIPE_CRC_SOURCE_AUTO) {
3769 int ret = i9xx_pipe_crc_auto_source(dev, pipe, source); 3709 int ret = i9xx_pipe_crc_auto_source(dev_priv, pipe, source);
3770 if (ret) 3710 if (ret)
3771 return ret; 3711 return ret;
3772 } 3712 }
@@ -3784,7 +3724,7 @@ static int vlv_pipe_crc_ctl_reg(struct drm_device *dev,
3784 need_stable_symbols = true; 3724 need_stable_symbols = true;
3785 break; 3725 break;
3786 case INTEL_PIPE_CRC_SOURCE_DP_D: 3726 case INTEL_PIPE_CRC_SOURCE_DP_D:
3787 if (!IS_CHERRYVIEW(dev)) 3727 if (!IS_CHERRYVIEW(dev_priv))
3788 return -EINVAL; 3728 return -EINVAL;
3789 *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DP_D_VLV; 3729 *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DP_D_VLV;
3790 need_stable_symbols = true; 3730 need_stable_symbols = true;
@@ -3828,16 +3768,15 @@ static int vlv_pipe_crc_ctl_reg(struct drm_device *dev,
3828 return 0; 3768 return 0;
3829} 3769}
3830 3770
3831static int i9xx_pipe_crc_ctl_reg(struct drm_device *dev, 3771static int i9xx_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv,
3832 enum pipe pipe, 3772 enum pipe pipe,
3833 enum intel_pipe_crc_source *source, 3773 enum intel_pipe_crc_source *source,
3834 uint32_t *val) 3774 uint32_t *val)
3835{ 3775{
3836 struct drm_i915_private *dev_priv = to_i915(dev);
3837 bool need_stable_symbols = false; 3776 bool need_stable_symbols = false;
3838 3777
3839 if (*source == INTEL_PIPE_CRC_SOURCE_AUTO) { 3778 if (*source == INTEL_PIPE_CRC_SOURCE_AUTO) {
3840 int ret = i9xx_pipe_crc_auto_source(dev, pipe, source); 3779 int ret = i9xx_pipe_crc_auto_source(dev_priv, pipe, source);
3841 if (ret) 3780 if (ret)
3842 return ret; 3781 return ret;
3843 } 3782 }
@@ -3847,24 +3786,24 @@ static int i9xx_pipe_crc_ctl_reg(struct drm_device *dev,
3847 *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PIPE_I9XX; 3786 *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PIPE_I9XX;
3848 break; 3787 break;
3849 case INTEL_PIPE_CRC_SOURCE_TV: 3788 case INTEL_PIPE_CRC_SOURCE_TV:
3850 if (!SUPPORTS_TV(dev)) 3789 if (!SUPPORTS_TV(dev_priv))
3851 return -EINVAL; 3790 return -EINVAL;
3852 *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_TV_PRE; 3791 *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_TV_PRE;
3853 break; 3792 break;
3854 case INTEL_PIPE_CRC_SOURCE_DP_B: 3793 case INTEL_PIPE_CRC_SOURCE_DP_B:
3855 if (!IS_G4X(dev)) 3794 if (!IS_G4X(dev_priv))
3856 return -EINVAL; 3795 return -EINVAL;
3857 *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DP_B_G4X; 3796 *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DP_B_G4X;
3858 need_stable_symbols = true; 3797 need_stable_symbols = true;
3859 break; 3798 break;
3860 case INTEL_PIPE_CRC_SOURCE_DP_C: 3799 case INTEL_PIPE_CRC_SOURCE_DP_C:
3861 if (!IS_G4X(dev)) 3800 if (!IS_G4X(dev_priv))
3862 return -EINVAL; 3801 return -EINVAL;
3863 *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DP_C_G4X; 3802 *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DP_C_G4X;
3864 need_stable_symbols = true; 3803 need_stable_symbols = true;
3865 break; 3804 break;
3866 case INTEL_PIPE_CRC_SOURCE_DP_D: 3805 case INTEL_PIPE_CRC_SOURCE_DP_D:
3867 if (!IS_G4X(dev)) 3806 if (!IS_G4X(dev_priv))
3868 return -EINVAL; 3807 return -EINVAL;
3869 *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DP_D_G4X; 3808 *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DP_D_G4X;
3870 need_stable_symbols = true; 3809 need_stable_symbols = true;
@@ -3888,7 +3827,7 @@ static int i9xx_pipe_crc_ctl_reg(struct drm_device *dev,
3888 if (need_stable_symbols) { 3827 if (need_stable_symbols) {
3889 uint32_t tmp = I915_READ(PORT_DFT2_G4X); 3828 uint32_t tmp = I915_READ(PORT_DFT2_G4X);
3890 3829
3891 WARN_ON(!IS_G4X(dev)); 3830 WARN_ON(!IS_G4X(dev_priv));
3892 3831
3893 I915_WRITE(PORT_DFT_I9XX, 3832 I915_WRITE(PORT_DFT_I9XX,
3894 I915_READ(PORT_DFT_I9XX) | DC_BALANCE_RESET); 3833 I915_READ(PORT_DFT_I9XX) | DC_BALANCE_RESET);
@@ -3904,10 +3843,9 @@ static int i9xx_pipe_crc_ctl_reg(struct drm_device *dev,
3904 return 0; 3843 return 0;
3905} 3844}
3906 3845
3907static void vlv_undo_pipe_scramble_reset(struct drm_device *dev, 3846static void vlv_undo_pipe_scramble_reset(struct drm_i915_private *dev_priv,
3908 enum pipe pipe) 3847 enum pipe pipe)
3909{ 3848{
3910 struct drm_i915_private *dev_priv = to_i915(dev);
3911 uint32_t tmp = I915_READ(PORT_DFT2_G4X); 3849 uint32_t tmp = I915_READ(PORT_DFT2_G4X);
3912 3850
3913 switch (pipe) { 3851 switch (pipe) {
@@ -3929,10 +3867,9 @@ static void vlv_undo_pipe_scramble_reset(struct drm_device *dev,
3929 3867
3930} 3868}
3931 3869
3932static void g4x_undo_pipe_scramble_reset(struct drm_device *dev, 3870static void g4x_undo_pipe_scramble_reset(struct drm_i915_private *dev_priv,
3933 enum pipe pipe) 3871 enum pipe pipe)
3934{ 3872{
3935 struct drm_i915_private *dev_priv = to_i915(dev);
3936 uint32_t tmp = I915_READ(PORT_DFT2_G4X); 3873 uint32_t tmp = I915_READ(PORT_DFT2_G4X);
3937 3874
3938 if (pipe == PIPE_A) 3875 if (pipe == PIPE_A)
@@ -3973,9 +3910,10 @@ static int ilk_pipe_crc_ctl_reg(enum intel_pipe_crc_source *source,
3973 return 0; 3910 return 0;
3974} 3911}
3975 3912
3976static void hsw_trans_edp_pipe_A_crc_wa(struct drm_device *dev, bool enable) 3913static void hsw_trans_edp_pipe_A_crc_wa(struct drm_i915_private *dev_priv,
3914 bool enable)
3977{ 3915{
3978 struct drm_i915_private *dev_priv = to_i915(dev); 3916 struct drm_device *dev = &dev_priv->drm;
3979 struct intel_crtc *crtc = 3917 struct intel_crtc *crtc =
3980 to_intel_crtc(dev_priv->pipe_to_crtc_mapping[PIPE_A]); 3918 to_intel_crtc(dev_priv->pipe_to_crtc_mapping[PIPE_A]);
3981 struct intel_crtc_state *pipe_config; 3919 struct intel_crtc_state *pipe_config;
@@ -4009,7 +3947,7 @@ out:
4009 drm_atomic_state_free(state); 3947 drm_atomic_state_free(state);
4010} 3948}
4011 3949
4012static int ivb_pipe_crc_ctl_reg(struct drm_device *dev, 3950static int ivb_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv,
4013 enum pipe pipe, 3951 enum pipe pipe,
4014 enum intel_pipe_crc_source *source, 3952 enum intel_pipe_crc_source *source,
4015 uint32_t *val) 3953 uint32_t *val)
@@ -4025,8 +3963,8 @@ static int ivb_pipe_crc_ctl_reg(struct drm_device *dev,
4025 *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_SPRITE_IVB; 3963 *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_SPRITE_IVB;
4026 break; 3964 break;
4027 case INTEL_PIPE_CRC_SOURCE_PF: 3965 case INTEL_PIPE_CRC_SOURCE_PF:
4028 if (IS_HASWELL(dev) && pipe == PIPE_A) 3966 if (IS_HASWELL(dev_priv) && pipe == PIPE_A)
4029 hsw_trans_edp_pipe_A_crc_wa(dev, true); 3967 hsw_trans_edp_pipe_A_crc_wa(dev_priv, true);
4030 3968
4031 *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PF_IVB; 3969 *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PF_IVB;
4032 break; 3970 break;
@@ -4040,13 +3978,14 @@ static int ivb_pipe_crc_ctl_reg(struct drm_device *dev,
4040 return 0; 3978 return 0;
4041} 3979}
4042 3980
4043static int pipe_crc_set_source(struct drm_device *dev, enum pipe pipe, 3981static int pipe_crc_set_source(struct drm_i915_private *dev_priv,
3982 enum pipe pipe,
4044 enum intel_pipe_crc_source source) 3983 enum intel_pipe_crc_source source)
4045{ 3984{
4046 struct drm_i915_private *dev_priv = to_i915(dev); 3985 struct drm_device *dev = &dev_priv->drm;
4047 struct intel_pipe_crc *pipe_crc = &dev_priv->pipe_crc[pipe]; 3986 struct intel_pipe_crc *pipe_crc = &dev_priv->pipe_crc[pipe];
4048 struct intel_crtc *crtc = to_intel_crtc(intel_get_crtc_for_pipe(dev, 3987 struct intel_crtc *crtc =
4049 pipe)); 3988 to_intel_crtc(intel_get_crtc_for_pipe(dev, pipe));
4050 enum intel_display_power_domain power_domain; 3989 enum intel_display_power_domain power_domain;
4051 u32 val = 0; /* shut up gcc */ 3990 u32 val = 0; /* shut up gcc */
4052 int ret; 3991 int ret;
@@ -4064,16 +4003,16 @@ static int pipe_crc_set_source(struct drm_device *dev, enum pipe pipe,
4064 return -EIO; 4003 return -EIO;
4065 } 4004 }
4066 4005
4067 if (IS_GEN2(dev)) 4006 if (IS_GEN2(dev_priv))
4068 ret = i8xx_pipe_crc_ctl_reg(&source, &val); 4007 ret = i8xx_pipe_crc_ctl_reg(&source, &val);
4069 else if (INTEL_INFO(dev)->gen < 5) 4008 else if (INTEL_GEN(dev_priv) < 5)
4070 ret = i9xx_pipe_crc_ctl_reg(dev, pipe, &source, &val); 4009 ret = i9xx_pipe_crc_ctl_reg(dev_priv, pipe, &source, &val);
4071 else if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) 4010 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
4072 ret = vlv_pipe_crc_ctl_reg(dev, pipe, &source, &val); 4011 ret = vlv_pipe_crc_ctl_reg(dev_priv, pipe, &source, &val);
4073 else if (IS_GEN5(dev) || IS_GEN6(dev)) 4012 else if (IS_GEN5(dev_priv) || IS_GEN6(dev_priv))
4074 ret = ilk_pipe_crc_ctl_reg(&source, &val); 4013 ret = ilk_pipe_crc_ctl_reg(&source, &val);
4075 else 4014 else
4076 ret = ivb_pipe_crc_ctl_reg(dev, pipe, &source, &val); 4015 ret = ivb_pipe_crc_ctl_reg(dev_priv, pipe, &source, &val);
4077 4016
4078 if (ret != 0) 4017 if (ret != 0)
4079 goto out; 4018 goto out;
@@ -4137,12 +4076,12 @@ static int pipe_crc_set_source(struct drm_device *dev, enum pipe pipe,
4137 4076
4138 kfree(entries); 4077 kfree(entries);
4139 4078
4140 if (IS_G4X(dev)) 4079 if (IS_G4X(dev_priv))
4141 g4x_undo_pipe_scramble_reset(dev, pipe); 4080 g4x_undo_pipe_scramble_reset(dev_priv, pipe);
4142 else if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) 4081 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
4143 vlv_undo_pipe_scramble_reset(dev, pipe); 4082 vlv_undo_pipe_scramble_reset(dev_priv, pipe);
4144 else if (IS_HASWELL(dev) && pipe == PIPE_A) 4083 else if (IS_HASWELL(dev_priv) && pipe == PIPE_A)
4145 hsw_trans_edp_pipe_A_crc_wa(dev, false); 4084 hsw_trans_edp_pipe_A_crc_wa(dev_priv, false);
4146 4085
4147 hsw_enable_ips(crtc); 4086 hsw_enable_ips(crtc);
4148 } 4087 }
@@ -4246,7 +4185,8 @@ display_crc_ctl_parse_source(const char *buf, enum intel_pipe_crc_source *s)
4246 return -EINVAL; 4185 return -EINVAL;
4247} 4186}
4248 4187
4249static int display_crc_ctl_parse(struct drm_device *dev, char *buf, size_t len) 4188static int display_crc_ctl_parse(struct drm_i915_private *dev_priv,
4189 char *buf, size_t len)
4250{ 4190{
4251#define N_WORDS 3 4191#define N_WORDS 3
4252 int n_words; 4192 int n_words;
@@ -4277,14 +4217,14 @@ static int display_crc_ctl_parse(struct drm_device *dev, char *buf, size_t len)
4277 return -EINVAL; 4217 return -EINVAL;
4278 } 4218 }
4279 4219
4280 return pipe_crc_set_source(dev, pipe, source); 4220 return pipe_crc_set_source(dev_priv, pipe, source);
4281} 4221}
4282 4222
4283static ssize_t display_crc_ctl_write(struct file *file, const char __user *ubuf, 4223static ssize_t display_crc_ctl_write(struct file *file, const char __user *ubuf,
4284 size_t len, loff_t *offp) 4224 size_t len, loff_t *offp)
4285{ 4225{
4286 struct seq_file *m = file->private_data; 4226 struct seq_file *m = file->private_data;
4287 struct drm_device *dev = m->private; 4227 struct drm_i915_private *dev_priv = m->private;
4288 char *tmpbuf; 4228 char *tmpbuf;
4289 int ret; 4229 int ret;
4290 4230
@@ -4307,7 +4247,7 @@ static ssize_t display_crc_ctl_write(struct file *file, const char __user *ubuf,
4307 } 4247 }
4308 tmpbuf[len] = '\0'; 4248 tmpbuf[len] = '\0';
4309 4249
4310 ret = display_crc_ctl_parse(dev, tmpbuf, len); 4250 ret = display_crc_ctl_parse(dev_priv, tmpbuf, len);
4311 4251
4312out: 4252out:
4313 kfree(tmpbuf); 4253 kfree(tmpbuf);
@@ -4328,8 +4268,8 @@ static const struct file_operations i915_display_crc_ctl_fops = {
4328}; 4268};
4329 4269
4330static ssize_t i915_displayport_test_active_write(struct file *file, 4270static ssize_t i915_displayport_test_active_write(struct file *file,
4331 const char __user *ubuf, 4271 const char __user *ubuf,
4332 size_t len, loff_t *offp) 4272 size_t len, loff_t *offp)
4333{ 4273{
4334 char *input_buffer; 4274 char *input_buffer;
4335 int status = 0; 4275 int status = 0;
@@ -4359,7 +4299,6 @@ static ssize_t i915_displayport_test_active_write(struct file *file,
4359 DRM_DEBUG_DRIVER("Copied %d bytes from user\n", (unsigned int)len); 4299 DRM_DEBUG_DRIVER("Copied %d bytes from user\n", (unsigned int)len);
4360 4300
4361 list_for_each_entry(connector, connector_list, head) { 4301 list_for_each_entry(connector, connector_list, head) {
4362
4363 if (connector->connector_type != 4302 if (connector->connector_type !=
4364 DRM_MODE_CONNECTOR_DisplayPort) 4303 DRM_MODE_CONNECTOR_DisplayPort)
4365 continue; 4304 continue;
@@ -4397,7 +4336,6 @@ static int i915_displayport_test_active_show(struct seq_file *m, void *data)
4397 struct intel_dp *intel_dp; 4336 struct intel_dp *intel_dp;
4398 4337
4399 list_for_each_entry(connector, connector_list, head) { 4338 list_for_each_entry(connector, connector_list, head) {
4400
4401 if (connector->connector_type != 4339 if (connector->connector_type !=
4402 DRM_MODE_CONNECTOR_DisplayPort) 4340 DRM_MODE_CONNECTOR_DisplayPort)
4403 continue; 4341 continue;
@@ -4417,11 +4355,12 @@ static int i915_displayport_test_active_show(struct seq_file *m, void *data)
4417} 4355}
4418 4356
4419static int i915_displayport_test_active_open(struct inode *inode, 4357static int i915_displayport_test_active_open(struct inode *inode,
4420 struct file *file) 4358 struct file *file)
4421{ 4359{
4422 struct drm_device *dev = inode->i_private; 4360 struct drm_i915_private *dev_priv = inode->i_private;
4423 4361
4424 return single_open(file, i915_displayport_test_active_show, dev); 4362 return single_open(file, i915_displayport_test_active_show,
4363 &dev_priv->drm);
4425} 4364}
4426 4365
4427static const struct file_operations i915_displayport_test_active_fops = { 4366static const struct file_operations i915_displayport_test_active_fops = {
@@ -4441,7 +4380,6 @@ static int i915_displayport_test_data_show(struct seq_file *m, void *data)
4441 struct intel_dp *intel_dp; 4380 struct intel_dp *intel_dp;
4442 4381
4443 list_for_each_entry(connector, connector_list, head) { 4382 list_for_each_entry(connector, connector_list, head) {
4444
4445 if (connector->connector_type != 4383 if (connector->connector_type !=
4446 DRM_MODE_CONNECTOR_DisplayPort) 4384 DRM_MODE_CONNECTOR_DisplayPort)
4447 continue; 4385 continue;
@@ -4457,11 +4395,12 @@ static int i915_displayport_test_data_show(struct seq_file *m, void *data)
4457 return 0; 4395 return 0;
4458} 4396}
4459static int i915_displayport_test_data_open(struct inode *inode, 4397static int i915_displayport_test_data_open(struct inode *inode,
4460 struct file *file) 4398 struct file *file)
4461{ 4399{
4462 struct drm_device *dev = inode->i_private; 4400 struct drm_i915_private *dev_priv = inode->i_private;
4463 4401
4464 return single_open(file, i915_displayport_test_data_show, dev); 4402 return single_open(file, i915_displayport_test_data_show,
4403 &dev_priv->drm);
4465} 4404}
4466 4405
4467static const struct file_operations i915_displayport_test_data_fops = { 4406static const struct file_operations i915_displayport_test_data_fops = {
@@ -4480,7 +4419,6 @@ static int i915_displayport_test_type_show(struct seq_file *m, void *data)
4480 struct intel_dp *intel_dp; 4419 struct intel_dp *intel_dp;
4481 4420
4482 list_for_each_entry(connector, connector_list, head) { 4421 list_for_each_entry(connector, connector_list, head) {
4483
4484 if (connector->connector_type != 4422 if (connector->connector_type !=
4485 DRM_MODE_CONNECTOR_DisplayPort) 4423 DRM_MODE_CONNECTOR_DisplayPort)
4486 continue; 4424 continue;
@@ -4499,9 +4437,10 @@ static int i915_displayport_test_type_show(struct seq_file *m, void *data)
4499static int i915_displayport_test_type_open(struct inode *inode, 4437static int i915_displayport_test_type_open(struct inode *inode,
4500 struct file *file) 4438 struct file *file)
4501{ 4439{
4502 struct drm_device *dev = inode->i_private; 4440 struct drm_i915_private *dev_priv = inode->i_private;
4503 4441
4504 return single_open(file, i915_displayport_test_type_show, dev); 4442 return single_open(file, i915_displayport_test_type_show,
4443 &dev_priv->drm);
4505} 4444}
4506 4445
4507static const struct file_operations i915_displayport_test_type_fops = { 4446static const struct file_operations i915_displayport_test_type_fops = {
@@ -4514,13 +4453,14 @@ static const struct file_operations i915_displayport_test_type_fops = {
4514 4453
4515static void wm_latency_show(struct seq_file *m, const uint16_t wm[8]) 4454static void wm_latency_show(struct seq_file *m, const uint16_t wm[8])
4516{ 4455{
4517 struct drm_device *dev = m->private; 4456 struct drm_i915_private *dev_priv = m->private;
4457 struct drm_device *dev = &dev_priv->drm;
4518 int level; 4458 int level;
4519 int num_levels; 4459 int num_levels;
4520 4460
4521 if (IS_CHERRYVIEW(dev)) 4461 if (IS_CHERRYVIEW(dev_priv))
4522 num_levels = 3; 4462 num_levels = 3;
4523 else if (IS_VALLEYVIEW(dev)) 4463 else if (IS_VALLEYVIEW(dev_priv))
4524 num_levels = 1; 4464 num_levels = 1;
4525 else 4465 else
4526 num_levels = ilk_wm_max_level(dev) + 1; 4466 num_levels = ilk_wm_max_level(dev) + 1;
@@ -4534,8 +4474,8 @@ static void wm_latency_show(struct seq_file *m, const uint16_t wm[8])
4534 * - WM1+ latency values in 0.5us units 4474 * - WM1+ latency values in 0.5us units
4535 * - latencies are in us on gen9/vlv/chv 4475 * - latencies are in us on gen9/vlv/chv
4536 */ 4476 */
4537 if (INTEL_INFO(dev)->gen >= 9 || IS_VALLEYVIEW(dev) || 4477 if (INTEL_GEN(dev_priv) >= 9 || IS_VALLEYVIEW(dev_priv) ||
4538 IS_CHERRYVIEW(dev)) 4478 IS_CHERRYVIEW(dev_priv))
4539 latency *= 10; 4479 latency *= 10;
4540 else if (level > 0) 4480 else if (level > 0)
4541 latency *= 5; 4481 latency *= 5;
@@ -4549,14 +4489,13 @@ static void wm_latency_show(struct seq_file *m, const uint16_t wm[8])
4549 4489
4550static int pri_wm_latency_show(struct seq_file *m, void *data) 4490static int pri_wm_latency_show(struct seq_file *m, void *data)
4551{ 4491{
4552 struct drm_device *dev = m->private; 4492 struct drm_i915_private *dev_priv = m->private;
4553 struct drm_i915_private *dev_priv = to_i915(dev);
4554 const uint16_t *latencies; 4493 const uint16_t *latencies;
4555 4494
4556 if (INTEL_INFO(dev)->gen >= 9) 4495 if (INTEL_GEN(dev_priv) >= 9)
4557 latencies = dev_priv->wm.skl_latency; 4496 latencies = dev_priv->wm.skl_latency;
4558 else 4497 else
4559 latencies = to_i915(dev)->wm.pri_latency; 4498 latencies = dev_priv->wm.pri_latency;
4560 4499
4561 wm_latency_show(m, latencies); 4500 wm_latency_show(m, latencies);
4562 4501
@@ -4565,14 +4504,13 @@ static int pri_wm_latency_show(struct seq_file *m, void *data)
4565 4504
4566static int spr_wm_latency_show(struct seq_file *m, void *data) 4505static int spr_wm_latency_show(struct seq_file *m, void *data)
4567{ 4506{
4568 struct drm_device *dev = m->private; 4507 struct drm_i915_private *dev_priv = m->private;
4569 struct drm_i915_private *dev_priv = to_i915(dev);
4570 const uint16_t *latencies; 4508 const uint16_t *latencies;
4571 4509
4572 if (INTEL_INFO(dev)->gen >= 9) 4510 if (INTEL_GEN(dev_priv) >= 9)
4573 latencies = dev_priv->wm.skl_latency; 4511 latencies = dev_priv->wm.skl_latency;
4574 else 4512 else
4575 latencies = to_i915(dev)->wm.spr_latency; 4513 latencies = dev_priv->wm.spr_latency;
4576 4514
4577 wm_latency_show(m, latencies); 4515 wm_latency_show(m, latencies);
4578 4516
@@ -4581,14 +4519,13 @@ static int spr_wm_latency_show(struct seq_file *m, void *data)
4581 4519
4582static int cur_wm_latency_show(struct seq_file *m, void *data) 4520static int cur_wm_latency_show(struct seq_file *m, void *data)
4583{ 4521{
4584 struct drm_device *dev = m->private; 4522 struct drm_i915_private *dev_priv = m->private;
4585 struct drm_i915_private *dev_priv = to_i915(dev);
4586 const uint16_t *latencies; 4523 const uint16_t *latencies;
4587 4524
4588 if (INTEL_INFO(dev)->gen >= 9) 4525 if (INTEL_GEN(dev_priv) >= 9)
4589 latencies = dev_priv->wm.skl_latency; 4526 latencies = dev_priv->wm.skl_latency;
4590 else 4527 else
4591 latencies = to_i915(dev)->wm.cur_latency; 4528 latencies = dev_priv->wm.cur_latency;
4592 4529
4593 wm_latency_show(m, latencies); 4530 wm_latency_show(m, latencies);
4594 4531
@@ -4597,48 +4534,49 @@ static int cur_wm_latency_show(struct seq_file *m, void *data)
4597 4534
4598static int pri_wm_latency_open(struct inode *inode, struct file *file) 4535static int pri_wm_latency_open(struct inode *inode, struct file *file)
4599{ 4536{
4600 struct drm_device *dev = inode->i_private; 4537 struct drm_i915_private *dev_priv = inode->i_private;
4601 4538
4602 if (INTEL_INFO(dev)->gen < 5) 4539 if (INTEL_GEN(dev_priv) < 5)
4603 return -ENODEV; 4540 return -ENODEV;
4604 4541
4605 return single_open(file, pri_wm_latency_show, dev); 4542 return single_open(file, pri_wm_latency_show, dev_priv);
4606} 4543}
4607 4544
4608static int spr_wm_latency_open(struct inode *inode, struct file *file) 4545static int spr_wm_latency_open(struct inode *inode, struct file *file)
4609{ 4546{
4610 struct drm_device *dev = inode->i_private; 4547 struct drm_i915_private *dev_priv = inode->i_private;
4611 4548
4612 if (HAS_GMCH_DISPLAY(dev)) 4549 if (HAS_GMCH_DISPLAY(dev_priv))
4613 return -ENODEV; 4550 return -ENODEV;
4614 4551
4615 return single_open(file, spr_wm_latency_show, dev); 4552 return single_open(file, spr_wm_latency_show, dev_priv);
4616} 4553}
4617 4554
4618static int cur_wm_latency_open(struct inode *inode, struct file *file) 4555static int cur_wm_latency_open(struct inode *inode, struct file *file)
4619{ 4556{
4620 struct drm_device *dev = inode->i_private; 4557 struct drm_i915_private *dev_priv = inode->i_private;
4621 4558
4622 if (HAS_GMCH_DISPLAY(dev)) 4559 if (HAS_GMCH_DISPLAY(dev_priv))
4623 return -ENODEV; 4560 return -ENODEV;
4624 4561
4625 return single_open(file, cur_wm_latency_show, dev); 4562 return single_open(file, cur_wm_latency_show, dev_priv);
4626} 4563}
4627 4564
4628static ssize_t wm_latency_write(struct file *file, const char __user *ubuf, 4565static ssize_t wm_latency_write(struct file *file, const char __user *ubuf,
4629 size_t len, loff_t *offp, uint16_t wm[8]) 4566 size_t len, loff_t *offp, uint16_t wm[8])
4630{ 4567{
4631 struct seq_file *m = file->private_data; 4568 struct seq_file *m = file->private_data;
4632 struct drm_device *dev = m->private; 4569 struct drm_i915_private *dev_priv = m->private;
4570 struct drm_device *dev = &dev_priv->drm;
4633 uint16_t new[8] = { 0 }; 4571 uint16_t new[8] = { 0 };
4634 int num_levels; 4572 int num_levels;
4635 int level; 4573 int level;
4636 int ret; 4574 int ret;
4637 char tmp[32]; 4575 char tmp[32];
4638 4576
4639 if (IS_CHERRYVIEW(dev)) 4577 if (IS_CHERRYVIEW(dev_priv))
4640 num_levels = 3; 4578 num_levels = 3;
4641 else if (IS_VALLEYVIEW(dev)) 4579 else if (IS_VALLEYVIEW(dev_priv))
4642 num_levels = 1; 4580 num_levels = 1;
4643 else 4581 else
4644 num_levels = ilk_wm_max_level(dev) + 1; 4582 num_levels = ilk_wm_max_level(dev) + 1;
@@ -4672,14 +4610,13 @@ static ssize_t pri_wm_latency_write(struct file *file, const char __user *ubuf,
4672 size_t len, loff_t *offp) 4610 size_t len, loff_t *offp)
4673{ 4611{
4674 struct seq_file *m = file->private_data; 4612 struct seq_file *m = file->private_data;
4675 struct drm_device *dev = m->private; 4613 struct drm_i915_private *dev_priv = m->private;
4676 struct drm_i915_private *dev_priv = to_i915(dev);
4677 uint16_t *latencies; 4614 uint16_t *latencies;
4678 4615
4679 if (INTEL_INFO(dev)->gen >= 9) 4616 if (INTEL_GEN(dev_priv) >= 9)
4680 latencies = dev_priv->wm.skl_latency; 4617 latencies = dev_priv->wm.skl_latency;
4681 else 4618 else
4682 latencies = to_i915(dev)->wm.pri_latency; 4619 latencies = dev_priv->wm.pri_latency;
4683 4620
4684 return wm_latency_write(file, ubuf, len, offp, latencies); 4621 return wm_latency_write(file, ubuf, len, offp, latencies);
4685} 4622}
@@ -4688,14 +4625,13 @@ static ssize_t spr_wm_latency_write(struct file *file, const char __user *ubuf,
4688 size_t len, loff_t *offp) 4625 size_t len, loff_t *offp)
4689{ 4626{
4690 struct seq_file *m = file->private_data; 4627 struct seq_file *m = file->private_data;
4691 struct drm_device *dev = m->private; 4628 struct drm_i915_private *dev_priv = m->private;
4692 struct drm_i915_private *dev_priv = to_i915(dev);
4693 uint16_t *latencies; 4629 uint16_t *latencies;
4694 4630
4695 if (INTEL_INFO(dev)->gen >= 9) 4631 if (INTEL_GEN(dev_priv) >= 9)
4696 latencies = dev_priv->wm.skl_latency; 4632 latencies = dev_priv->wm.skl_latency;
4697 else 4633 else
4698 latencies = to_i915(dev)->wm.spr_latency; 4634 latencies = dev_priv->wm.spr_latency;
4699 4635
4700 return wm_latency_write(file, ubuf, len, offp, latencies); 4636 return wm_latency_write(file, ubuf, len, offp, latencies);
4701} 4637}
@@ -4704,14 +4640,13 @@ static ssize_t cur_wm_latency_write(struct file *file, const char __user *ubuf,
4704 size_t len, loff_t *offp) 4640 size_t len, loff_t *offp)
4705{ 4641{
4706 struct seq_file *m = file->private_data; 4642 struct seq_file *m = file->private_data;
4707 struct drm_device *dev = m->private; 4643 struct drm_i915_private *dev_priv = m->private;
4708 struct drm_i915_private *dev_priv = to_i915(dev);
4709 uint16_t *latencies; 4644 uint16_t *latencies;
4710 4645
4711 if (INTEL_INFO(dev)->gen >= 9) 4646 if (INTEL_GEN(dev_priv) >= 9)
4712 latencies = dev_priv->wm.skl_latency; 4647 latencies = dev_priv->wm.skl_latency;
4713 else 4648 else
4714 latencies = to_i915(dev)->wm.cur_latency; 4649 latencies = dev_priv->wm.cur_latency;
4715 4650
4716 return wm_latency_write(file, ubuf, len, offp, latencies); 4651 return wm_latency_write(file, ubuf, len, offp, latencies);
4717} 4652}
@@ -4746,8 +4681,7 @@ static const struct file_operations i915_cur_wm_latency_fops = {
4746static int 4681static int
4747i915_wedged_get(void *data, u64 *val) 4682i915_wedged_get(void *data, u64 *val)
4748{ 4683{
4749 struct drm_device *dev = data; 4684 struct drm_i915_private *dev_priv = data;
4750 struct drm_i915_private *dev_priv = to_i915(dev);
4751 4685
4752 *val = i915_terminally_wedged(&dev_priv->gpu_error); 4686 *val = i915_terminally_wedged(&dev_priv->gpu_error);
4753 4687
@@ -4757,8 +4691,7 @@ i915_wedged_get(void *data, u64 *val)
4757static int 4691static int
4758i915_wedged_set(void *data, u64 val) 4692i915_wedged_set(void *data, u64 val)
4759{ 4693{
4760 struct drm_device *dev = data; 4694 struct drm_i915_private *dev_priv = data;
4761 struct drm_i915_private *dev_priv = to_i915(dev);
4762 4695
4763 /* 4696 /*
4764 * There is no safeguard against this debugfs entry colliding 4697 * There is no safeguard against this debugfs entry colliding
@@ -4788,8 +4721,7 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_wedged_fops,
4788static int 4721static int
4789i915_ring_missed_irq_get(void *data, u64 *val) 4722i915_ring_missed_irq_get(void *data, u64 *val)
4790{ 4723{
4791 struct drm_device *dev = data; 4724 struct drm_i915_private *dev_priv = data;
4792 struct drm_i915_private *dev_priv = to_i915(dev);
4793 4725
4794 *val = dev_priv->gpu_error.missed_irq_rings; 4726 *val = dev_priv->gpu_error.missed_irq_rings;
4795 return 0; 4727 return 0;
@@ -4798,8 +4730,8 @@ i915_ring_missed_irq_get(void *data, u64 *val)
4798static int 4730static int
4799i915_ring_missed_irq_set(void *data, u64 val) 4731i915_ring_missed_irq_set(void *data, u64 val)
4800{ 4732{
4801 struct drm_device *dev = data; 4733 struct drm_i915_private *dev_priv = data;
4802 struct drm_i915_private *dev_priv = to_i915(dev); 4734 struct drm_device *dev = &dev_priv->drm;
4803 int ret; 4735 int ret;
4804 4736
4805 /* Lock against concurrent debugfs callers */ 4737 /* Lock against concurrent debugfs callers */
@@ -4819,8 +4751,7 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_ring_missed_irq_fops,
4819static int 4751static int
4820i915_ring_test_irq_get(void *data, u64 *val) 4752i915_ring_test_irq_get(void *data, u64 *val)
4821{ 4753{
4822 struct drm_device *dev = data; 4754 struct drm_i915_private *dev_priv = data;
4823 struct drm_i915_private *dev_priv = to_i915(dev);
4824 4755
4825 *val = dev_priv->gpu_error.test_irq_rings; 4756 *val = dev_priv->gpu_error.test_irq_rings;
4826 4757
@@ -4830,8 +4761,7 @@ i915_ring_test_irq_get(void *data, u64 *val)
4830static int 4761static int
4831i915_ring_test_irq_set(void *data, u64 val) 4762i915_ring_test_irq_set(void *data, u64 val)
4832{ 4763{
4833 struct drm_device *dev = data; 4764 struct drm_i915_private *dev_priv = data;
4834 struct drm_i915_private *dev_priv = to_i915(dev);
4835 4765
4836 val &= INTEL_INFO(dev_priv)->ring_mask; 4766 val &= INTEL_INFO(dev_priv)->ring_mask;
4837 DRM_DEBUG_DRIVER("Masking interrupts on rings 0x%08llx\n", val); 4767 DRM_DEBUG_DRIVER("Masking interrupts on rings 0x%08llx\n", val);
@@ -4863,8 +4793,8 @@ i915_drop_caches_get(void *data, u64 *val)
4863static int 4793static int
4864i915_drop_caches_set(void *data, u64 val) 4794i915_drop_caches_set(void *data, u64 val)
4865{ 4795{
4866 struct drm_device *dev = data; 4796 struct drm_i915_private *dev_priv = data;
4867 struct drm_i915_private *dev_priv = to_i915(dev); 4797 struct drm_device *dev = &dev_priv->drm;
4868 int ret; 4798 int ret;
4869 4799
4870 DRM_DEBUG("Dropping caches: 0x%08llx\n", val); 4800 DRM_DEBUG("Dropping caches: 0x%08llx\n", val);
@@ -4903,10 +4833,9 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_drop_caches_fops,
4903static int 4833static int
4904i915_max_freq_get(void *data, u64 *val) 4834i915_max_freq_get(void *data, u64 *val)
4905{ 4835{
4906 struct drm_device *dev = data; 4836 struct drm_i915_private *dev_priv = data;
4907 struct drm_i915_private *dev_priv = to_i915(dev);
4908 4837
4909 if (INTEL_INFO(dev)->gen < 6) 4838 if (INTEL_GEN(dev_priv) < 6)
4910 return -ENODEV; 4839 return -ENODEV;
4911 4840
4912 *val = intel_gpu_freq(dev_priv, dev_priv->rps.max_freq_softlimit); 4841 *val = intel_gpu_freq(dev_priv, dev_priv->rps.max_freq_softlimit);
@@ -4916,12 +4845,11 @@ i915_max_freq_get(void *data, u64 *val)
4916static int 4845static int
4917i915_max_freq_set(void *data, u64 val) 4846i915_max_freq_set(void *data, u64 val)
4918{ 4847{
4919 struct drm_device *dev = data; 4848 struct drm_i915_private *dev_priv = data;
4920 struct drm_i915_private *dev_priv = to_i915(dev);
4921 u32 hw_max, hw_min; 4849 u32 hw_max, hw_min;
4922 int ret; 4850 int ret;
4923 4851
4924 if (INTEL_INFO(dev)->gen < 6) 4852 if (INTEL_GEN(dev_priv) < 6)
4925 return -ENODEV; 4853 return -ENODEV;
4926 4854
4927 DRM_DEBUG_DRIVER("Manually setting max freq to %llu\n", val); 4855 DRM_DEBUG_DRIVER("Manually setting max freq to %llu\n", val);
@@ -4959,8 +4887,7 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_max_freq_fops,
4959static int 4887static int
4960i915_min_freq_get(void *data, u64 *val) 4888i915_min_freq_get(void *data, u64 *val)
4961{ 4889{
4962 struct drm_device *dev = data; 4890 struct drm_i915_private *dev_priv = data;
4963 struct drm_i915_private *dev_priv = to_i915(dev);
4964 4891
4965 if (INTEL_GEN(dev_priv) < 6) 4892 if (INTEL_GEN(dev_priv) < 6)
4966 return -ENODEV; 4893 return -ENODEV;
@@ -4972,8 +4899,7 @@ i915_min_freq_get(void *data, u64 *val)
4972static int 4899static int
4973i915_min_freq_set(void *data, u64 val) 4900i915_min_freq_set(void *data, u64 val)
4974{ 4901{
4975 struct drm_device *dev = data; 4902 struct drm_i915_private *dev_priv = data;
4976 struct drm_i915_private *dev_priv = to_i915(dev);
4977 u32 hw_max, hw_min; 4903 u32 hw_max, hw_min;
4978 int ret; 4904 int ret;
4979 4905
@@ -4994,7 +4920,8 @@ i915_min_freq_set(void *data, u64 val)
4994 hw_max = dev_priv->rps.max_freq; 4920 hw_max = dev_priv->rps.max_freq;
4995 hw_min = dev_priv->rps.min_freq; 4921 hw_min = dev_priv->rps.min_freq;
4996 4922
4997 if (val < hw_min || val > hw_max || val > dev_priv->rps.max_freq_softlimit) { 4923 if (val < hw_min ||
4924 val > hw_max || val > dev_priv->rps.max_freq_softlimit) {
4998 mutex_unlock(&dev_priv->rps.hw_lock); 4925 mutex_unlock(&dev_priv->rps.hw_lock);
4999 return -EINVAL; 4926 return -EINVAL;
5000 } 4927 }
@@ -5015,12 +4942,12 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_min_freq_fops,
5015static int 4942static int
5016i915_cache_sharing_get(void *data, u64 *val) 4943i915_cache_sharing_get(void *data, u64 *val)
5017{ 4944{
5018 struct drm_device *dev = data; 4945 struct drm_i915_private *dev_priv = data;
5019 struct drm_i915_private *dev_priv = to_i915(dev); 4946 struct drm_device *dev = &dev_priv->drm;
5020 u32 snpcr; 4947 u32 snpcr;
5021 int ret; 4948 int ret;
5022 4949
5023 if (!(IS_GEN6(dev) || IS_GEN7(dev))) 4950 if (!(IS_GEN6(dev_priv) || IS_GEN7(dev_priv)))
5024 return -ENODEV; 4951 return -ENODEV;
5025 4952
5026 ret = mutex_lock_interruptible(&dev->struct_mutex); 4953 ret = mutex_lock_interruptible(&dev->struct_mutex);
@@ -5031,7 +4958,7 @@ i915_cache_sharing_get(void *data, u64 *val)
5031 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR); 4958 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
5032 4959
5033 intel_runtime_pm_put(dev_priv); 4960 intel_runtime_pm_put(dev_priv);
5034 mutex_unlock(&dev_priv->drm.struct_mutex); 4961 mutex_unlock(&dev->struct_mutex);
5035 4962
5036 *val = (snpcr & GEN6_MBC_SNPCR_MASK) >> GEN6_MBC_SNPCR_SHIFT; 4963 *val = (snpcr & GEN6_MBC_SNPCR_MASK) >> GEN6_MBC_SNPCR_SHIFT;
5037 4964
@@ -5041,11 +4968,10 @@ i915_cache_sharing_get(void *data, u64 *val)
5041static int 4968static int
5042i915_cache_sharing_set(void *data, u64 val) 4969i915_cache_sharing_set(void *data, u64 val)
5043{ 4970{
5044 struct drm_device *dev = data; 4971 struct drm_i915_private *dev_priv = data;
5045 struct drm_i915_private *dev_priv = to_i915(dev);
5046 u32 snpcr; 4972 u32 snpcr;
5047 4973
5048 if (!(IS_GEN6(dev) || IS_GEN7(dev))) 4974 if (!(IS_GEN6(dev_priv) || IS_GEN7(dev_priv)))
5049 return -ENODEV; 4975 return -ENODEV;
5050 4976
5051 if (val > 3) 4977 if (val > 3)
@@ -5076,10 +5002,9 @@ struct sseu_dev_status {
5076 unsigned int eu_per_subslice; 5002 unsigned int eu_per_subslice;
5077}; 5003};
5078 5004
5079static void cherryview_sseu_device_status(struct drm_device *dev, 5005static void cherryview_sseu_device_status(struct drm_i915_private *dev_priv,
5080 struct sseu_dev_status *stat) 5006 struct sseu_dev_status *stat)
5081{ 5007{
5082 struct drm_i915_private *dev_priv = to_i915(dev);
5083 int ss_max = 2; 5008 int ss_max = 2;
5084 int ss; 5009 int ss;
5085 u32 sig1[ss_max], sig2[ss_max]; 5010 u32 sig1[ss_max], sig2[ss_max];
@@ -5108,16 +5033,15 @@ static void cherryview_sseu_device_status(struct drm_device *dev,
5108 stat->subslice_total = stat->subslice_per_slice; 5033 stat->subslice_total = stat->subslice_per_slice;
5109} 5034}
5110 5035
5111static void gen9_sseu_device_status(struct drm_device *dev, 5036static void gen9_sseu_device_status(struct drm_i915_private *dev_priv,
5112 struct sseu_dev_status *stat) 5037 struct sseu_dev_status *stat)
5113{ 5038{
5114 struct drm_i915_private *dev_priv = to_i915(dev);
5115 int s_max = 3, ss_max = 4; 5039 int s_max = 3, ss_max = 4;
5116 int s, ss; 5040 int s, ss;
5117 u32 s_reg[s_max], eu_reg[2*s_max], eu_mask[2]; 5041 u32 s_reg[s_max], eu_reg[2*s_max], eu_mask[2];
5118 5042
5119 /* BXT has a single slice and at most 3 subslices. */ 5043 /* BXT has a single slice and at most 3 subslices. */
5120 if (IS_BROXTON(dev)) { 5044 if (IS_BROXTON(dev_priv)) {
5121 s_max = 1; 5045 s_max = 1;
5122 ss_max = 3; 5046 ss_max = 3;
5123 } 5047 }
@@ -5146,18 +5070,18 @@ static void gen9_sseu_device_status(struct drm_device *dev,
5146 5070
5147 stat->slice_total++; 5071 stat->slice_total++;
5148 5072
5149 if (IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) 5073 if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
5150 ss_cnt = INTEL_INFO(dev)->subslice_per_slice; 5074 ss_cnt = INTEL_INFO(dev_priv)->subslice_per_slice;
5151 5075
5152 for (ss = 0; ss < ss_max; ss++) { 5076 for (ss = 0; ss < ss_max; ss++) {
5153 unsigned int eu_cnt; 5077 unsigned int eu_cnt;
5154 5078
5155 if (IS_BROXTON(dev) && 5079 if (IS_BROXTON(dev_priv) &&
5156 !(s_reg[s] & (GEN9_PGCTL_SS_ACK(ss)))) 5080 !(s_reg[s] & (GEN9_PGCTL_SS_ACK(ss))))
5157 /* skip disabled subslice */ 5081 /* skip disabled subslice */
5158 continue; 5082 continue;
5159 5083
5160 if (IS_BROXTON(dev)) 5084 if (IS_BROXTON(dev_priv))
5161 ss_cnt++; 5085 ss_cnt++;
5162 5086
5163 eu_cnt = 2 * hweight32(eu_reg[2*s + ss/2] & 5087 eu_cnt = 2 * hweight32(eu_reg[2*s + ss/2] &
@@ -5173,25 +5097,24 @@ static void gen9_sseu_device_status(struct drm_device *dev,
5173 } 5097 }
5174} 5098}
5175 5099
5176static void broadwell_sseu_device_status(struct drm_device *dev, 5100static void broadwell_sseu_device_status(struct drm_i915_private *dev_priv,
5177 struct sseu_dev_status *stat) 5101 struct sseu_dev_status *stat)
5178{ 5102{
5179 struct drm_i915_private *dev_priv = to_i915(dev);
5180 int s;
5181 u32 slice_info = I915_READ(GEN8_GT_SLICE_INFO); 5103 u32 slice_info = I915_READ(GEN8_GT_SLICE_INFO);
5104 int s;
5182 5105
5183 stat->slice_total = hweight32(slice_info & GEN8_LSLICESTAT_MASK); 5106 stat->slice_total = hweight32(slice_info & GEN8_LSLICESTAT_MASK);
5184 5107
5185 if (stat->slice_total) { 5108 if (stat->slice_total) {
5186 stat->subslice_per_slice = INTEL_INFO(dev)->subslice_per_slice; 5109 stat->subslice_per_slice = INTEL_INFO(dev_priv)->subslice_per_slice;
5187 stat->subslice_total = stat->slice_total * 5110 stat->subslice_total = stat->slice_total *
5188 stat->subslice_per_slice; 5111 stat->subslice_per_slice;
5189 stat->eu_per_subslice = INTEL_INFO(dev)->eu_per_subslice; 5112 stat->eu_per_subslice = INTEL_INFO(dev_priv)->eu_per_subslice;
5190 stat->eu_total = stat->eu_per_subslice * stat->subslice_total; 5113 stat->eu_total = stat->eu_per_subslice * stat->subslice_total;
5191 5114
5192 /* subtract fused off EU(s) from enabled slice(s) */ 5115 /* subtract fused off EU(s) from enabled slice(s) */
5193 for (s = 0; s < stat->slice_total; s++) { 5116 for (s = 0; s < stat->slice_total; s++) {
5194 u8 subslice_7eu = INTEL_INFO(dev)->subslice_7eu[s]; 5117 u8 subslice_7eu = INTEL_INFO(dev_priv)->subslice_7eu[s];
5195 5118
5196 stat->eu_total -= hweight8(subslice_7eu); 5119 stat->eu_total -= hweight8(subslice_7eu);
5197 } 5120 }
@@ -5200,47 +5123,45 @@ static void broadwell_sseu_device_status(struct drm_device *dev,
5200 5123
5201static int i915_sseu_status(struct seq_file *m, void *unused) 5124static int i915_sseu_status(struct seq_file *m, void *unused)
5202{ 5125{
5203 struct drm_info_node *node = (struct drm_info_node *) m->private; 5126 struct drm_i915_private *dev_priv = node_to_i915(m->private);
5204 struct drm_i915_private *dev_priv = to_i915(node->minor->dev);
5205 struct drm_device *dev = &dev_priv->drm;
5206 struct sseu_dev_status stat; 5127 struct sseu_dev_status stat;
5207 5128
5208 if (INTEL_INFO(dev)->gen < 8) 5129 if (INTEL_GEN(dev_priv) < 8)
5209 return -ENODEV; 5130 return -ENODEV;
5210 5131
5211 seq_puts(m, "SSEU Device Info\n"); 5132 seq_puts(m, "SSEU Device Info\n");
5212 seq_printf(m, " Available Slice Total: %u\n", 5133 seq_printf(m, " Available Slice Total: %u\n",
5213 INTEL_INFO(dev)->slice_total); 5134 INTEL_INFO(dev_priv)->slice_total);
5214 seq_printf(m, " Available Subslice Total: %u\n", 5135 seq_printf(m, " Available Subslice Total: %u\n",
5215 INTEL_INFO(dev)->subslice_total); 5136 INTEL_INFO(dev_priv)->subslice_total);
5216 seq_printf(m, " Available Subslice Per Slice: %u\n", 5137 seq_printf(m, " Available Subslice Per Slice: %u\n",
5217 INTEL_INFO(dev)->subslice_per_slice); 5138 INTEL_INFO(dev_priv)->subslice_per_slice);
5218 seq_printf(m, " Available EU Total: %u\n", 5139 seq_printf(m, " Available EU Total: %u\n",
5219 INTEL_INFO(dev)->eu_total); 5140 INTEL_INFO(dev_priv)->eu_total);
5220 seq_printf(m, " Available EU Per Subslice: %u\n", 5141 seq_printf(m, " Available EU Per Subslice: %u\n",
5221 INTEL_INFO(dev)->eu_per_subslice); 5142 INTEL_INFO(dev_priv)->eu_per_subslice);
5222 seq_printf(m, " Has Pooled EU: %s\n", yesno(HAS_POOLED_EU(dev))); 5143 seq_printf(m, " Has Pooled EU: %s\n", yesno(HAS_POOLED_EU(dev_priv)));
5223 if (HAS_POOLED_EU(dev)) 5144 if (HAS_POOLED_EU(dev_priv))
5224 seq_printf(m, " Min EU in pool: %u\n", 5145 seq_printf(m, " Min EU in pool: %u\n",
5225 INTEL_INFO(dev)->min_eu_in_pool); 5146 INTEL_INFO(dev_priv)->min_eu_in_pool);
5226 seq_printf(m, " Has Slice Power Gating: %s\n", 5147 seq_printf(m, " Has Slice Power Gating: %s\n",
5227 yesno(INTEL_INFO(dev)->has_slice_pg)); 5148 yesno(INTEL_INFO(dev_priv)->has_slice_pg));
5228 seq_printf(m, " Has Subslice Power Gating: %s\n", 5149 seq_printf(m, " Has Subslice Power Gating: %s\n",
5229 yesno(INTEL_INFO(dev)->has_subslice_pg)); 5150 yesno(INTEL_INFO(dev_priv)->has_subslice_pg));
5230 seq_printf(m, " Has EU Power Gating: %s\n", 5151 seq_printf(m, " Has EU Power Gating: %s\n",
5231 yesno(INTEL_INFO(dev)->has_eu_pg)); 5152 yesno(INTEL_INFO(dev_priv)->has_eu_pg));
5232 5153
5233 seq_puts(m, "SSEU Device Status\n"); 5154 seq_puts(m, "SSEU Device Status\n");
5234 memset(&stat, 0, sizeof(stat)); 5155 memset(&stat, 0, sizeof(stat));
5235 5156
5236 intel_runtime_pm_get(dev_priv); 5157 intel_runtime_pm_get(dev_priv);
5237 5158
5238 if (IS_CHERRYVIEW(dev)) { 5159 if (IS_CHERRYVIEW(dev_priv)) {
5239 cherryview_sseu_device_status(dev, &stat); 5160 cherryview_sseu_device_status(dev_priv, &stat);
5240 } else if (IS_BROADWELL(dev)) { 5161 } else if (IS_BROADWELL(dev_priv)) {
5241 broadwell_sseu_device_status(dev, &stat); 5162 broadwell_sseu_device_status(dev_priv, &stat);
5242 } else if (INTEL_INFO(dev)->gen >= 9) { 5163 } else if (INTEL_GEN(dev_priv) >= 9) {
5243 gen9_sseu_device_status(dev, &stat); 5164 gen9_sseu_device_status(dev_priv, &stat);
5244 } 5165 }
5245 5166
5246 intel_runtime_pm_put(dev_priv); 5167 intel_runtime_pm_put(dev_priv);
@@ -5261,10 +5182,9 @@ static int i915_sseu_status(struct seq_file *m, void *unused)
5261 5182
5262static int i915_forcewake_open(struct inode *inode, struct file *file) 5183static int i915_forcewake_open(struct inode *inode, struct file *file)
5263{ 5184{
5264 struct drm_device *dev = inode->i_private; 5185 struct drm_i915_private *dev_priv = inode->i_private;
5265 struct drm_i915_private *dev_priv = to_i915(dev);
5266 5186
5267 if (INTEL_INFO(dev)->gen < 6) 5187 if (INTEL_GEN(dev_priv) < 6)
5268 return 0; 5188 return 0;
5269 5189
5270 intel_runtime_pm_get(dev_priv); 5190 intel_runtime_pm_get(dev_priv);
@@ -5275,10 +5195,9 @@ static int i915_forcewake_open(struct inode *inode, struct file *file)
5275 5195
5276static int i915_forcewake_release(struct inode *inode, struct file *file) 5196static int i915_forcewake_release(struct inode *inode, struct file *file)
5277{ 5197{
5278 struct drm_device *dev = inode->i_private; 5198 struct drm_i915_private *dev_priv = inode->i_private;
5279 struct drm_i915_private *dev_priv = to_i915(dev);
5280 5199
5281 if (INTEL_INFO(dev)->gen < 6) 5200 if (INTEL_GEN(dev_priv) < 6)
5282 return 0; 5201 return 0;
5283 5202
5284 intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); 5203 intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
@@ -5295,12 +5214,11 @@ static const struct file_operations i915_forcewake_fops = {
5295 5214
5296static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor) 5215static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor)
5297{ 5216{
5298 struct drm_device *dev = minor->dev;
5299 struct dentry *ent; 5217 struct dentry *ent;
5300 5218
5301 ent = debugfs_create_file("i915_forcewake_user", 5219 ent = debugfs_create_file("i915_forcewake_user",
5302 S_IRUSR, 5220 S_IRUSR,
5303 root, dev, 5221 root, to_i915(minor->dev),
5304 &i915_forcewake_fops); 5222 &i915_forcewake_fops);
5305 if (!ent) 5223 if (!ent)
5306 return -ENOMEM; 5224 return -ENOMEM;
@@ -5313,12 +5231,11 @@ static int i915_debugfs_create(struct dentry *root,
5313 const char *name, 5231 const char *name,
5314 const struct file_operations *fops) 5232 const struct file_operations *fops)
5315{ 5233{
5316 struct drm_device *dev = minor->dev;
5317 struct dentry *ent; 5234 struct dentry *ent;
5318 5235
5319 ent = debugfs_create_file(name, 5236 ent = debugfs_create_file(name,
5320 S_IRUGO | S_IWUSR, 5237 S_IRUGO | S_IWUSR,
5321 root, dev, 5238 root, to_i915(minor->dev),
5322 fops); 5239 fops);
5323 if (!ent) 5240 if (!ent)
5324 return -ENOMEM; 5241 return -ENOMEM;
@@ -5405,9 +5322,8 @@ static const struct i915_debugfs_files {
5405 {"i915_dp_test_active", &i915_displayport_test_active_fops} 5322 {"i915_dp_test_active", &i915_displayport_test_active_fops}
5406}; 5323};
5407 5324
5408void intel_display_crc_init(struct drm_device *dev) 5325void intel_display_crc_init(struct drm_i915_private *dev_priv)
5409{ 5326{
5410 struct drm_i915_private *dev_priv = to_i915(dev);
5411 enum pipe pipe; 5327 enum pipe pipe;
5412 5328
5413 for_each_pipe(dev_priv, pipe) { 5329 for_each_pipe(dev_priv, pipe) {
@@ -5455,7 +5371,7 @@ void i915_debugfs_unregister(struct drm_i915_private *dev_priv)
5455 drm_debugfs_remove_files(i915_debugfs_list, 5371 drm_debugfs_remove_files(i915_debugfs_list,
5456 I915_DEBUGFS_ENTRIES, minor); 5372 I915_DEBUGFS_ENTRIES, minor);
5457 5373
5458 drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops, 5374 drm_debugfs_remove_files((struct drm_info_list *)&i915_forcewake_fops,
5459 1, minor); 5375 1, minor);
5460 5376
5461 for (i = 0; i < ARRAY_SIZE(i915_pipe_crc_data); i++) { 5377 for (i = 0; i < ARRAY_SIZE(i915_pipe_crc_data); i++) {
@@ -5467,7 +5383,7 @@ void i915_debugfs_unregister(struct drm_i915_private *dev_priv)
5467 5383
5468 for (i = 0; i < ARRAY_SIZE(i915_debugfs_files); i++) { 5384 for (i = 0; i < ARRAY_SIZE(i915_debugfs_files); i++) {
5469 struct drm_info_list *info_list = 5385 struct drm_info_list *info_list =
5470 (struct drm_info_list *) i915_debugfs_files[i].fops; 5386 (struct drm_info_list *)i915_debugfs_files[i].fops;
5471 5387
5472 drm_debugfs_remove_files(info_list, 1, minor); 5388 drm_debugfs_remove_files(info_list, 1, minor);
5473 } 5389 }
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index d22a1d8fe5b7..5a7c0c2e57d8 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -851,7 +851,7 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv,
851 intel_init_audio_hooks(dev_priv); 851 intel_init_audio_hooks(dev_priv);
852 i915_gem_load_init(&dev_priv->drm); 852 i915_gem_load_init(&dev_priv->drm);
853 853
854 intel_display_crc_init(&dev_priv->drm); 854 intel_display_crc_init(dev_priv);
855 855
856 intel_device_info_dump(dev_priv); 856 intel_device_info_dump(dev_priv);
857 857
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index dd7d76a9e01b..41e4178aa434 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3514,7 +3514,7 @@ static inline bool i915_gem_object_needs_bit17_swizzle(struct drm_i915_gem_objec
3514int i915_debugfs_register(struct drm_i915_private *dev_priv); 3514int i915_debugfs_register(struct drm_i915_private *dev_priv);
3515void i915_debugfs_unregister(struct drm_i915_private *dev_priv); 3515void i915_debugfs_unregister(struct drm_i915_private *dev_priv);
3516int i915_debugfs_connector_add(struct drm_connector *connector); 3516int i915_debugfs_connector_add(struct drm_connector *connector);
3517void intel_display_crc_init(struct drm_device *dev); 3517void intel_display_crc_init(struct drm_i915_private *dev_priv);
3518#else 3518#else
3519static inline int i915_debugfs_register(struct drm_i915_private *dev_priv) {return 0;} 3519static inline int i915_debugfs_register(struct drm_i915_private *dev_priv) {return 0;}
3520static inline void i915_debugfs_unregister(struct drm_i915_private *dev_priv) {} 3520static inline void i915_debugfs_unregister(struct drm_i915_private *dev_priv) {}
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-21 23:17:07 -0500