ARM: dts: mediatek: add MT7623 basic support

This adds basic chip support for Mediatek MT7623.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

5 files changed, 185 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a4a6d70e8b26..00d2826e0d69 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -809,6 +809,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
         mt6580-evbp1.dtb \
         mt6589-aquaris5.dtb \
         mt6592-evb.dtb \
+        mt7623-evb.dtb \
         mt8127-moose.dtb \
         mt8135-evbp1.dtb
 dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb
diff --git a/arch/arm/boot/dts/mt7623-evb.dts b/arch/arm/boot/dts/mt7623-evb.dts
new file mode 100644
index 000000000000..a9ee2d64c6f7
--- /dev/null
+++ b/arch/arm/boot/dts/mt7623-evb.dts
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2016 MediaTek Inc.
+ * Author: John Crispin <blogic@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+#include "mt7623.dtsi"
+
+/ {
+        model = "MediaTek MT7623 evaluation board";
+        compatible = "mediatek,mt7623-evb", "mediatek,mt7623";
+
+        chosen {
+                stdout-path = &uart2;
+        };
+
+        memory {
+                reg = <0 0x80000000 0 0x40000000>;
+        };
+};
+
+&uart2 {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
new file mode 100644
index 000000000000..53c4268ec874
--- /dev/null
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -0,0 +1,146 @@
+/*
+ * Copyright (c) 2016 MediaTek Inc.
+ * Author: John Crispin <blogic@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include "skeleton64.dtsi"
+
+/ {
+        compatible = "mediatek,mt7623";
+        interrupt-parent = <&sysirq>;
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0x0>;
+                };
+                cpu@1 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0x1>;
+                };
+                cpu@2 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0x2>;
+                };
+                cpu@3 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0x3>;
+                };
+        };
+
+        system_clk: dummy13m {
+                compatible = "fixed-clock";
+                clock-frequency = <13000000>;
+                #clock-cells = <0>;
+        };
+
+        rtc_clk: dummy32k {
+                compatible = "fixed-clock";
+                clock-frequency = <32000>;
+                #clock-cells = <0>;
+        };
+
+        uart_clk: dummy26m {
+                compatible = "fixed-clock";
+                clock-frequency = <26000000>;
+                #clock-cells = <0>;
+        };
+
+        timer {
+                compatible = "arm,armv7-timer";
+                interrupt-parent = <&gic>;
+                interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+                             <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+                             <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+                             <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+        };
+
+        watchdog: watchdog@10007000 {
+                compatible = "mediatek,mt7623-wdt",
+                             "mediatek,mt6589-wdt";
+                reg = <0 0x10007000 0 0x100>;
+        };
+
+        timer: timer@10008000 {
+                compatible = "mediatek,mt7623-timer",
+                             "mediatek,mt6577-timer";
+                reg = <0 0x10008000 0 0x80>;
+                interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_LOW>;
+                clocks = <&system_clk>, <&rtc_clk>;
+                clock-names = "system-clk", "rtc-clk";
+        };
+
+        sysirq: interrupt-controller@10200100 {
+                compatible = "mediatek,mt7623-sysirq",
+                             "mediatek,mt6577-sysirq";
+                interrupt-controller;
+                #interrupt-cells = <3>;
+                interrupt-parent = <&gic>;
+                reg = <0 0x10200100 0 0x1c>;
+        };
+
+        gic: interrupt-controller@10211000 {
+                compatible = "arm,cortex-a7-gic";
+                interrupt-controller;
+                #interrupt-cells = <3>;
+                interrupt-parent = <&gic>;
+                reg = <0 0x10211000 0 0x1000>,
+                      <0 0x10212000 0 0x1000>,
+                      <0 0x10214000 0 0x2000>,
+                      <0 0x10216000 0 0x2000>;
+        };
+
+        uart0: serial@11002000 {
+                compatible = "mediatek,mt7623-uart",
+                             "mediatek,mt6577-uart";
+                reg = <0 0x11002000 0 0x400>;
+                interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
+                clocks = <&uart_clk>;
+                status = "disabled";
+        };
+
+        uart1: serial@11003000 {
+                compatible = "mediatek,mt7623-uart",
+                             "mediatek,mt6577-uart";
+                reg = <0 0x11003000 0 0x400>;
+                interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
+                clocks = <&uart_clk>;
+                status = "disabled";
+        };
+
+        uart2: serial@11004000 {
+                compatible = "mediatek,mt7623-uart",
+                             "mediatek,mt6577-uart";
+                reg = <0 0x11004000 0 0x400>;
+                interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
+                clocks = <&uart_clk>;
+                status = "disabled";
+        };
+
+        uart3: serial@11005000 {
+                compatible = "mediatek,mt7623-uart",
+                             "mediatek,mt6577-uart";
+                reg = <0 0x11005000 0 0x400>;
+                interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
+                clocks = <&uart_clk>;
+                status = "disabled";
+        };
+};
diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig
index 0abcc51afff5..8ced4ad94af0 100644
--- a/arch/arm/mach-mediatek/Kconfig
+++ b/arch/arm/mach-mediatek/Kconfig
@@ -18,6 +18,10 @@ config MACH_MT6592
         bool "MediaTek MT6592 SoCs support"
         default ARCH_MEDIATEK
 
+config MACH_MT7623
+        bool "MediaTek MT7623 SoCs support"
+        default ARCH_MEDIATEK
+
 config MACH_MT8127
         bool "MediaTek MT8127 SoCs support"
         default ARCH_MEDIATEK
diff --git a/arch/arm/mach-mediatek/mediatek.c b/arch/arm/mach-mediatek/mediatek.c
index 2f9f09ac51bd..9c2e38d30f47 100644
--- a/arch/arm/mach-mediatek/mediatek.c
+++ b/arch/arm/mach-mediatek/mediatek.c
@@ -47,6 +47,7 @@ static const char * const mediatek_board_dt_compat[] = {
         "mediatek,mt2701",
         "mediatek,mt6589",
         "mediatek,mt6592",
+        "mediatek,mt7623",
         "mediatek,mt8127",
         "mediatek,mt8135",
         NULL,