Merge tag 'powerpc-4.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux

Pull powerpc updates from Michael Ellerman:

 - Kconfig: remove BE-only platforms from LE kernel build from Boqun
   Feng
 - Refresh ps3_defconfig from Geoff Levand
 - Emit GNU & SysV hashes for the vdso from Michael Ellerman
 - Define an enum for the bolted SLB indexes from Anshuman Khandual
 - Use a local to avoid multiple calls to get_slb_shadow() from Michael
   Ellerman
 - Add gettimeofday() benchmark from Michael Neuling
 - Avoid link stack corruption in __get_datapage() from Michael Neuling
 - Add virt_to_pfn and use this instead of opencoding from Aneesh Kumar
   K.V
 - Add ppc64le_defconfig from Michael Ellerman
 - pseries: extract of_helpers module from Andy Shevchenko
 - Correct string length in pseries_of_derive_parent() from Nathan
   Fontenot
 - Free the MSI bitmap if it was slab allocated from Denis Kirjanov
 - Shorten irq_chip name for the SIU from Christophe Leroy
 - Wait 1s for secondaries to enter OPAL during kexec from Samuel
   Mendoza-Jonas
 - Fix _ALIGN_* errors due to type difference, from Aneesh Kumar K.V
 - powerpc/pseries/hvcserver: don't memset pi_buff if it is null from
   Colin Ian King
 - Disable hugepd for 64K page size, from Aneesh Kumar K.V
 - Differentiate between hugetlb and THP during page walk from Aneesh
   Kumar K.V
 - Make PCI non-optional for pseries from Michael Ellerman
 - Individual System V IPC system calls from Sam bobroff
 - Add selftest of unmuxed IPC calls from Michael Ellerman
 - discard .exit.data at runtime from Stephen Rothwell
 - Delete old orphaned PrPMC 280/2800 DTS and boot file, from Paul
   Gortmaker
 - Use of_get_next_parent to simplify code from Christophe Jaillet
 - Paginate some xmon output from Sam bobroff
 - Add some more elements to the xmon PACA dump from Michael Ellerman
 - Allow the tm-syscall selftest to build with old headers from Michael
   Ellerman
 - Run EBB selftests only on POWER8 from Denis Kirjanov
 - Drop CONFIG_TUNE_CELL in favour of CONFIG_CELL_CPU from Michael
   Ellerman
 - Avoid reference to potentially freed memory in prom.c from Christophe
   Jaillet
 - Quieten boot wrapper output with run_cmd from Geoff Levand
 - EEH fixes and cleanups from Gavin Shan
 - Fix recursive fenced PHB on Broadcom shiner adapter from Gavin Shan
 - Use of_get_next_parent() in of_get_ibm_chip_id() from Michael
   Ellerman
 - Fix section mismatch warning in msi_bitmap_alloc() from Denis
   Kirjanov
 - Fix ps3-lpm white space from Rudhresh Kumar J
 - Fix ps3-vuart null dereference from Colin King
 - nvram: Add missing kfree in error path from Christophe Jaillet
 - nvram: Fix function name in some errors messages, from Christophe
   Jaillet
 - drivers/macintosh: adb: fix misleading Kconfig help text from Aaro
   Koskinen
 - agp/uninorth: fix a memleak in create_gatt_table from Denis Kirjanov
 - cxl: Free virtual PHB when removing from Andrew Donnellan
 - scripts/kconfig/Makefile: Allow KBUILD_DEFCONFIG to be a target from
   Michael Ellerman
 - scripts/kconfig/Makefile: Fix KBUILD_DEFCONFIG check when building
   with O= from Michael Ellerman
 - Freescale updates from Scott: Highlights include 64-bit book3e
   kexec/kdump support, a rework of the qoriq clock driver, device tree
   changes including qoriq fman nodes, support for a new 85xx board, and
   some fixes.
 - MPC5xxx updates from Anatolij: Highlights include a driver for
   MPC512x LocalPlus Bus FIFO with its device tree binding
   documentation, mpc512x device tree updates and some minor fixes.

* tag 'powerpc-4.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (106 commits)
  powerpc/msi: Fix section mismatch warning in msi_bitmap_alloc()
  powerpc/prom: Use of_get_next_parent() in of_get_ibm_chip_id()
  powerpc/pseries: Correct string length in pseries_of_derive_parent()
  powerpc/e6500: hw tablewalk: make sure we invalidate and write to the same tlb entry
  powerpc/mpc85xx: Add FSL QorIQ DPAA FMan support to the SoC device tree(s)
  powerpc/mpc85xx: Create dts components for the FSL QorIQ DPAA FMan
  powerpc/fsl: Add #clock-cells and clockgen label to clockgen nodes
  powerpc: handle error case in cpm_muram_alloc()
  powerpc: mpic: use IRQCHIP_SKIP_SET_WAKE instead of redundant mpic_irq_set_wake
  powerpc/book3e-64: Enable kexec
  powerpc/book3e-64/kexec: Set "r4 = 0" when entering spinloop
  powerpc/booke: Only use VIRT_PHYS_OFFSET on booke32
  powerpc/book3e-64/kexec: Enable SMP release
  powerpc/book3e-64/kexec: create an identity TLB mapping
  powerpc/book3e-64: Don't limit paca to 256 MiB
  powerpc/book3e/kdump: Enable crash_kexec_wait_realmode
  powerpc/book3e: support CONFIG_RELOCATABLE
  powerpc/booke64: Fix args to copy_and_flush
  powerpc/book3e-64: rename interrupt_end_book3e with __end_interrupts
  powerpc/e6500: kexec: Handle hardware threads
  ...

311 files changed, 6522 insertions, 1741 deletions

diff --git a/Documentation/devicetree/bindings/chosen.txt b/Documentation/devicetree/bindings/chosen.txt
index ed838f453f7a..6ae9d82d4c37 100644
--- a/Documentation/devicetree/bindings/chosen.txt
+++ b/Documentation/devicetree/bindings/chosen.txt
@@ -44,3 +44,11 @@ Implementation note: Linux will look for the property "linux,stdout-path" or
 on PowerPC "stdout" if "stdout-path" is not found.  However, the
 "linux,stdout-path" and "stdout" properties are deprecated. New platforms
 should only use the "stdout-path" property.
+
+linux,booted-from-kexec
+-----------------------
+
+This property is set (currently only on PowerPC, and only needed on
+book3e) by some versions of kexec-tools to tell the new kernel that it
+is being booted by kexec, as the booting environment may differ (e.g.
+a different secondary CPU release mechanism)
diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
index df4a259a6898..16a3ec433119 100644
--- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
+++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
@@ -1,6 +1,6 @@
 * Clock Block on Freescale QorIQ Platforms
 
-Freescale qoriq chips take primary clocking input from the external
+Freescale QorIQ chips take primary clocking input from the external
 SYSCLK signal. The SYSCLK input (frequency) is multiplied using
 multiple phase locked loops (PLL) to create a variety of frequencies
 which can then be passed to a variety of internal logic, including
@@ -13,14 +13,16 @@ which the chip complies.
 Chassis Version         Example Chips
 ---------------         -------------
 1.0                     p4080, p5020, p5040
-2.0                     t4240, b4860, t1040
+2.0                     t4240, b4860
 
 1. Clock Block Binding
 
 Required properties:
-- compatible: Should contain a specific clock block compatible string
-        and a single chassis clock compatible string.
-        Clock block strings include, but not limited to, one of the:
+- compatible: Should contain a chip-specific clock block compatible
+        string and (if applicable) may contain a chassis-version clock
+        compatible string.
+
+        Chip-specific strings are of the form "fsl,<chip>-clockgen", such as:
         * "fsl,p2041-clockgen"
         * "fsl,p3041-clockgen"
         * "fsl,p4080-clockgen"
@@ -30,15 +32,14 @@ Required properties:
         * "fsl,b4420-clockgen"
         * "fsl,b4860-clockgen"
         * "fsl,ls1021a-clockgen"
-        Chassis clock strings include:
+        Chassis-version clock strings include:
         * "fsl,qoriq-clockgen-1.0": for chassis 1.0 clocks
         * "fsl,qoriq-clockgen-2.0": for chassis 2.0 clocks
 - reg: Describes the address of the device's resources within the
         address space defined by its parent bus, and resource zero
         represents the clock register set
-- clock-frequency: Input system clock frequency
 
-Recommended properties:
+Optional properties:
 - ranges: Allows valid translation between child's address space and
         parent's. Must be present if the device has sub-nodes.
 - #address-cells: Specifies the number of cells used to represent
@@ -47,8 +48,46 @@ Recommended properties:
 - #size-cells: Specifies the number of cells used to represent
         the size of an address. Must be present if the device has
         sub-nodes and set to 1 if present
+- clock-frequency: Input system clock frequency (SYSCLK)
+- clocks: If clock-frequency is not specified, sysclk may be provided
+        as an input clock.  Either clock-frequency or clocks must be
+        provided.
+
+2. Clock Provider
+
+The clockgen node should act as a clock provider, though in older device
+trees the children of the clockgen node are the clock providers.
+
+When the clockgen node is a clock provider, #clock-cells = <2>.
+The first cell of the clock specifier is the clock type, and the
+second cell is the clock index for the specified type.
+
+        Type#   Name            Index Cell
+        0       sysclk          must be 0
+        1       cmux            index (n in CLKCnCSR)
+        2       hwaccel         index (n in CLKCGnHWACSR)
+        3       fman            0 for fm1, 1 for fm2
+        4       platform pll    0=pll, 1=pll/2, 2=pll/3, 3=pll/4
+
+3. Example
+
+        clockgen: global-utilities@e1000 {
+                compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0";
+                clock-frequency = <133333333>;
+                reg = <0xe1000 0x1000>;
+                #clock-cells = <2>;
+        };
+
+        fman@400000 {
+                ...
+                clocks = <&clockgen 3 0>;
+                ...
+        };
+}
+4. Legacy Child Nodes
 
-2. Clock Provider/Consumer Binding
+NOTE: These nodes are deprecated.  Kernels should continue to support
+device trees with these nodes, but new device trees should not use them.
 
 Most of the bindings are from the common clock binding[1].
  [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
@@ -82,7 +121,7 @@ Recommended properties:
 - reg: Should be the offset and length of clock block base address.
         The length should be 4.
 
-Example for clock block and clock provider:
+Legacy Example:
 / {
         clockgen: global-utilities@e1000 {
                 compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0";
@@ -142,7 +181,7 @@ Example for clock block and clock provider:
         };
 };
 
-Example for clock consumer:
+Example for legacy clock consumer:
 
 / {
         cpu0: PowerPC,e5500@0 {
diff --git a/Documentation/devicetree/bindings/net/maxim,ds26522.txt b/Documentation/devicetree/bindings/net/maxim,ds26522.txt
new file mode 100644
index 000000000000..ee8bb725f245
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/maxim,ds26522.txt
@@ -0,0 +1,13 @@
+* Maxim (Dallas) DS26522 Dual T1/E1/J1 Transceiver
+
+Required properties:
+- compatible: Should contain "maxim,ds26522".
+- reg: SPI CS.
+- spi-max-frequency: SPI clock.
+
+Example:
+        slic@1 {
+                compatible = "maxim,ds26522";
+                reg = <1>;
+                spi-max-frequency = <2000000>; /* input clock */
+        };
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mpc512x_lpbfifo.txt b/Documentation/devicetree/bindings/powerpc/fsl/mpc512x_lpbfifo.txt
new file mode 100644
index 000000000000..b3b392fe1f61
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/mpc512x_lpbfifo.txt
@@ -0,0 +1,21 @@
+Freescale MPC512x LocalPlus Bus FIFO (called SCLPC in the Reference Manual)
+
+Required properties:
+- compatible: should be "fsl,mpc512x-lpbfifo";
+- reg: should contain the offset and length of SCLPC register set;
+- interrupts: should contain the interrupt specifier for SCLPC; syntax of an
+    interrupt client node is described in interrupt-controller/interrupts.txt;
+- dmas: should contain the DMA specifier for SCLPC as described at
+    dma/dma.txt and dma/mpc512x-dma.txt;
+- dma-names: should be "rx-tx";
+
+Example:
+
+        sclpc@10100 {
+                compatible = "fsl,mpc512x-lpbfifo";
+                reg = <0x10100 0x50>;
+                interrupts = <7 0x8>;
+                dmas = <&dma0 26>;
+                dma-names = "rx-tx";
+        };
+
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 9a7057ec2154..db49e0d796b1 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -419,7 +419,7 @@ config PPC64_SUPPORTS_MEMORY_FAILURE
 
 config KEXEC
         bool "kexec system call"
-        depends on (PPC_BOOK3S || FSL_BOOKE || (44x && !SMP))
+        depends on (PPC_BOOK3S || FSL_BOOKE || (44x && !SMP)) || PPC_BOOK3E
         select KEXEC_CORE
         help
           kexec is a system call that implements the ability to shutdown your
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index b9b4af2af9a5..96efd8213c1c 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -157,8 +157,6 @@ CFLAGS-$(CONFIG_E500) += $(call cc-option,-mcpu=8540 -msoft-float,-mcpu=powerpc)
 endif
 endif
 
-CFLAGS-$(CONFIG_TUNE_CELL) += $(call cc-option,-mtune=cell)
-
 asinstr := $(call as-instr,lis 9$(comma)foo@high,-DHAVE_AS_ATHIGH=1)
 
 KBUILD_CPPFLAGS += -Iarch/$(ARCH) $(asinstr)
@@ -288,6 +286,10 @@ PHONY += pseries_le_defconfig
 pseries_le_defconfig:
         $(call merge_into_defconfig,pseries_defconfig,le)
 
+PHONY += ppc64le_defconfig
+ppc64le_defconfig:
+        $(call merge_into_defconfig,ppc64_defconfig,le)
+
 PHONY += mpc85xx_defconfig
 mpc85xx_defconfig:
         $(call merge_into_defconfig,mpc85xx_basic_defconfig,\
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 4eec430d8fa8..99e4487248ff 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -364,6 +364,9 @@ $(obj)/cuImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits)
 $(obj)/cuImage.%: vmlinux $(obj)/%.dtb $(wrapperbits)
         $(call if_changed,wrap,cuboot-$*,,$(obj)/$*.dtb)
 
+$(obj)/cuImage.%: vmlinux $(obj)/fsl/%.dtb $(wrapperbits)
+        $(call if_changed,wrap,cuboot-$*,,$(obj)/fsl/$*.dtb)
+
 $(obj)/simpleImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits)
         $(call if_changed,wrap,simpleboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz)
 
diff --git a/arch/powerpc/boot/dts/b4420qds.dts b/arch/powerpc/boot/dts/fsl/b4420qds.dts
index 508dbdf33c81..cd9203ceedc0 100644
--- a/arch/powerpc/boot/dts/b4420qds.dts
+++ b/arch/powerpc/boot/dts/fsl/b4420qds.dts
@@ -32,7 +32,7 @@
  * this software, even if advised of the possibility of such damage.
  */
 
-/include/ "fsl/b4420si-pre.dtsi"
+/include/ "b4420si-pre.dtsi"
 /include/ "b4qds.dtsi"
 
 / {
@@ -47,4 +47,4 @@
 
 };
 
-/include/ "fsl/b4420si-post.dtsi"
+/include/ "b4420si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
index 1ea8602e4345..f996cced45e0 100644
--- a/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
@@ -89,7 +89,9 @@
                 compatible = "fsl,b4420-rcpm", "fsl,qoriq-rcpm-2.0";
         };
 
-        L2: l2-cache-controller@c20000 {
+        L2_1: l2-cache-controller@c20000 {
                 compatible = "fsl,b4420-l2-cache-controller";
+                reg = <0xc20000 0x40000>;
+                next-level-cache = <&cpc>;
         };
 };
diff --git a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
index 338af7e39dd9..bc3bf9333dde 100644
--- a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
@@ -1,7 +1,7 @@
 /*
  * B4420 Silicon/SoC Device Tree Source (pre include)
  *
- * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2012 - 2015 Freescale Semiconductor, Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -54,8 +54,13 @@
                 dma0 = &dma0;
                 dma1 = &dma1;
                 sdhc = &sdhc;
-        };
 
+                fman0 = &fman0;
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                ethernet3 = &enet3;
+        };
 
         cpus {
                 #address-cells = <1>;
@@ -65,14 +70,14 @@
                         device_type = "cpu";
                         reg = <0 1>;
                         clocks = <&mux0>;
-                        next-level-cache = <&L2>;
+                        next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x80000000>;
                 };
                 cpu1: PowerPC,e6500@2 {
                         device_type = "cpu";
                         reg = <2 3>;
                         clocks = <&mux0>;
-                        next-level-cache = <&L2>;
+                        next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x80000000>;
                 };
         };
diff --git a/arch/powerpc/boot/dts/b4860qds.dts b/arch/powerpc/boot/dts/fsl/b4860qds.dts
index 6bb3707ffe3d..ba8c9bea33ac 100644
--- a/arch/powerpc/boot/dts/b4860qds.dts
+++ b/arch/powerpc/boot/dts/fsl/b4860qds.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/b4860si-pre.dtsi"
+/include/ "b4860si-pre.dtsi"
 /include/ "b4qds.dtsi"
 
 / {
@@ -58,4 +58,4 @@
 
 };
 
-/include/ "fsl/b4860si-post.dtsi"
+/include/ "b4860si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
index 9ba904be39ee..868719821106 100644
--- a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
@@ -1,7 +1,7 @@
 /*
  * B4860 Silicon/SoC Device Tree Source (post include)
  *
- * Copyright 2012 - 2014 Freescale Semiconductor Inc.
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -51,14 +51,12 @@
                 #address-cells = <2>;
                 #size-cells = <2>;
                 cell-index = <1>;
-                fsl,liodn-reg = <&guts 0x510>; /* RIO1LIODNR */
         };
 
         port2 {
                 #address-cells = <2>;
                 #size-cells = <2>;
                 cell-index = <2>;
-                fsl,liodn-reg = <&guts 0x514>; /* RIO2LIODNR */
         };
 };
 
@@ -260,7 +258,27 @@
                 compatible = "fsl,b4860-rcpm", "fsl,qoriq-rcpm-2.0";
         };
 
-        L2: l2-cache-controller@c20000 {
+/include/ "qoriq-fman3-0-1g-4.dtsi"
+/include/ "qoriq-fman3-0-1g-5.dtsi"
+/include/ "qoriq-fman3-0-10g-0.dtsi"
+/include/ "qoriq-fman3-0-10g-1.dtsi"
+        fman@400000 {
+                enet4: ethernet@e8000 {
+                };
+
+                enet5: ethernet@ea000 {
+                };
+
+                enet6: ethernet@f0000 {
+                };
+
+                enet7: ethernet@f2000 {
+                };
+        };
+
+        L2_1: l2-cache-controller@c20000 {
                 compatible = "fsl,b4860-l2-cache-controller";
+                reg = <0xc20000 0x40000>;
+                next-level-cache = <&cpc>;
         };
 };
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
index 1948f73fd26b..8797ce146512 100644
--- a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
@@ -1,7 +1,7 @@
 /*
  * B4860 Silicon/SoC Device Tree Source (pre include)
  *
- * Copyright 2012 Freescale Semiconductor Inc.
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -54,6 +54,16 @@
                 dma0 = &dma0;
                 dma1 = &dma1;
                 sdhc = &sdhc;
+
+                fman0 = &fman0;
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                ethernet3 = &enet3;
+                ethernet4 = &enet4;
+                ethernet5 = &enet5;
+                ethernet6 = &enet6;
+                ethernet7 = &enet7;
         };
 
 
@@ -65,28 +75,28 @@
                         device_type = "cpu";
                         reg = <0 1>;
                         clocks = <&mux0>;
-                        next-level-cache = <&L2>;
+                        next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x80000000>;
                 };
                 cpu1: PowerPC,e6500@2 {
                         device_type = "cpu";
                         reg = <2 3>;
                         clocks = <&mux0>;
-                        next-level-cache = <&L2>;
+                        next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x80000000>;
                 };
                 cpu2: PowerPC,e6500@4 {
                         device_type = "cpu";
                         reg = <4 5>;
                         clocks = <&mux0>;
-                        next-level-cache = <&L2>;
+                        next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x80000000>;
                 };
                 cpu3: PowerPC,e6500@6 {
                         device_type = "cpu";
                         reg = <6 7>;
                         clocks = <&mux0>;
-                        next-level-cache = <&L2>;
+                        next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x80000000>;
                 };
         };
diff --git a/arch/powerpc/boot/dts/b4qds.dtsi b/arch/powerpc/boot/dts/fsl/b4qds.dtsi
index 559d00657fb5..64557742fb99 100644
--- a/arch/powerpc/boot/dts/b4qds.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4qds.dtsi
@@ -229,4 +229,4 @@
 
 };
 
-/include/ "fsl/b4si-post.dtsi"
+/include/ "b4si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
index 603910ac1db0..74866ac52f39 100644
--- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
@@ -1,7 +1,7 @@
 /*
  * B4420 Silicon/SoC Device Tree Source (post include)
  *
- * Copyright 2012 - 2014 Freescale Semiconductor, Inc.
+ * Copyright 2012 - 2015 Freescale Semiconductor, Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -466,9 +466,32 @@
                 interrupts = <16 2 1 29>;
         };
 
-        L2: l2-cache-controller@c20000 {
-                compatible = "fsl,b4-l2-cache-controller";
-                reg = <0xc20000 0x1000>;
-                next-level-cache = <&cpc>;
+/include/ "qoriq-fman3-0.dtsi"
+/include/ "qoriq-fman3-0-1g-0.dtsi"
+/include/ "qoriq-fman3-0-1g-1.dtsi"
+/include/ "qoriq-fman3-0-1g-2.dtsi"
+/include/ "qoriq-fman3-0-1g-3.dtsi"
+        fman@400000 {
+                interrupts = <96 2 0 0>, <16 2 1 30>;
+
+                enet0: ethernet@e0000 {
+                };
+
+                enet1: ethernet@e2000 {
+                };
+
+                enet2: ethernet@e4000 {
+                };
+
+                enet3: ethernet@e6000 {
+                };
+
+                mdio@fc000 {
+                        interrupts = <100 1 0 0>;
+                };
+
+                mdio@fd000 {
+                        interrupts = <101 1 0 0>;
+                };
         };
 };
diff --git a/arch/powerpc/boot/dts/bsc9131rdb.dts b/arch/powerpc/boot/dts/fsl/bsc9131rdb.dts
index e13d2d4877b0..26366e6ff657 100644
--- a/arch/powerpc/boot/dts/bsc9131rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/bsc9131rdb.dts
@@ -9,7 +9,7 @@
  * option) any later version.
  */
 
-/include/ "fsl/bsc9131si-pre.dtsi"
+/include/ "bsc9131si-pre.dtsi"
 
 / {
         model = "fsl,bsc9131rdb";
@@ -31,4 +31,4 @@
 };
 
 /include/ "bsc9131rdb.dtsi"
-/include/ "fsl/bsc9131si-post.dtsi"
+/include/ "bsc9131si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/bsc9131rdb.dtsi b/arch/powerpc/boot/dts/fsl/bsc9131rdb.dtsi
index 45efcbadb23c..f4d96d277ed5 100644
--- a/arch/powerpc/boot/dts/bsc9131rdb.dtsi
+++ b/arch/powerpc/boot/dts/fsl/bsc9131rdb.dtsi
@@ -80,6 +80,18 @@
                 status = "disabled";
         };
 
+        ptp_clock@b0e00 {
+                compatible = "fsl,etsec-ptp";
+                reg = <0xb0e00 0xb0>;
+                interrupts = <68 2 0 0 69 2 0 0>;
+                fsl,tclk-period = <5>;
+                fsl,tmr-prsc    = <2>;
+                fsl,tmr-add     = <0xcccccccd>;
+                fsl,tmr-fiper1  = <999999995>;
+                fsl,tmr-fiper2  = <99990>;
+                fsl,max-adj     = <249999999>;
+        };
+
         enet0: ethernet@b0000 {
                 phy-handle = <&phy0>;
                 phy-connection-type = "rgmii-id";
diff --git a/arch/powerpc/boot/dts/bsc9132qds.dts b/arch/powerpc/boot/dts/fsl/bsc9132qds.dts
index 6cab1062bc74..70882ade606d 100644
--- a/arch/powerpc/boot/dts/bsc9132qds.dts
+++ b/arch/powerpc/boot/dts/fsl/bsc9132qds.dts
@@ -9,7 +9,7 @@
  * option) any later version.
  */
 
-/include/ "fsl/bsc9132si-pre.dtsi"
+/include/ "bsc9132si-pre.dtsi"
 
 / {
         model = "fsl,bsc9132qds";
@@ -32,4 +32,4 @@
 };
 
 /include/ "bsc9132qds.dtsi"
-/include/ "fsl/bsc9132si-post.dtsi"
+/include/ "bsc9132si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/bsc9132qds.dtsi b/arch/powerpc/boot/dts/fsl/bsc9132qds.dtsi
index af8e88830221..7a13bf2aa439 100644
--- a/arch/powerpc/boot/dts/bsc9132qds.dtsi
+++ b/arch/powerpc/boot/dts/fsl/bsc9132qds.dtsi
@@ -87,6 +87,18 @@
                 };
         };
 
+        ptp_clock@b0e00 {
+                compatible = "fsl,etsec-ptp";
+                reg = <0xb0e00 0xb0>;
+                interrupts = <68 2 0 0 69 2 0 0>;
+                fsl,tclk-period = <5>;
+                fsl,tmr-prsc    = <2>;
+                fsl,tmr-add     = <0xcccccccd>;
+                fsl,tmr-fiper1  = <999999995>;
+                fsl,tmr-fiper2  = <99990>;
+                fsl,max-adj     = <249999999>;
+        };
+
         enet0: ethernet@b0000 {
                 phy-handle = <&phy0>;
                 tbi-handle = <&tbi0>;
diff --git a/arch/powerpc/boot/dts/c293pcie.dts b/arch/powerpc/boot/dts/fsl/c293pcie.dts
index 6681cc21030b..53ab4db9e79c 100644
--- a/arch/powerpc/boot/dts/c293pcie.dts
+++ b/arch/powerpc/boot/dts/fsl/c293pcie.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/c293si-pre.dtsi"
+/include/ "c293si-pre.dtsi"
 
 / {
         model = "fsl,C293PCIE";
@@ -221,4 +221,4 @@
                 phy-connection-type = "rgmii-id";
         };
 };
-/include/ "fsl/c293si-post.dtsi"
+/include/ "c293si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/cyrus_p5020.dts b/arch/powerpc/boot/dts/fsl/cyrus_p5020.dts
new file mode 100644
index 000000000000..c6033909db60
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/cyrus_p5020.dts
@@ -0,0 +1,155 @@
+/*
+ * Cyrus 5020 Device Tree Source, based on p5020ds.dts
+ *
+ * Copyright 2015 Andy Fleming
+ *
+ * p5020ds.dts copyright:
+ * Copyright 2010 - 2014 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/include/ "p5020si-pre.dtsi"
+
+/ {
+        model = "varisys,CYRUS";
+        compatible = "varisys,CYRUS";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        interrupt-parent = <&mpic>;
+
+        memory {
+                device_type = "memory";
+        };
+
+        reserved-memory {
+                #address-cells = <2>;
+                #size-cells = <2>;
+                ranges;
+
+                bman_fbpr: bman-fbpr {
+                        size = <0 0x1000000>;
+                        alignment = <0 0x1000000>;
+                };
+                qman_fqd: qman-fqd {
+                        size = <0 0x400000>;
+                        alignment = <0 0x400000>;
+                };
+                qman_pfdr: qman-pfdr {
+                        size = <0 0x2000000>;
+                        alignment = <0 0x2000000>;
+                };
+        };
+
+        dcsr: dcsr@f00000000 {
+                ranges = <0x00000000 0xf 0x00000000 0x01008000>;
+        };
+
+        bportals: bman-portals@ff4000000 {
+                ranges = <0x0 0xf 0xf4000000 0x200000>;
+        };
+
+        qportals: qman-portals@ff4200000 {
+                ranges = <0x0 0xf 0xf4200000 0x200000>;
+        };
+
+        soc: soc@ffe000000 {
+                ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+                reg = <0xf 0xfe000000 0 0x00001000>;
+                spi@110000 {
+                };
+
+                i2c@118100 {
+                };
+
+                i2c@119100 {
+                        rtc@6f {
+                                compatible = "microchip,mcp7941x";
+                                reg = <0x6f>;
+                        };
+                };
+        };
+
+        rio: rapidio@ffe0c0000 {
+                reg = <0xf 0xfe0c0000 0 0x11000>;
+
+                port1 {
+                        ranges = <0 0 0xc 0x20000000 0 0x10000000>;
+                };
+                port2 {
+                        ranges = <0 0 0xc 0x30000000 0 0x10000000>;
+                };
+        };
+
+        lbc: localbus@ffe124000 {
+                reg = <0xf 0xfe124000 0 0x1000>;
+                ranges = <0 0 0xf 0xe8000000 0x08000000
+                          2 0 0xf 0xffa00000 0x00040000
+                          3 0 0xf 0xffdf0000 0x00008000>;
+        };
+
+        pci0: pcie@ffe200000 {
+                reg = <0xf 0xfe200000 0 0x1000>;
+                ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
+                          0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
+                pcie@0 {
+                        ranges = <0x02000000 0 0xe0000000
+                                  0x02000000 0 0xe0000000
+                                  0 0x20000000
+
+                                  0x01000000 0 0x00000000
+                                  0x01000000 0 0x00000000
+                                  0 0x00010000>;
+                };
+        };
+
+        pci1: pcie@ffe201000 {
+                reg = <0xf 0xfe201000 0 0x1000>;
+                ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
+                          0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
+                pcie@0 {
+                        ranges = <0x02000000 0 0xe0000000
+                                  0x02000000 0 0xe0000000
+                                  0 0x20000000
+
+                                  0x01000000 0 0x00000000
+                                  0x01000000 0 0x00000000
+                                  0 0x00010000>;
+                };
+        };
+
+        pci2: pcie@ffe202000 {
+                reg = <0xf 0xfe202000 0 0x1000>;
+                ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
+                          0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
+                pcie@0 {
+                        ranges = <0x02000000 0 0xe0000000
+                                  0x02000000 0 0xe0000000
+                                  0 0x20000000
+
+                                  0x01000000 0 0x00000000
+                                  0x01000000 0 0x00000000
+                                  0 0x00010000>;
+                };
+        };
+
+        pci3: pcie@ffe203000 {
+                reg = <0xf 0xfe203000 0 0x1000>;
+                ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000
+                          0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
+                pcie@0 {
+                        ranges = <0x02000000 0 0xe0000000
+                                  0x02000000 0 0xe0000000
+                                  0 0x20000000
+
+                                  0x01000000 0 0x00000000
+                                  0x01000000 0 0x00000000
+                                  0 0x00010000>;
+                };
+        };
+};
+
+/include/ "p5020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/ge_imp3a.dts b/arch/powerpc/boot/dts/fsl/ge_imp3a.dts
index fefae416a097..a2bb47f4edbe 100644
--- a/arch/powerpc/boot/dts/ge_imp3a.dts
+++ b/arch/powerpc/boot/dts/fsl/ge_imp3a.dts
@@ -12,7 +12,7 @@
  * Copyright 2009 Freescale Semiconductor Inc.
  */
 
-/include/ "fsl/p2020si-pre.dtsi"
+/include/ "p2020si-pre.dtsi"
 
 / {
         model = "GE_IMP3A";
@@ -252,4 +252,4 @@
         };
 };
 
-/include/ "fsl/p2020si-post.dtsi"
+/include/ "p2020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/kmcoge4.dts b/arch/powerpc/boot/dts/fsl/kmcoge4.dts
index 48dab6a50437..6858ec9ef295 100644
--- a/arch/powerpc/boot/dts/kmcoge4.dts
+++ b/arch/powerpc/boot/dts/fsl/kmcoge4.dts
@@ -12,7 +12,7 @@
  * option) any later version.
  */
 
-/include/ "fsl/p2041si-pre.dtsi"
+/include/ "p2041si-pre.dtsi"
 
 / {
         model = "keymile,kmcoge4";
@@ -176,4 +176,4 @@
         };
 };
 
-/include/ "fsl/p2041si-post.dtsi"
+/include/ "p2041si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dts b/arch/powerpc/boot/dts/fsl/mpc8536ds.dts
index 19736222a0b9..96cdce841205 100644
--- a/arch/powerpc/boot/dts/mpc8536ds.dts
+++ b/arch/powerpc/boot/dts/fsl/mpc8536ds.dts
@@ -9,7 +9,7 @@
  * option) any later version.
  */
 
-/include/ "fsl/mpc8536si-pre.dtsi"
+/include/ "mpc8536si-pre.dtsi"
 
 / {
         model = "fsl,mpc8536ds";
@@ -105,5 +105,5 @@
         };
 };
 
-/include/ "fsl/mpc8536si-post.dtsi"
+/include/ "mpc8536si-post.dtsi"
 /include/ "mpc8536ds.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dtsi b/arch/powerpc/boot/dts/fsl/mpc8536ds.dtsi
index 937ad7e46119..937ad7e46119 100644
--- a/arch/powerpc/boot/dts/mpc8536ds.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8536ds.dtsi
diff --git a/arch/powerpc/boot/dts/mpc8536ds_36b.dts b/arch/powerpc/boot/dts/fsl/mpc8536ds_36b.dts
index 6c723ee108cd..38d326ce92d8 100644
--- a/arch/powerpc/boot/dts/mpc8536ds_36b.dts
+++ b/arch/powerpc/boot/dts/fsl/mpc8536ds_36b.dts
@@ -9,7 +9,7 @@
  * option) any later version.
  */
 
-/include/ "fsl/mpc8536si-pre.dtsi"
+/include/ "mpc8536si-pre.dtsi"
 
 / {
         model = "fsl,mpc8536ds";
@@ -105,5 +105,5 @@
         };
 };
 
-/include/ "fsl/mpc8536si-post.dtsi"
+/include/ "mpc8536si-post.dtsi"
 /include/ "mpc8536ds.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
index c8b2daa40ac8..41935709ebe8 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
@@ -172,7 +172,7 @@
 
         /* mark compat w/8572 to get some erratum treatment */
         gpio-controller@f000 {
-                compatible = "fsl,mpc8572-gpio", "fsl,pq3-gpio";
+                compatible = "fsl,mpc8572-gpio";
         };
 
         sata@18000 {
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/fsl/mpc8540ads.dts
index 7ce274c9a2d5..e6d0b166d68d 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/fsl/mpc8540ads.dts
@@ -11,7 +11,7 @@
 
 /dts-v1/;
 
-/include/ "fsl/e500v2_power_isa.dtsi"
+/include/ "e500v2_power_isa.dtsi"
 
 / {
         model = "MPC8540ADS";
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/fsl/mpc8541cds.dts
index 4d35a3e0fb02..9fa2c734a988 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/fsl/mpc8541cds.dts
@@ -11,7 +11,7 @@
 
 /dts-v1/;
 
-/include/ "fsl/e500v2_power_isa.dtsi"
+/include/ "e500v2_power_isa.dtsi"
 
 / {
         model = "MPC8541CDS";
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/fsl/mpc8544ds.dts
index ed38874c3a36..5a6e46861ab5 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/fsl/mpc8544ds.dts
@@ -9,7 +9,7 @@
  * option) any later version.
  */
 
-/include/ "fsl/mpc8544si-pre.dtsi"
+/include/ "mpc8544si-pre.dtsi"
 
 / {
         model = "MPC8544DS";
@@ -103,5 +103,5 @@
  * for interrupt-map & interrupt-map-mask
  */
 
-/include/ "fsl/mpc8544si-post.dtsi"
+/include/ "mpc8544si-post.dtsi"
 /include/ "mpc8544ds.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dtsi b/arch/powerpc/boot/dts/fsl/mpc8544ds.dtsi
index 47d986b041f6..47d986b041f6 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8544ds.dtsi
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dtsi b/arch/powerpc/boot/dts/fsl/mpc8548cds.dtsi
index 3bc7d4711220..3bc7d4711220 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8548cds.dtsi
diff --git a/arch/powerpc/boot/dts/mpc8548cds_32b.dts b/arch/powerpc/boot/dts/fsl/mpc8548cds_32b.dts
index 6fd63163fc6b..e4620bb192f4 100644
--- a/arch/powerpc/boot/dts/mpc8548cds_32b.dts
+++ b/arch/powerpc/boot/dts/fsl/mpc8548cds_32b.dts
@@ -9,7 +9,7 @@
  * option) any later version.
  */
 
-/include/ "fsl/mpc8548si-pre.dtsi"
+/include/ "mpc8548si-pre.dtsi"
 
 / {
         model = "MPC8548CDS";
@@ -82,5 +82,5 @@
  * for interrupt-map & interrupt-map-mask.
  */
 
-/include/ "fsl/mpc8548si-post.dtsi"
+/include/ "mpc8548si-post.dtsi"
 /include/ "mpc8548cds.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8548cds_36b.dts b/arch/powerpc/boot/dts/fsl/mpc8548cds_36b.dts
index 10e551b11bd6..bca7c09d3edf 100644
--- a/arch/powerpc/boot/dts/mpc8548cds_36b.dts
+++ b/arch/powerpc/boot/dts/fsl/mpc8548cds_36b.dts
@@ -9,7 +9,7 @@
  * option) any later version.
  */
 
-/include/ "fsl/mpc8548si-pre.dtsi"
+/include/ "mpc8548si-pre.dtsi"
 
 / {
         model = "MPC8548CDS";
@@ -82,5 +82,5 @@
  * for interrupt-map & interrupt-map-mask.
  */
 
-/include/ "fsl/mpc8548si-post.dtsi"
+/include/ "mpc8548si-post.dtsi"
 /include/ "mpc8548cds.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/fsl/mpc8555cds.dts
index f115f21cb0ae..272f08caea92 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/fsl/mpc8555cds.dts
@@ -11,7 +11,7 @@
 
 /dts-v1/;
 
-/include/ "fsl/e500v2_power_isa.dtsi"
+/include/ "e500v2_power_isa.dtsi"
 
 / {
         model = "MPC8555CDS";
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/fsl/mpc8560ads.dts
index 0d70921d6125..7a822b08aa35 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/fsl/mpc8560ads.dts
@@ -11,7 +11,7 @@
 
 /dts-v1/;
 
-/include/ "fsl/e500v2_power_isa.dtsi"
+/include/ "e500v2_power_isa.dtsi"
 
 / {
         model = "MPC8560ADS";
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/fsl/mpc8568mds.dts
index bead2b655b9f..01706a339603 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/fsl/mpc8568mds.dts
@@ -9,7 +9,7 @@
  * option) any later version.
  */
 
-/include/ "fsl/mpc8568si-pre.dtsi"
+/include/ "mpc8568si-pre.dtsi"
 
 / {
         model = "MPC8568EMDS";
@@ -311,4 +311,4 @@
         };
 };
 
-/include/ "fsl/mpc8568si-post.dtsi"
+/include/ "mpc8568si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8569mds.dts b/arch/powerpc/boot/dts/fsl/mpc8569mds.dts
index d0dcdafa5eb2..a95ff7d2392c 100644
--- a/arch/powerpc/boot/dts/mpc8569mds.dts
+++ b/arch/powerpc/boot/dts/fsl/mpc8569mds.dts
@@ -9,7 +9,7 @@
  * option) any later version.
  */
 
-/include/ "fsl/mpc8569si-pre.dtsi"
+/include/ "mpc8569si-pre.dtsi"
 
 / {
         model = "MPC8569EMDS";
@@ -444,4 +444,4 @@
         };
 };
 
-/include/ "fsl/mpc8569si-post.dtsi"
+/include/ "mpc8569si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/fsl/mpc8572ds.dts
index 0c9f2955deb4..8ee5b24cc59e 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/fsl/mpc8572ds.dts
@@ -9,7 +9,7 @@
  * option) any later version.
  */
 
-/include/ "fsl/mpc8572si-pre.dtsi"
+/include/ "mpc8572si-pre.dtsi"
 
 / {
         model = "fsl,MPC8572DS";
@@ -86,5 +86,5 @@
  * for interrupt-map & interrupt-map-mask
  */
 
-/include/ "fsl/mpc8572si-post.dtsi"
+/include/ "mpc8572si-post.dtsi"
 /include/ "mpc8572ds.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dtsi b/arch/powerpc/boot/dts/fsl/mpc8572ds.dtsi
index 357490bb84da..357490bb84da 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8572ds.dtsi
diff --git a/arch/powerpc/boot/dts/mpc8572ds_36b.dts b/arch/powerpc/boot/dts/fsl/mpc8572ds_36b.dts
index 6c3d0b305e1b..5c48b464669b 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_36b.dts
+++ b/arch/powerpc/boot/dts/fsl/mpc8572ds_36b.dts
@@ -9,7 +9,7 @@
  * option) any later version.
  */
 
-/include/ "fsl/mpc8572si-pre.dtsi"
+/include/ "mpc8572si-pre.dtsi"
 
 / {
         model = "fsl,MPC8572DS";
@@ -86,5 +86,5 @@
  * for interrupt-map & interrupt-map-mask
  */
 
-/include/ "fsl/mpc8572si-post.dtsi"
+/include/ "mpc8572si-post.dtsi"
 /include/ "mpc8572ds.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts b/arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core0.dts
index ef9ef56b3eeb..ef9ef56b3eeb 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
+++ b/arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core0.dts
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts b/arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core1.dts
index 24564ee108e5..24564ee108e5 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
+++ b/arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core1.dts
diff --git a/arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi
index d44e25a48734..49294cf36b4e 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi
@@ -162,7 +162,7 @@
 /include/ "pq3-dma-1.dtsi"
 /include/ "pq3-gpio-0.dtsi"
         gpio-controller@f000 {
-                compatible = "fsl,mpc8572-gpio", "fsl,pq3-gpio";
+                compatible = "fsl,mpc8572-gpio";
         };
 
         L2: l2-cache-controller@20000 {
diff --git a/arch/powerpc/boot/dts/mvme2500.dts b/arch/powerpc/boot/dts/fsl/mvme2500.dts
index 67714cf0f745..c7bc1a0c7194 100644
--- a/arch/powerpc/boot/dts/mvme2500.dts
+++ b/arch/powerpc/boot/dts/fsl/mvme2500.dts
@@ -12,7 +12,7 @@
  * Copyright 2009 Freescale Semiconductor Inc.
  */
 
-/include/ "fsl/p2020si-pre.dtsi"
+/include/ "p2020si-pre.dtsi"
 
 / {
         model = "MVME2500";
@@ -258,7 +258,7 @@
         };
 };
 
-/include/ "fsl/p2020si-post.dtsi"
+/include/ "p2020si-post.dtsi"
 
 / {
         soc@ffe00000 {
diff --git a/arch/powerpc/boot/dts/oca4080.dts b/arch/powerpc/boot/dts/fsl/oca4080.dts
index 42796c5b0561..17bc6f391248 100644
--- a/arch/powerpc/boot/dts/oca4080.dts
+++ b/arch/powerpc/boot/dts/fsl/oca4080.dts
@@ -36,7 +36,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p4080si-pre.dtsi"
+/include/ "p4080si-pre.dtsi"
 
 / {
         model = "fsl,OCA4080";
@@ -142,4 +142,4 @@
         };
 };
 
-/include/ "fsl/p4080si-post.dtsi"
+/include/ "p4080si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010rdb-pa.dts b/arch/powerpc/boot/dts/fsl/p1010rdb-pa.dts
index 767d4c032857..e4ab53c4ab50 100644
--- a/arch/powerpc/boot/dts/p1010rdb-pa.dts
+++ b/arch/powerpc/boot/dts/fsl/p1010rdb-pa.dts
@@ -9,7 +9,7 @@
  * option) any later version.
  */
 
-/include/ "fsl/p1010si-pre.dtsi"
+/include/ "p1010si-pre.dtsi"
 
 / {
         model = "fsl,P1010RDB";
@@ -20,4 +20,4 @@
 
 /include/ "p1010rdb.dtsi"
 /include/ "p1010rdb-pa.dtsi"
-/include/ "fsl/p1010si-post.dtsi"
+/include/ "p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010rdb-pa.dtsi b/arch/powerpc/boot/dts/fsl/p1010rdb-pa.dtsi
index 434fb2d58575..434fb2d58575 100644
--- a/arch/powerpc/boot/dts/p1010rdb-pa.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1010rdb-pa.dtsi
diff --git a/arch/powerpc/boot/dts/p1010rdb-pa_36b.dts b/arch/powerpc/boot/dts/fsl/p1010rdb-pa_36b.dts
index 3033371bc007..03bd76ca8406 100644
--- a/arch/powerpc/boot/dts/p1010rdb-pa_36b.dts
+++ b/arch/powerpc/boot/dts/fsl/p1010rdb-pa_36b.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p1010si-pre.dtsi"
+/include/ "p1010si-pre.dtsi"
 
 / {
         model = "fsl,P1010RDB";
@@ -43,4 +43,4 @@
 
 /include/ "p1010rdb.dtsi"
 /include/ "p1010rdb-pa.dtsi"
-/include/ "fsl/p1010si-post.dtsi"
+/include/ "p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010rdb-pb.dts b/arch/powerpc/boot/dts/fsl/p1010rdb-pb.dts
index 6eeb7d3185be..37681fda4b7d 100644
--- a/arch/powerpc/boot/dts/p1010rdb-pb.dts
+++ b/arch/powerpc/boot/dts/fsl/p1010rdb-pb.dts
@@ -9,7 +9,7 @@
  * option) any later version.
  */
 
-/include/ "fsl/p1010si-pre.dtsi"
+/include/ "p1010si-pre.dtsi"
 
 / {
         model = "fsl,P1010RDB-PB";
@@ -32,4 +32,4 @@
         interrupts = <1 1 0 0>;
 };
 
-/include/ "fsl/p1010si-post.dtsi"
+/include/ "p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010rdb-pb_36b.dts b/arch/powerpc/boot/dts/fsl/p1010rdb-pb_36b.dts
index 7ab3c907b326..4cf255fedc96 100644
--- a/arch/powerpc/boot/dts/p1010rdb-pb_36b.dts
+++ b/arch/powerpc/boot/dts/fsl/p1010rdb-pb_36b.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p1010si-pre.dtsi"
+/include/ "p1010si-pre.dtsi"
 
 / {
         model = "fsl,P1010RDB-PB";
@@ -55,4 +55,4 @@
         interrupts = <1 1 0 0>;
 };
 
-/include/ "fsl/p1010si-post.dtsi"
+/include/ "p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010rdb.dtsi b/arch/powerpc/boot/dts/fsl/p1010rdb.dtsi
index ea534efa790d..0f0ced69835a 100644
--- a/arch/powerpc/boot/dts/p1010rdb.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1010rdb.dtsi
@@ -186,6 +186,18 @@
                 };
         };
 
+        ptp_clock@b0e00 {
+                compatible = "fsl,etsec-ptp";
+                reg = <0xb0e00 0xb0>;
+                interrupts = <68 2 0 0 69 2 0 0>;
+                fsl,tclk-period = <10>;
+                fsl,tmr-prsc    = <2>;
+                fsl,tmr-add     = <0x80000016>;
+                fsl,tmr-fiper1  = <999999990>;
+                fsl,tmr-fiper2  = <99990>;
+                fsl,max-adj     = <199999999>;
+        };
+
         enet0: ethernet@b0000 {
                 phy-handle = <&phy0>;
                 phy-connection-type = "rgmii-id";
diff --git a/arch/powerpc/boot/dts/p1010rdb_32b.dtsi b/arch/powerpc/boot/dts/fsl/p1010rdb_32b.dtsi
index fdc19aab2f70..fdc19aab2f70 100644
--- a/arch/powerpc/boot/dts/p1010rdb_32b.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1010rdb_32b.dtsi
diff --git a/arch/powerpc/boot/dts/p1010rdb_36b.dtsi b/arch/powerpc/boot/dts/fsl/p1010rdb_36b.dtsi
index de2fceed4f79..de2fceed4f79 100644
--- a/arch/powerpc/boot/dts/p1010rdb_36b.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1010rdb_36b.dtsi
diff --git a/arch/powerpc/boot/dts/p1020mbg-pc.dtsi b/arch/powerpc/boot/dts/fsl/p1020mbg-pc.dtsi
index a24699cfea9c..a24699cfea9c 100644
--- a/arch/powerpc/boot/dts/p1020mbg-pc.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1020mbg-pc.dtsi
diff --git a/arch/powerpc/boot/dts/p1020mbg-pc_32b.dts b/arch/powerpc/boot/dts/fsl/p1020mbg-pc_32b.dts
index ab8f076eae90..b29d1fcb5e6b 100644
--- a/arch/powerpc/boot/dts/p1020mbg-pc_32b.dts
+++ b/arch/powerpc/boot/dts/fsl/p1020mbg-pc_32b.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p1020si-pre.dtsi"
+/include/ "p1020si-pre.dtsi"
 / {
         model = "fsl,P1020MBG-PC";
         compatible = "fsl,P1020MBG-PC";
@@ -86,4 +86,4 @@
 };
 
 /include/ "p1020mbg-pc.dtsi"
-/include/ "fsl/p1020si-post.dtsi"
+/include/ "p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020mbg-pc_36b.dts b/arch/powerpc/boot/dts/fsl/p1020mbg-pc_36b.dts
index 9e9f401419b1..678d0eec24e2 100644
--- a/arch/powerpc/boot/dts/p1020mbg-pc_36b.dts
+++ b/arch/powerpc/boot/dts/fsl/p1020mbg-pc_36b.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p1020si-pre.dtsi"
+/include/ "p1020si-pre.dtsi"
 / {
         model = "fsl,P1020MBG-PC";
         compatible = "fsl,P1020MBG-PC";
@@ -86,4 +86,4 @@
 };
 
 /include/ "p1020mbg-pc.dtsi"
-/include/ "fsl/p1020si-post.dtsi"
+/include/ "p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020rdb-pc.dtsi b/arch/powerpc/boot/dts/fsl/p1020rdb-pc.dtsi
index c952cd37cf6d..c952cd37cf6d 100644
--- a/arch/powerpc/boot/dts/p1020rdb-pc.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1020rdb-pc.dtsi
diff --git a/arch/powerpc/boot/dts/p1020rdb-pc_32b.dts b/arch/powerpc/boot/dts/fsl/p1020rdb-pc_32b.dts
index 4de69b726dc5..8175bf6f3e9c 100644
--- a/arch/powerpc/boot/dts/p1020rdb-pc_32b.dts
+++ b/arch/powerpc/boot/dts/fsl/p1020rdb-pc_32b.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p1020si-pre.dtsi"
+/include/ "p1020si-pre.dtsi"
 / {
         model = "fsl,P1020RDB-PC";
         compatible = "fsl,P1020RDB-PC";
@@ -87,4 +87,4 @@
 };
 
 /include/ "p1020rdb-pc.dtsi"
-/include/ "fsl/p1020si-post.dtsi"
+/include/ "p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020rdb-pc_36b.dts b/arch/powerpc/boot/dts/fsl/p1020rdb-pc_36b.dts
index 5237da7441bc..01c305795163 100644
--- a/arch/powerpc/boot/dts/p1020rdb-pc_36b.dts
+++ b/arch/powerpc/boot/dts/fsl/p1020rdb-pc_36b.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p1020si-pre.dtsi"
+/include/ "p1020si-pre.dtsi"
 / {
         model = "fsl,P1020RDB-PC";
         compatible = "fsl,P1020RDB-PC";
@@ -87,4 +87,4 @@
 };
 
 /include/ "p1020rdb-pc.dtsi"
-/include/ "fsl/p1020si-post.dtsi"
+/include/ "p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020rdb-pc_camp_core0.dts b/arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core0.dts
index f411515937ec..f411515937ec 100644
--- a/arch/powerpc/boot/dts/p1020rdb-pc_camp_core0.dts
+++ b/arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core0.dts
diff --git a/arch/powerpc/boot/dts/p1020rdb-pc_camp_core1.dts b/arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core1.dts
index a91335ad82c2..a91335ad82c2 100644
--- a/arch/powerpc/boot/dts/p1020rdb-pc_camp_core1.dts
+++ b/arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core1.dts
diff --git a/arch/powerpc/boot/dts/p1020rdb-pd.dts b/arch/powerpc/boot/dts/fsl/p1020rdb-pd.dts
index 987017ea36b6..740553c090a3 100644
--- a/arch/powerpc/boot/dts/p1020rdb-pd.dts
+++ b/arch/powerpc/boot/dts/fsl/p1020rdb-pd.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p1020si-pre.dtsi"
+/include/ "p1020si-pre.dtsi"
 / {
         model = "fsl,P1020RDB-PD";
         compatible = "fsl,P1020RDB-PD";
@@ -225,6 +225,18 @@
                         };
                 };
 
+                ptp_clock@b0e00 {
+                        compatible = "fsl,etsec-ptp";
+                        reg = <0xb0e00 0xb0>;
+                        interrupts = <68 2 0 0 69 2 0 0>;
+                        fsl,tclk-period = <10>;
+                        fsl,tmr-prsc    = <2>;
+                        fsl,tmr-add     = <0x80000016>;
+                        fsl,tmr-fiper1  = <999999990>;
+                        fsl,tmr-fiper2  = <99990>;
+                        fsl,max-adj     = <199999999>;
+                };
+
                 enet0: ethernet@b0000 {
                         fixed-link = <1 1 1000 0 0>;
                         phy-connection-type = "rgmii-id";
@@ -277,4 +289,4 @@
         };
 };
 
-/include/ "fsl/p1020si-post.dtsi"
+/include/ "p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020rdb.dts b/arch/powerpc/boot/dts/fsl/p1020rdb.dts
index 518bf99b1f50..81362252bc8c 100644
--- a/arch/powerpc/boot/dts/p1020rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/p1020rdb.dts
@@ -9,7 +9,7 @@
  * option) any later version.
  */
 
-/include/ "fsl/p1020si-pre.dtsi"
+/include/ "p1020si-pre.dtsi"
 / {
         model = "fsl,P1020RDB";
         compatible = "fsl,P1020RDB";
@@ -63,4 +63,4 @@
 };
 
 /include/ "p1020rdb.dtsi"
-/include/ "fsl/p1020si-post.dtsi"
+/include/ "p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020rdb.dtsi b/arch/powerpc/boot/dts/fsl/p1020rdb.dtsi
index 1fb7e0e0940f..1fb7e0e0940f 100644
--- a/arch/powerpc/boot/dts/p1020rdb.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1020rdb.dtsi
diff --git a/arch/powerpc/boot/dts/p1020rdb_36b.dts b/arch/powerpc/boot/dts/fsl/p1020rdb_36b.dts
index bdbdb6097e57..74471e3ca136 100644
--- a/arch/powerpc/boot/dts/p1020rdb_36b.dts
+++ b/arch/powerpc/boot/dts/fsl/p1020rdb_36b.dts
@@ -9,7 +9,7 @@
  * option) any later version.
  */
 
-/include/ "fsl/p1020si-pre.dtsi"
+/include/ "p1020si-pre.dtsi"
 / {
         model = "fsl,P1020RDB";
         compatible = "fsl,P1020RDB";
@@ -63,4 +63,4 @@
 };
 
 /include/ "p1020rdb.dtsi"
-/include/ "fsl/p1020si-post.dtsi"
+/include/ "p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020utm-pc.dtsi b/arch/powerpc/boot/dts/fsl/p1020utm-pc.dtsi
index 7ea85eabcc5c..7ea85eabcc5c 100644
--- a/arch/powerpc/boot/dts/p1020utm-pc.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1020utm-pc.dtsi
diff --git a/arch/powerpc/boot/dts/p1020utm-pc_32b.dts b/arch/powerpc/boot/dts/fsl/p1020utm-pc_32b.dts
index 4bfdd8971cdb..bc03ef611f98 100644
--- a/arch/powerpc/boot/dts/p1020utm-pc_32b.dts
+++ b/arch/powerpc/boot/dts/fsl/p1020utm-pc_32b.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p1020si-pre.dtsi"
+/include/ "p1020si-pre.dtsi"
 / {
         model = "fsl,P1020UTM-PC";
         compatible = "fsl,P1020UTM-PC";
@@ -86,4 +86,4 @@
 };
 
 /include/ "p1020utm-pc.dtsi"
-/include/ "fsl/p1020si-post.dtsi"
+/include/ "p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020utm-pc_36b.dts b/arch/powerpc/boot/dts/fsl/p1020utm-pc_36b.dts
index abec53557501..32766f6a475e 100644
--- a/arch/powerpc/boot/dts/p1020utm-pc_36b.dts
+++ b/arch/powerpc/boot/dts/fsl/p1020utm-pc_36b.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p1020si-pre.dtsi"
+/include/ "p1020si-pre.dtsi"
 / {
         model = "fsl,P1020UTM-PC";
         compatible = "fsl,P1020UTM-PC";
@@ -86,4 +86,4 @@
 };
 
 /include/ "p1020utm-pc.dtsi"
-/include/ "fsl/p1020si-post.dtsi"
+/include/ "p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1021mds.dts b/arch/powerpc/boot/dts/fsl/p1021mds.dts
index 76559044df41..27fdfd7dc7c7 100644
--- a/arch/powerpc/boot/dts/p1021mds.dts
+++ b/arch/powerpc/boot/dts/fsl/p1021mds.dts
@@ -9,7 +9,7 @@
  * option) any later version.
  */
 
-/include/ "fsl/p1021si-pre.dtsi"
+/include/ "p1021si-pre.dtsi"
 / {
         model = "fsl,P1021";
         compatible = "fsl,P1021MDS";
@@ -320,4 +320,4 @@
         };
 };
 
-/include/ "fsl/p1021si-post.dtsi"
+/include/ "p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1021rdb-pc.dtsi b/arch/powerpc/boot/dts/fsl/p1021rdb-pc.dtsi
index d6274c58f496..e8a0f95fb24a 100644
--- a/arch/powerpc/boot/dts/p1021rdb-pc.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1021rdb-pc.dtsi
@@ -224,6 +224,18 @@
                 };
         };
 
+        ptp_clock@b0e00 {
+                compatible = "fsl,etsec-ptp";
+                reg = <0xb0e00 0xb0>;
+                interrupts = <68 2 0 0 69 2 0 0>;
+                fsl,tclk-period = <10>;
+                fsl,tmr-prsc    = <2>;
+                fsl,tmr-add     = <0x80000016>;
+                fsl,tmr-fiper1  = <999999990>;
+                fsl,tmr-fiper2  = <99990>;
+                fsl,max-adj     = <199999999>;
+        };
+
         enet0: ethernet@b0000 {
                 fixed-link = <1 1 1000 0 0>;
                 phy-connection-type = "rgmii-id";
diff --git a/arch/powerpc/boot/dts/p1021rdb-pc_32b.dts b/arch/powerpc/boot/dts/fsl/p1021rdb-pc_32b.dts
index 7cefa12b629a..d2b4710357ac 100644
--- a/arch/powerpc/boot/dts/p1021rdb-pc_32b.dts
+++ b/arch/powerpc/boot/dts/fsl/p1021rdb-pc_32b.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p1021si-pre.dtsi"
+/include/ "p1021si-pre.dtsi"
 / {
         model = "fsl,P1021RDB";
         compatible = "fsl,P1021RDB-PC";
@@ -93,4 +93,4 @@
 };
 
 /include/ "p1021rdb-pc.dtsi"
-/include/ "fsl/p1021si-post.dtsi"
+/include/ "p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1021rdb-pc_36b.dts b/arch/powerpc/boot/dts/fsl/p1021rdb-pc_36b.dts
index 53d0c889039c..e298c29e5606 100644
--- a/arch/powerpc/boot/dts/p1021rdb-pc_36b.dts
+++ b/arch/powerpc/boot/dts/fsl/p1021rdb-pc_36b.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p1021si-pre.dtsi"
+/include/ "p1021si-pre.dtsi"
 / {
         model = "fsl,P1021RDB";
         compatible = "fsl,P1021RDB-PC";
@@ -93,4 +93,4 @@
 };
 
 /include/ "p1021rdb-pc.dtsi"
-/include/ "fsl/p1021si-post.dtsi"
+/include/ "p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1022ds.dtsi b/arch/powerpc/boot/dts/fsl/p1022ds.dtsi
index 957e0dc1dc0f..149da0f123ee 100644
--- a/arch/powerpc/boot/dts/p1022ds.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1022ds.dtsi
@@ -215,6 +215,18 @@
                 };
         };
 
+        ptp_clock@b0e00 {
+                compatible = "fsl,etsec-ptp";
+                reg = <0xb0e00 0xb0>;
+                interrupts = <68 2 0 0 69 2 0 0>;
+                fsl,tclk-period = <5>;
+                fsl,tmr-prsc    = <2>;
+                fsl,tmr-add     = <0xc01ebd3d>;
+                fsl,tmr-fiper1  = <999999995>;
+                fsl,tmr-fiper2  = <99990>;
+                fsl,max-adj     = <266499999>;
+        };
+
         ethernet@b0000 {
                 phy-handle = <&phy0>;
                 phy-connection-type = "rgmii-id";
diff --git a/arch/powerpc/boot/dts/p1022ds_32b.dts b/arch/powerpc/boot/dts/fsl/p1022ds_32b.dts
index d96cae00a9e3..5a7eaceb9e8e 100644
--- a/arch/powerpc/boot/dts/p1022ds_32b.dts
+++ b/arch/powerpc/boot/dts/fsl/p1022ds_32b.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p1022si-pre.dtsi"
+/include/ "p1022si-pre.dtsi"
 / {
         model = "fsl,P1022DS";
         compatible = "fsl,P1022DS";
@@ -99,5 +99,5 @@
         };
 };
 
-/include/ "fsl/p1022si-post.dtsi"
+/include/ "p1022si-post.dtsi"
 /include/ "p1022ds.dtsi"
diff --git a/arch/powerpc/boot/dts/p1022ds_36b.dts b/arch/powerpc/boot/dts/fsl/p1022ds_36b.dts
index f7aacce40bf6..88063cd9e20a 100644
--- a/arch/powerpc/boot/dts/p1022ds_36b.dts
+++ b/arch/powerpc/boot/dts/fsl/p1022ds_36b.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p1022si-pre.dtsi"
+/include/ "p1022si-pre.dtsi"
 / {
         model = "fsl,P1022DS";
         compatible = "fsl,P1022DS";
@@ -99,5 +99,5 @@
         };
 };
 
-/include/ "fsl/p1022si-post.dtsi"
+/include/ "p1022si-post.dtsi"
 /include/ "p1022ds.dtsi"
diff --git a/arch/powerpc/boot/dts/p1022rdk.dts b/arch/powerpc/boot/dts/fsl/p1022rdk.dts
index 51d82de223f3..04c16337268a 100644
--- a/arch/powerpc/boot/dts/p1022rdk.dts
+++ b/arch/powerpc/boot/dts/fsl/p1022rdk.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p1022si-pre.dtsi"
+/include/ "p1022si-pre.dtsi"
 / {
         model = "fsl,P1022RDK";
         compatible = "fsl,P1022RDK";
@@ -185,4 +185,4 @@
         };
 };
 
-/include/ "fsl/p1022si-post.dtsi"
+/include/ "p1022si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1023rdb.dts b/arch/powerpc/boot/dts/fsl/p1023rdb.dts
index 05a00a4d2861..9716ca64651c 100644
--- a/arch/powerpc/boot/dts/p1023rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/p1023rdb.dts
@@ -34,7 +34,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p1023si-pre.dtsi"
+/include/ "p1023si-pre.dtsi"
 
 / {
         model = "fsl,P1023";
@@ -257,4 +257,4 @@
         };
 };
 
-/include/ "fsl/p1023si-post.dtsi"
+/include/ "p1023si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1024rdb.dtsi b/arch/powerpc/boot/dts/fsl/p1024rdb.dtsi
index b05dcb40f800..b05dcb40f800 100644
--- a/arch/powerpc/boot/dts/p1024rdb.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1024rdb.dtsi
diff --git a/arch/powerpc/boot/dts/p1024rdb_32b.dts b/arch/powerpc/boot/dts/fsl/p1024rdb_32b.dts
index 90e803e9ba5f..8b09b9d56ad1 100644
--- a/arch/powerpc/boot/dts/p1024rdb_32b.dts
+++ b/arch/powerpc/boot/dts/fsl/p1024rdb_32b.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p1020si-pre.dtsi"
+/include/ "p1020si-pre.dtsi"
 / {
         model = "fsl,P1024RDB";
         compatible = "fsl,P1024RDB";
@@ -84,4 +84,4 @@
 };
 
 /include/ "p1024rdb.dtsi"
-/include/ "fsl/p1020si-post.dtsi"
+/include/ "p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1024rdb_36b.dts b/arch/powerpc/boot/dts/fsl/p1024rdb_36b.dts
index 3656825b65a1..e7093aef28f1 100644
--- a/arch/powerpc/boot/dts/p1024rdb_36b.dts
+++ b/arch/powerpc/boot/dts/fsl/p1024rdb_36b.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p1020si-pre.dtsi"
+/include/ "p1020si-pre.dtsi"
 / {
         model = "fsl,P1024RDB";
         compatible = "fsl,P1024RDB";
@@ -84,4 +84,4 @@
 };
 
 /include/ "p1024rdb.dtsi"
-/include/ "fsl/p1020si-post.dtsi"
+/include/ "p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1025rdb.dtsi b/arch/powerpc/boot/dts/fsl/p1025rdb.dtsi
index f50256482297..f50256482297 100644
--- a/arch/powerpc/boot/dts/p1025rdb.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1025rdb.dtsi
diff --git a/arch/powerpc/boot/dts/p1025rdb_32b.dts b/arch/powerpc/boot/dts/fsl/p1025rdb_32b.dts
index a2ed6280ba7a..b15acbaea34b 100644
--- a/arch/powerpc/boot/dts/p1025rdb_32b.dts
+++ b/arch/powerpc/boot/dts/fsl/p1025rdb_32b.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p1021si-pre.dtsi"
+/include/ "p1021si-pre.dtsi"
 / {
         model = "fsl,P1025RDB";
         compatible = "fsl,P1025RDB";
@@ -130,4 +130,4 @@
 };
 
 /include/ "p1025rdb.dtsi"
-/include/ "fsl/p1021si-post.dtsi"
+/include/ "p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1025rdb_36b.dts b/arch/powerpc/boot/dts/fsl/p1025rdb_36b.dts
index 06deb6f341ba..b0ded5e8bd0b 100644
--- a/arch/powerpc/boot/dts/p1025rdb_36b.dts
+++ b/arch/powerpc/boot/dts/fsl/p1025rdb_36b.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p1021si-pre.dtsi"
+/include/ "p1021si-pre.dtsi"
 / {
         model = "fsl,P1025RDB";
         compatible = "fsl,P1025RDB";
@@ -90,4 +90,4 @@
 };
 
 /include/ "p1025rdb.dtsi"
-/include/ "fsl/p1021si-post.dtsi"
+/include/ "p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1025twr.dts b/arch/powerpc/boot/dts/fsl/p1025twr.dts
index 9036a4987905..9b8863b74b60 100644
--- a/arch/powerpc/boot/dts/p1025twr.dts
+++ b/arch/powerpc/boot/dts/fsl/p1025twr.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p1021si-pre.dtsi"
+/include/ "p1021si-pre.dtsi"
 / {
         model = "fsl,P1025";
         compatible = "fsl,TWR-P1025";
@@ -92,4 +92,4 @@
 };
 
 /include/ "p1025twr.dtsi"
-/include/ "fsl/p1021si-post.dtsi"
+/include/ "p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1025twr.dtsi b/arch/powerpc/boot/dts/fsl/p1025twr.dtsi
index 8453501c256e..08816fb474f5 100644
--- a/arch/powerpc/boot/dts/p1025twr.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1025twr.dtsi
@@ -138,6 +138,18 @@
                 };
         };
 
+        ptp_clock@b0e00 {
+                compatible = "fsl,etsec-ptp";
+                reg = <0xb0e00 0xb0>;
+                interrupts = <68 2 0 0 69 2 0 0>;
+                fsl,tclk-period = <10>;
+                fsl,tmr-prsc    = <2>;
+                fsl,tmr-add     = <0xc0000021>;
+                fsl,tmr-fiper1  = <999999990>;
+                fsl,tmr-fiper2  = <99990>;
+                fsl,max-adj     = <133333332>;
+        };
+
         enet0: ethernet@b0000 {
                 phy-handle = <&phy0>;
                 phy-connection-type = "rgmii-id";
diff --git a/arch/powerpc/boot/dts/p2020ds.dts b/arch/powerpc/boot/dts/fsl/p2020ds.dts
index 237310cc7e6c..5ba06f753bc5 100644
--- a/arch/powerpc/boot/dts/p2020ds.dts
+++ b/arch/powerpc/boot/dts/fsl/p2020ds.dts
@@ -9,7 +9,7 @@
  * option) any later version.
  */
 
-/include/ "fsl/p2020si-pre.dtsi"
+/include/ "p2020si-pre.dtsi"
 
 / {
         model = "fsl,P2020DS";
@@ -85,5 +85,5 @@
  * for interrupt-map & interrupt-map-mask
  */
 
-/include/ "fsl/p2020si-post.dtsi"
+/include/ "p2020si-post.dtsi"
 /include/ "p2020ds.dtsi"
diff --git a/arch/powerpc/boot/dts/p2020ds.dtsi b/arch/powerpc/boot/dts/fsl/p2020ds.dtsi
index e699cf95b063..e699cf95b063 100644
--- a/arch/powerpc/boot/dts/p2020ds.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2020ds.dtsi
diff --git a/arch/powerpc/boot/dts/p2020rdb-pc.dtsi b/arch/powerpc/boot/dts/fsl/p2020rdb-pc.dtsi
index c21d1c7d16cd..ad2e242365cc 100644
--- a/arch/powerpc/boot/dts/p2020rdb-pc.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2020rdb-pc.dtsi
@@ -215,12 +215,12 @@
         };
 
         ptp_clock@24e00 {
-                fsl,tclk-period = <5>;
-                fsl,tmr-prsc = <200>;
-                fsl,tmr-add = <0xCCCCCCCD>;
-                fsl,tmr-fiper1 = <0x3B9AC9FB>;
-                fsl,tmr-fiper2 = <0x0001869B>;
-                fsl,max-adj = <249999999>;
+                fsl,tclk-period = <5>;
+                fsl,tmr-prsc    = <2>;
+                fsl,tmr-add     = <0xaaaaaaab>;
+                fsl,tmr-fiper1  = <999999995>;
+                fsl,tmr-fiper2  = <99990>;
+                fsl,max-adj     = <299999999>;
         };
 
         enet0: ethernet@24000 {
diff --git a/arch/powerpc/boot/dts/p2020rdb-pc_32b.dts b/arch/powerpc/boot/dts/fsl/p2020rdb-pc_32b.dts
index 57573bd52caa..d3295c204bbf 100644
--- a/arch/powerpc/boot/dts/p2020rdb-pc_32b.dts
+++ b/arch/powerpc/boot/dts/fsl/p2020rdb-pc_32b.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p2020si-pre.dtsi"
+/include/ "p2020si-pre.dtsi"
 
 / {
         model = "fsl,P2020RDB";
@@ -93,4 +93,4 @@
 };
 
 /include/ "p2020rdb-pc.dtsi"
-/include/ "fsl/p2020si-post.dtsi"
+/include/ "p2020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts b/arch/powerpc/boot/dts/fsl/p2020rdb-pc_36b.dts
index 470247ea68b4..9307a8f41ddb 100644
--- a/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts
+++ b/arch/powerpc/boot/dts/fsl/p2020rdb-pc_36b.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p2020si-pre.dtsi"
+/include/ "p2020si-pre.dtsi"
 
 / {
         model = "fsl,P2020RDB";
@@ -93,4 +93,4 @@
 };
 
 /include/ "p2020rdb-pc.dtsi"
-/include/ "fsl/p2020si-post.dtsi"
+/include/ "p2020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p2020rdb.dts b/arch/powerpc/boot/dts/fsl/p2020rdb.dts
index 4d52bce1d5b0..70cf09019ce5 100644
--- a/arch/powerpc/boot/dts/p2020rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/p2020rdb.dts
@@ -9,7 +9,7 @@
  * option) any later version.
  */
 
-/include/ "fsl/p2020si-pre.dtsi"
+/include/ "p2020si-pre.dtsi"
 
 / {
         model = "fsl,P2020RDB";
@@ -288,4 +288,4 @@
         };
 };
 
-/include/ "fsl/p2020si-post.dtsi"
+/include/ "p2020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p2041rdb.dts b/arch/powerpc/boot/dts/fsl/p2041rdb.dts
index d2bb0765bd5a..e9bd89406c4c 100644
--- a/arch/powerpc/boot/dts/p2041rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/p2041rdb.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p2041si-pre.dtsi"
+/include/ "p2041si-pre.dtsi"
 
 / {
         model = "fsl,P2041RDB";
@@ -247,4 +247,4 @@
         };
 };
 
-/include/ "fsl/p2041si-post.dtsi"
+/include/ "p2041si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
index 04ad177b6a12..51e975d7631a 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
@@ -1,7 +1,7 @@
 /*
  * P2041/P2040 Silicon/SoC Device Tree Source (post include)
  *
- * Copyright 2011 - 2014 Freescale Semiconductor Inc.
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -430,4 +430,31 @@ crypto: crypto@300000 {
 
 /include/ "qoriq-qman1.dtsi"
 /include/ "qoriq-bman1.dtsi"
+
+/include/ "qoriq-fman-0.dtsi"
+/include/ "qoriq-fman-0-1g-0.dtsi"
+/include/ "qoriq-fman-0-1g-1.dtsi"
+/include/ "qoriq-fman-0-1g-2.dtsi"
+/include/ "qoriq-fman-0-1g-3.dtsi"
+/include/ "qoriq-fman-0-1g-4.dtsi"
+/include/ "qoriq-fman-0-10g-0.dtsi"
+        fman@400000 {
+                enet0: ethernet@e0000 {
+                };
+
+                enet1: ethernet@e2000 {
+                };
+
+                enet2: ethernet@e4000 {
+                };
+
+                enet3: ethernet@e6000 {
+                };
+
+                enet4: ethernet@e8000 {
+                };
+
+                enet5: ethernet@f0000 {
+                };
+        };
 };
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
index b1ea147f2995..941274c41f21 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
@@ -1,7 +1,7 @@
 /*
  * P2041 Silicon/SoC Device Tree Source (pre include)
  *
- * Copyright 2011 Freescale Semiconductor Inc.
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -72,6 +72,14 @@
                 rtic_c = &rtic_c;
                 rtic_d = &rtic_d;
                 sec_mon = &sec_mon;
+
+                fman0 = &fman0;
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                ethernet3 = &enet3;
+                ethernet4 = &enet4;
+                ethernet5 = &enet5;
         };
 
         cpus {
diff --git a/arch/powerpc/boot/dts/p3041ds.dts b/arch/powerpc/boot/dts/fsl/p3041ds.dts
index eca6c697cfd7..f2b1d40334d4 100644
--- a/arch/powerpc/boot/dts/p3041ds.dts
+++ b/arch/powerpc/boot/dts/fsl/p3041ds.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p3041si-pre.dtsi"
+/include/ "p3041si-pre.dtsi"
 
 / {
         model = "fsl,P3041DS";
@@ -281,4 +281,4 @@
         };
 };
 
-/include/ "fsl/p3041si-post.dtsi"
+/include/ "p3041si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
index 2cab18af6df2..187676fa8d83 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
@@ -1,7 +1,7 @@
 /*
  * P3041 Silicon/SoC Device Tree Source (post include)
  *
- * Copyright 2011 - 2014 Freescale Semiconductor Inc.
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -457,4 +457,31 @@ crypto: crypto@300000 {
 
 /include/ "qoriq-qman1.dtsi"
 /include/ "qoriq-bman1.dtsi"
+
+/include/ "qoriq-fman-0.dtsi"
+/include/ "qoriq-fman-0-1g-0.dtsi"
+/include/ "qoriq-fman-0-1g-1.dtsi"
+/include/ "qoriq-fman-0-1g-2.dtsi"
+/include/ "qoriq-fman-0-1g-3.dtsi"
+/include/ "qoriq-fman-0-1g-4.dtsi"
+/include/ "qoriq-fman-0-10g-0.dtsi"
+        fman@400000 {
+                enet0: ethernet@e0000 {
+                };
+
+                enet1: ethernet@e2000 {
+                };
+
+                enet2: ethernet@e4000 {
+                };
+
+                enet3: ethernet@e6000 {
+                };
+
+                enet4: ethernet@e8000 {
+                };
+
+                enet5: ethernet@f0000 {
+                };
+        };
 };
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
index dc5f4b362c24..50b73e8e638f 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
@@ -1,7 +1,7 @@
 /*
  * P3041 Silicon/SoC Device Tree Source (pre include)
  *
- * Copyright 2011 Freescale Semiconductor Inc.
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -73,6 +73,14 @@
                 rtic_c = &rtic_c;
                 rtic_d = &rtic_d;
                 sec_mon = &sec_mon;
+
+                fman0 = &fman0;
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                ethernet3 = &enet3;
+                ethernet4 = &enet4;
+                ethernet5 = &enet5;
         };
 
         cpus {
diff --git a/arch/powerpc/boot/dts/p4080ds.dts b/arch/powerpc/boot/dts/fsl/p4080ds.dts
index 4f80c9d02c27..28a55c5e7099 100644
--- a/arch/powerpc/boot/dts/p4080ds.dts
+++ b/arch/powerpc/boot/dts/fsl/p4080ds.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p4080si-pre.dtsi"
+/include/ "p4080si-pre.dtsi"
 
 / {
         model = "fsl,P4080DS";
@@ -215,4 +215,4 @@
 
 };
 
-/include/ "fsl/p4080si-post.dtsi"
+/include/ "p4080si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
index dfc76bc41cb2..a0252085f858 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
@@ -1,7 +1,7 @@
 /*
  * P4080/P4040 Silicon/SoC Device Tree Source (post include)
  *
- * Copyright 2011 - 2014 Freescale Semiconductor Inc.
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -513,4 +513,50 @@ crypto: crypto@300000 {
 
 /include/ "qoriq-qman1.dtsi"
 /include/ "qoriq-bman1.dtsi"
+
+/include/ "qoriq-fman-0.dtsi"
+/include/ "qoriq-fman-0-1g-0.dtsi"
+/include/ "qoriq-fman-0-1g-1.dtsi"
+/include/ "qoriq-fman-0-1g-2.dtsi"
+/include/ "qoriq-fman-0-1g-3.dtsi"
+/include/ "qoriq-fman-0-10g-0.dtsi"
+        fman@400000 {
+                enet0: ethernet@e0000 {
+                };
+
+                enet1: ethernet@e2000 {
+                };
+
+                enet2: ethernet@e4000 {
+                };
+
+                enet3: ethernet@e6000 {
+                };
+
+                enet4: ethernet@f0000 {
+                };
+        };
+
+/include/ "qoriq-fman-1.dtsi"
+/include/ "qoriq-fman-1-1g-0.dtsi"
+/include/ "qoriq-fman-1-1g-1.dtsi"
+/include/ "qoriq-fman-1-1g-2.dtsi"
+/include/ "qoriq-fman-1-1g-3.dtsi"
+/include/ "qoriq-fman-1-10g-0.dtsi"
+        fman@500000 {
+                enet5: ethernet@e0000 {
+                };
+
+                enet6: ethernet@e2000 {
+                };
+
+                enet7: ethernet@e4000 {
+                };
+
+                enet8: ethernet@e6000 {
+                };
+
+                enet9: ethernet@f0000 {
+                };
+        };
 };
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
index 38bde0958672..d56a546b73e6 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
@@ -1,7 +1,7 @@
 /*
  * P4080/P4040 Silicon/SoC Device Tree Source (pre include)
  *
- * Copyright 2011 Freescale Semiconductor Inc.
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -72,6 +72,19 @@
                 rtic_c = &rtic_c;
                 rtic_d = &rtic_d;
                 sec_mon = &sec_mon;
+
+                fman0 = &fman0;
+                fman1 = &fman1;
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                ethernet3 = &enet3;
+                ethernet4 = &enet4;
+                ethernet5 = &enet5;
+                ethernet6 = &enet6;
+                ethernet7 = &enet7;
+                ethernet8 = &enet8;
+                ethernet9 = &enet9;
         };
 
         cpus {
diff --git a/arch/powerpc/boot/dts/p5020ds.dts b/arch/powerpc/boot/dts/fsl/p5020ds.dts
index d0309a8b9749..920dc77b9c43 100644
--- a/arch/powerpc/boot/dts/p5020ds.dts
+++ b/arch/powerpc/boot/dts/fsl/p5020ds.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/p5020si-pre.dtsi"
+/include/ "p5020si-pre.dtsi"
 
 / {
         model = "fsl,P5020DS";
@@ -281,4 +281,4 @@
         };
 };
 
-/include/ "fsl/p5020si-post.dtsi"
+/include/ "p5020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
index b77923ad72cf..cd008cdd2889 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
@@ -1,7 +1,7 @@
 /*
  * P5020/5010 Silicon/SoC Device Tree Source (post include)
  *
- * Copyright 2011 - 2014 Freescale Semiconductor Inc.
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -448,4 +448,31 @@
         raideng@320000 {
                 fsl,iommu-parent = <&pamu1>;
         };
+
+/include/ "qoriq-fman-0.dtsi"
+/include/ "qoriq-fman-0-1g-0.dtsi"
+/include/ "qoriq-fman-0-1g-1.dtsi"
+/include/ "qoriq-fman-0-1g-2.dtsi"
+/include/ "qoriq-fman-0-1g-3.dtsi"
+/include/ "qoriq-fman-0-1g-4.dtsi"
+/include/ "qoriq-fman-0-10g-0.dtsi"
+        fman@400000 {
+                enet0: ethernet@e0000 {
+                };
+
+                enet1: ethernet@e2000 {
+                };
+
+                enet2: ethernet@e4000 {
+                };
+
+                enet3: ethernet@e6000 {
+                };
+
+                enet4: ethernet@e8000 {
+                };
+
+                enet5: ethernet@f0000 {
+                };
+        };
 };
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
index 1cc61e126e4c..bfba0b4f1cbb 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
@@ -1,7 +1,7 @@
 /*
  * P5020/P5010 Silicon/SoC Device Tree Source (pre include)
  *
- * Copyright 2011 Freescale Semiconductor Inc.
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -79,6 +79,14 @@
                 raideng_jr1 = &raideng_jr1;
                 raideng_jr2 = &raideng_jr2;
                 raideng_jr3 = &raideng_jr3;
+
+                fman0 = &fman0;
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                ethernet3 = &enet3;
+                ethernet4 = &enet4;
+                ethernet5 = &enet5;
         };
 
         cpus {
diff --git a/arch/powerpc/boot/dts/p5040ds.dts b/arch/powerpc/boot/dts/fsl/p5040ds.dts
index 05168236d3ab..e169cc297ea3 100644
--- a/arch/powerpc/boot/dts/p5040ds.dts
+++ b/arch/powerpc/boot/dts/fsl/p5040ds.dts
@@ -32,7 +32,7 @@
  * software, even if advised of the possibility of such damage.
  */
 
-/include/ "fsl/p5040si-pre.dtsi"
+/include/ "p5040si-pre.dtsi"
 
 / {
         model = "fsl,P5040DS";
@@ -251,4 +251,4 @@
         };
 };
 
-/include/ "fsl/p5040si-post.dtsi"
+/include/ "p5040si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
index 6d214526b81b..2f227b1345ad 100644
--- a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
@@ -1,7 +1,7 @@
 /*
  * P5040 Silicon/SoC Device Tree Source (post include)
  *
- * Copyright 2012 - 2014 Freescale Semiconductor Inc.
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -422,4 +422,58 @@
 
 /include/ "qoriq-qman1.dtsi"
 /include/ "qoriq-bman1.dtsi"
+
+/include/ "qoriq-fman-0.dtsi"
+/include/ "qoriq-fman-0-1g-0.dtsi"
+/include/ "qoriq-fman-0-1g-1.dtsi"
+/include/ "qoriq-fman-0-1g-2.dtsi"
+/include/ "qoriq-fman-0-1g-3.dtsi"
+/include/ "qoriq-fman-0-1g-4.dtsi"
+/include/ "qoriq-fman-0-10g-0.dtsi"
+        fman@400000 {
+                enet0: ethernet@e0000 {
+                };
+
+                enet1: ethernet@e2000 {
+                };
+
+                enet2: ethernet@e4000 {
+                };
+
+                enet3: ethernet@e6000 {
+                };
+
+                enet4: ethernet@e8000 {
+                };
+
+                enet5: ethernet@f0000 {
+                };
+        };
+
+/include/ "qoriq-fman-1.dtsi"
+/include/ "qoriq-fman-1-1g-0.dtsi"
+/include/ "qoriq-fman-1-1g-1.dtsi"
+/include/ "qoriq-fman-1-1g-2.dtsi"
+/include/ "qoriq-fman-1-1g-3.dtsi"
+/include/ "qoriq-fman-1-1g-4.dtsi"
+/include/ "qoriq-fman-1-10g-0.dtsi"
+        fman@500000 {
+                enet6: ethernet@e0000 {
+                };
+
+                enet7: ethernet@e2000 {
+                };
+
+                enet8: ethernet@e4000 {
+                };
+
+                enet9: ethernet@e6000 {
+                };
+
+                enet10: ethernet@e8000 {
+                };
+
+                enet11: ethernet@f0000 {
+                };
+        };
 };
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
index b048a2be05a8..0659d5bb69b8 100644
--- a/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
@@ -1,7 +1,7 @@
 /*
  * P5040 Silicon/SoC Device Tree Source (pre include)
  *
- * Copyright 2012 Freescale Semiconductor Inc.
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -72,6 +72,21 @@
                 rtic_c = &rtic_c;
                 rtic_d = &rtic_d;
                 sec_mon = &sec_mon;
+
+                fman0 = &fman0;
+                fman1 = &fman1;
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                ethernet3 = &enet3;
+                ethernet4 = &enet4;
+                ethernet5 = &enet5;
+                ethernet6 = &enet6;
+                ethernet7 = &enet7;
+                ethernet8 = &enet8;
+                ethernet9 = &enet9;
+                ethernet10 = &enet10;
+                ethernet11 = &enet11;
         };
 
         cpus {
diff --git a/arch/powerpc/boot/dts/ppa8548.dts b/arch/powerpc/boot/dts/fsl/ppa8548.dts
index 27b0699ee923..8f9ffbe0e4f4 100644
--- a/arch/powerpc/boot/dts/ppa8548.dts
+++ b/arch/powerpc/boot/dts/fsl/ppa8548.dts
@@ -12,7 +12,7 @@
  * option) any later version.
  */
 
-/include/ "fsl/mpc8548si-pre.dtsi"
+/include/ "mpc8548si-pre.dtsi"
 
 / {
         model = "ppa8548";
@@ -161,4 +161,4 @@
         };
 };
 
-/include/ "fsl/mpc8548si-post.dtsi"
+/include/ "mpc8548si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-clockgen1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-clockgen1.dtsi
index 4ece1edbff63..88cd70de4f86 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-clockgen1.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-clockgen1.dtsi
@@ -32,13 +32,14 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-global-utilities@e1000 {
+clockgen: global-utilities@e1000 {
         compatible = "fsl,qoriq-clockgen-1.0";
         ranges = <0x0 0xe1000 0x1000>;
         reg = <0xe1000 0x1000>;
         clock-frequency = <0>;
         #address-cells = <1>;
         #size-cells = <1>;
+        #clock-cells = <2>;
 
         sysclk: sysclk {
                 #clock-cells = <0>;
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi
index 48e0b6e4ce33..6dfd7c5357ab 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi
@@ -32,12 +32,13 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-global-utilities@e1000 {
+clockgen: global-utilities@e1000 {
         compatible = "fsl,qoriq-clockgen-2.0";
         ranges = <0x0 0xe1000 0x1000>;
         reg = <0xe1000 0x1000>;
         #address-cells = <1>;
         #size-cells = <1>;
+        #clock-cells = <2>;
 
         sysclk: sysclk {
                 #clock-cells = <0>;
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-10g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-10g-0.dtsi
new file mode 100644
index 000000000000..eb77675c255a
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-10g-0.dtsi
@@ -0,0 +1,62 @@
+/*
+ * QorIQ FMan 10g port #0 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@400000 {
+        fman0_rx_0x10: port@90000 {
+                cell-index = <0x10>;
+                compatible = "fsl,fman-v2-port-rx";
+                reg = <0x90000 0x1000>;
+        };
+
+        fman0_tx_0x30: port@b0000 {
+                cell-index = <0x30>;
+                compatible = "fsl,fman-v2-port-tx";
+                reg = <0xb0000 0x1000>;
+        };
+
+        ethernet@f0000 {
+                cell-index = <0x8>;
+                compatible = "fsl,fman-xgec";
+                reg = <0xf0000 0x1000>;
+                fsl,fman-ports = <&fman0_rx_0x10 &fman0_tx_0x30>;
+        };
+
+        xmdio0: mdio@f1000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-xmdio";
+                reg = <0xf1000 0x1000>;
+                interrupts = <101 2 0 0>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-0.dtsi
new file mode 100644
index 000000000000..b965bc219bae
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-0.dtsi
@@ -0,0 +1,69 @@
+/*
+ * QorIQ FMan 1g port #0 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@400000 {
+        fman0_rx_0x08: port@88000 {
+                cell-index = <0x8>;
+                compatible = "fsl,fman-v2-port-rx";
+                reg = <0x88000 0x1000>;
+        };
+
+        fman0_tx_0x28: port@a8000 {
+                cell-index = <0x28>;
+                compatible = "fsl,fman-v2-port-tx";
+                reg = <0xa8000 0x1000>;
+        };
+
+        ethernet@e0000 {
+                cell-index = <0>;
+                compatible = "fsl,fman-dtsec";
+                reg = <0xe0000 0x1000>;
+                fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>;
+                tbi-handle = <&tbi0>;
+                ptp-timer = <&ptp_timer0>;
+        };
+
+        mdio0: mdio@e1120 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-mdio";
+                reg = <0xe1120 0xee0>;
+                interrupts = <100 2 0 0>;
+
+                tbi0: tbi-phy@8 {
+                        reg = <0x8>;
+                        device_type = "tbi-phy";
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-1.dtsi
new file mode 100644
index 000000000000..9eb6e6dd7cf9
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-1.dtsi
@@ -0,0 +1,68 @@
+/*
+ * QorIQ FMan 1g port #1 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@400000 {
+        fman0_rx_0x09: port@89000 {
+                cell-index = <0x9>;
+                compatible = "fsl,fman-v2-port-rx";
+                reg = <0x89000 0x1000>;
+        };
+
+        fman0_tx_0x29: port@a9000 {
+                cell-index = <0x29>;
+                compatible = "fsl,fman-v2-port-tx";
+                reg = <0xa9000 0x1000>;
+        };
+
+        ethernet@e2000 {
+                cell-index = <1>;
+                compatible = "fsl,fman-dtsec";
+                reg = <0xe2000 0x1000>;
+                fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
+                tbi-handle = <&tbi1>;
+                ptp-timer = <&ptp_timer0>;
+        };
+
+        mdio@e3120 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-mdio";
+                reg = <0xe3120 0xee0>;
+
+                tbi1: tbi-phy@8 {
+                        reg = <0x8>;
+                        device_type = "tbi-phy";
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-2.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-2.dtsi
new file mode 100644
index 000000000000..092b89936743
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-2.dtsi
@@ -0,0 +1,68 @@
+/*
+ * QorIQ FMan 1g port #2 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@400000 {
+        fman0_rx_0x0a: port@8a000 {
+                cell-index = <0xa>;
+                compatible = "fsl,fman-v2-port-rx";
+                reg = <0x8a000 0x1000>;
+        };
+
+        fman0_tx_0x2a: port@aa000 {
+                cell-index = <0x2a>;
+                compatible = "fsl,fman-v2-port-tx";
+                reg = <0xaa000 0x1000>;
+        };
+
+        ethernet@e4000 {
+                cell-index = <2>;
+                compatible = "fsl,fman-dtsec";
+                reg = <0xe4000 0x1000>;
+                fsl,fman-ports = <&fman0_rx_0x0a &fman0_tx_0x2a>;
+                tbi-handle = <&tbi2>;
+                ptp-timer = <&ptp_timer0>;
+        };
+
+        mdio@e5120 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-mdio";
+                reg = <0xe5120 0xee0>;
+
+                tbi2: tbi-phy@8 {
+                        reg = <0x8>;
+                        device_type = "tbi-phy";
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-3.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-3.dtsi
new file mode 100644
index 000000000000..2df0dc876045
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-3.dtsi
@@ -0,0 +1,68 @@
+/*
+ * QorIQ FMan 1g port #3 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@400000 {
+        fman0_rx_0x0b: port@8b000 {
+                cell-index = <0xb>;
+                compatible = "fsl,fman-v2-port-rx";
+                reg = <0x8b000 0x1000>;
+        };
+
+        fman0_tx_0x2b: port@ab000 {
+                cell-index = <0x2b>;
+                compatible = "fsl,fman-v2-port-tx";
+                reg = <0xab000 0x1000>;
+        };
+
+        ethernet@e6000 {
+                cell-index = <3>;
+                compatible = "fsl,fman-dtsec";
+                reg = <0xe6000 0x1000>;
+                fsl,fman-ports = <&fman0_rx_0x0b &fman0_tx_0x2b>;
+                tbi-handle = <&tbi3>;
+                ptp-timer = <&ptp_timer0>;
+        };
+
+        mdio@e7120 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-mdio";
+                reg = <0xe7120 0xee0>;
+
+                tbi3: tbi-phy@8 {
+                        reg = <0x8>;
+                        device_type = "tbi-phy";
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-4.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-4.dtsi
new file mode 100644
index 000000000000..5fceb2438fdc
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-4.dtsi
@@ -0,0 +1,68 @@
+/*
+ * QorIQ FMan 1g port #4 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@400000 {
+        fman0_rx_0x0c: port@8c000 {
+                cell-index = <0xc>;
+                compatible = "fsl,fman-v2-port-rx";
+                reg = <0x8c000 0x1000>;
+        };
+
+        fman0_tx_0x2c: port@ac000 {
+                cell-index = <0x2c>;
+                compatible = "fsl,fman-v2-port-tx";
+                reg = <0xac000 0x1000>;
+        };
+
+        ethernet@e8000 {
+                cell-index = <4>;
+                compatible = "fsl,fman-dtsec";
+                reg = <0xe8000 0x1000>;
+                fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>;
+                tbi-handle = <&tbi4>;
+                ptp-timer = <&ptp_timer0>;
+        };
+
+        mdio@e9120 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-mdio";
+                reg = <0xe9120 0xee0>;
+
+                tbi4: tbi-phy@8 {
+                        reg = <0x8>;
+                        device_type = "tbi-phy";
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-0.dtsi
new file mode 100644
index 000000000000..abd01d466de4
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0.dtsi
@@ -0,0 +1,101 @@
+/*
+ * QorIQ FMan device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman0: fman@400000 {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        cell-index = <0>;
+        compatible = "fsl,fman";
+        ranges = <0 0x400000 0x100000>;
+        reg = <0x400000 0x100000>;
+        interrupts = <96 2 0 0>, <16 2 1 1>;
+        clocks = <&clockgen 3 0>;
+        clock-names = "fmanclk";
+        fsl,qman-channel-range = <0x40 0xc>;
+
+        muram@0 {
+                compatible = "fsl,fman-muram";
+                reg = <0x0 0x28000>;
+        };
+
+        fman0_oh_0x1: port@81000 {
+                cell-index = <0x1>;
+                compatible = "fsl,fman-v2-port-oh";
+                reg = <0x81000 0x1000>;
+        };
+
+        fman0_oh_0x2: port@82000 {
+                cell-index = <0x2>;
+                compatible = "fsl,fman-v2-port-oh";
+                reg = <0x82000 0x1000>;
+        };
+
+        fman0_oh_0x3: port@83000 {
+                cell-index = <0x3>;
+                compatible = "fsl,fman-v2-port-oh";
+                reg = <0x83000 0x1000>;
+        };
+
+        fman0_oh_0x4: port@84000 {
+                cell-index = <0x4>;
+                compatible = "fsl,fman-v2-port-oh";
+                reg = <0x84000 0x1000>;
+        };
+
+        fman0_oh_0x5: port@85000 {
+                cell-index = <0x5>;
+                compatible = "fsl,fman-v2-port-oh";
+                reg = <0x85000 0x1000>;
+                status = "disabled";
+        };
+
+        fman0_oh_0x6: port@86000 {
+                cell-index = <0x6>;
+                compatible = "fsl,fman-v2-port-oh";
+                reg = <0x86000 0x1000>;
+                status = "disabled";
+        };
+
+        fman0_oh_0x7: port@87000 {
+                cell-index = <0x7>;
+                compatible = "fsl,fman-v2-port-oh";
+                reg = <0x87000 0x1000>;
+                status = "disabled";
+        };
+
+        ptp_timer0: ptp-timer@fe000 {
+                compatible = "fsl,fman-ptp-timer";
+                reg = <0xfe000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-10g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-10g-0.dtsi
new file mode 100644
index 000000000000..83ae87b69d92
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-10g-0.dtsi
@@ -0,0 +1,61 @@
+/*
+ * QorIQ FMan 10g port #0 device tree stub [ controller @ offset 0x500000 ]
+ *
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@500000 {
+        fman1_rx_0x10: port@90000 {
+                cell-index = <0x10>;
+                compatible = "fsl,fman-v2-port-rx";
+                reg = <0x90000 0x1000>;
+        };
+
+        fman1_tx_0x30: port@b0000 {
+                cell-index = <0x30>;
+                compatible = "fsl,fman-v2-port-tx";
+                reg = <0xb0000 0x1000>;
+        };
+
+        ethernet@f0000 {
+                cell-index = <0x8>;
+                compatible = "fsl,fman-xgec";
+                reg = <0xf0000 0x1000>;
+                fsl,fman-ports = <&fman1_rx_0x10 &fman1_tx_0x30>;
+        };
+
+        mdio@f1000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-xmdio";
+                reg = <0xf1000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-0.dtsi
new file mode 100644
index 000000000000..b0f0e36a4eac
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-0.dtsi
@@ -0,0 +1,68 @@
+/*
+ * QorIQ FMan 1g port #0 device tree stub [ controller @ offset 0x500000 ]
+ *
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@500000 {
+        fman1_rx_0x08: port@88000 {
+                cell-index = <0x8>;
+                compatible = "fsl,fman-v2-port-rx";
+                reg = <0x88000 0x1000>;
+        };
+
+        fman1_tx_0x28: port@a8000 {
+                cell-index = <0x28>;
+                compatible = "fsl,fman-v2-port-tx";
+                reg = <0xa8000 0x1000>;
+        };
+
+        ethernet@e0000 {
+                cell-index = <0>;
+                compatible = "fsl,fman-dtsec";
+                reg = <0xe0000 0x1000>;
+                fsl,fman-ports = <&fman1_rx_0x08 &fman1_tx_0x28>;
+                tbi-handle = <&tbi5>;
+                ptp-timer = <&ptp_timer1>;
+        };
+
+        mdio@e1120 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-mdio";
+                reg = <0xe1120 0xee0>;
+
+                tbi5: tbi-phy@8 {
+                        reg = <0x8>;
+                        device_type = "tbi-phy";
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-1.dtsi
new file mode 100644
index 000000000000..a3a79f8552a3
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-1.dtsi
@@ -0,0 +1,68 @@
+/*
+ * QorIQ FMan 1g port #1 device tree stub [ controller @ offset 0x500000 ]
+ *
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@500000 {
+        fman1_rx_0x09: port@89000 {
+                cell-index = <0x9>;
+                compatible = "fsl,fman-v2-port-rx";
+                reg = <0x89000 0x1000>;
+        };
+
+        fman1_tx_0x29: port@a9000 {
+                cell-index = <0x29>;
+                compatible = "fsl,fman-v2-port-tx";
+                reg = <0xa9000 0x1000>;
+        };
+
+        ethernet@e2000 {
+                cell-index = <1>;
+                compatible = "fsl,fman-dtsec";
+                reg = <0xe2000 0x1000>;
+                fsl,fman-ports = <&fman1_rx_0x09 &fman1_tx_0x29>;
+                tbi-handle = <&tbi6>;
+                ptp-timer = <&ptp_timer1>;
+        };
+
+        mdio@e3120 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-mdio";
+                reg = <0xe3120 0xee0>;
+
+                tbi6: tbi-phy@8 {
+                        reg = <0x8>;
+                        device_type = "tbi-phy";
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-2.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-2.dtsi
new file mode 100644
index 000000000000..96a69a84b8a8
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-2.dtsi
@@ -0,0 +1,68 @@
+/*
+ * QorIQ FMan 1g port #2 device tree stub [ controller @ offset 0x500000 ]
+ *
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@500000 {
+        fman1_rx_0x0a: port@8a000 {
+                cell-index = <0xa>;
+                compatible = "fsl,fman-v2-port-rx";
+                reg = <0x8a000 0x1000>;
+        };
+
+        fman1_tx_0x2a: port@aa000 {
+                cell-index = <0x2a>;
+                compatible = "fsl,fman-v2-port-tx";
+                reg = <0xaa000 0x1000>;
+        };
+
+        ethernet@e4000 {
+                cell-index = <2>;
+                compatible = "fsl,fman-dtsec";
+                reg = <0xe4000 0x1000>;
+                fsl,fman-ports = <&fman1_rx_0x0a &fman1_tx_0x2a>;
+                tbi-handle = <&tbi7>;
+                ptp-timer = <&ptp_timer1>;
+        };
+
+        mdio@e5120 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-mdio";
+                reg = <0xe5120 0xee0>;
+
+                tbi7: tbi-phy@8 {
+                        reg = <0x8>;
+                        device_type = "tbi-phy";
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-3.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-3.dtsi
new file mode 100644
index 000000000000..7405d1940133
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-3.dtsi
@@ -0,0 +1,68 @@
+/*
+ * QorIQ FMan 1g port #3 device tree stub [ controller @ offset 0x500000 ]
+ *
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@500000 {
+        fman1_rx_0x0b: port@8b000 {
+                cell-index = <0xb>;
+                compatible = "fsl,fman-v2-port-rx";
+                reg = <0x8b000 0x1000>;
+        };
+
+        fman1_tx_0x2b: port@ab000 {
+                cell-index = <0x2b>;
+                compatible = "fsl,fman-v2-port-tx";
+                reg = <0xab000 0x1000>;
+        };
+
+        ethernet@e6000 {
+                cell-index = <3>;
+                compatible = "fsl,fman-dtsec";
+                reg = <0xe6000 0x1000>;
+                fsl,fman-ports = <&fman1_rx_0x0b &fman1_tx_0x2b>;
+                tbi-handle = <&tbi8>;
+                ptp-timer = <&ptp_timer1>;
+        };
+
+        mdio@e7120 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-mdio";
+                reg = <0xe7120 0xee0>;
+
+                tbi8: tbi-phy@8 {
+                        reg = <0x8>;
+                        device_type = "tbi-phy";
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-4.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-4.dtsi
new file mode 100644
index 000000000000..f49ad69e5212
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-4.dtsi
@@ -0,0 +1,68 @@
+/*
+ * QorIQ FMan 1g port #4 device tree stub [ controller @ offset 0x500000 ]
+ *
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@500000 {
+        fman1_rx_0x0c: port@8c000 {
+                cell-index = <0xc>;
+                compatible = "fsl,fman-v2-port-rx";
+                reg = <0x8c000 0x1000>;
+        };
+
+        fman1_tx_0x2c: port@ac000 {
+                cell-index = <0x2c>;
+                compatible = "fsl,fman-v2-port-tx";
+                reg = <0xac000 0x1000>;
+        };
+
+        ethernet@e8000 {
+                cell-index = <4>;
+                compatible = "fsl,fman-dtsec";
+                reg = <0xe8000 0x1000>;
+                fsl,fman-ports = <&fman1_rx_0x0c &fman1_tx_0x2c>;
+                tbi-handle = <&tbi9>;
+                ptp-timer = <&ptp_timer1>;
+        };
+
+        mdio@e9120 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-mdio";
+                reg = <0xe9120 0xee0>;
+
+                tbi9: tbi-phy@8 {
+                        reg = <0x8>;
+                        device_type = "tbi-phy";
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-1.dtsi
new file mode 100644
index 000000000000..debea75fd3f0
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1.dtsi
@@ -0,0 +1,101 @@
+/*
+ * QorIQ FMan device tree stub [ controller @ offset 0x500000 ]
+ *
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman1: fman@500000 {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        cell-index = <1>;
+        compatible = "fsl,fman";
+        ranges = <0 0x500000 0x100000>;
+        reg = <0x500000 0x100000>;
+        interrupts = <97 2 0 0>, <16 2 1 0>;
+        clocks = <&clockgen 3 1>;
+        clock-names = "fmanclk";
+        fsl,qman-channel-range = <0x60 0xc>;
+
+        muram@0 {
+                compatible = "fsl,fman-muram";
+                reg = <0x0 0x28000>;
+        };
+
+        fman1_oh_0x1: port@81000 {
+                cell-index = <0x1>;
+                compatible = "fsl,fman-v2-port-oh";
+                reg = <0x81000 0x1000>;
+        };
+
+        fman1_oh_0x2: port@82000 {
+                cell-index = <0x2>;
+                compatible = "fsl,fman-v2-port-oh";
+                reg = <0x82000 0x1000>;
+        };
+
+        fman1_oh_0x3: port@83000 {
+                cell-index = <0x3>;
+                compatible = "fsl,fman-v2-port-oh";
+                reg = <0x83000 0x1000>;
+        };
+
+        fman1_oh_0x4: port@84000 {
+                cell-index = <0x4>;
+                compatible = "fsl,fman-v2-port-oh";
+                reg = <0x84000 0x1000>;
+        };
+
+        fman1_oh_0x5: port@85000 {
+                cell-index = <0x5>;
+                compatible = "fsl,fman-v2-port-oh";
+                reg = <0x85000 0x1000>;
+                status = "disabled";
+        };
+
+        fman1_oh_0x6: port@86000 {
+                cell-index = <0x6>;
+                compatible = "fsl,fman-v2-port-oh";
+                reg = <0x86000 0x1000>;
+                status = "disabled";
+        };
+
+        fman1_oh_0x7: port@87000 {
+                cell-index = <0x7>;
+                compatible = "fsl,fman-v2-port-oh";
+                reg = <0x87000 0x1000>;
+                status = "disabled";
+        };
+
+        ptp_timer1: ptp-timer@fe000 {
+                compatible = "fsl,fman-ptp-timer";
+                reg = <0xfe000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi
new file mode 100644
index 000000000000..2e441fab6d8f
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi
@@ -0,0 +1,66 @@
+/*
+ * QorIQ FMan v3 1g port #0 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@400000 {
+        fman0_rx_0x08: port@88000 {
+                cell-index = <0x8>;
+                compatible = "fsl,fman-v3-port-rx";
+                reg = <0x88000 0x1000>;
+                fsl,fman-10g-port;
+                fsl,fman-best-effort-port;
+        };
+
+        fman0_tx_0x28: port@a8000 {
+                cell-index = <0x28>;
+                compatible = "fsl,fman-v3-port-tx";
+                reg = <0xa8000 0x1000>;
+                fsl,fman-10g-port;
+                fsl,fman-best-effort-port;
+        };
+
+        ethernet@e0000 {
+                cell-index = <0>;
+                compatible = "fsl,fman-memac";
+                reg = <0xe0000 0x1000>;
+                fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>;
+                ptp-timer = <&ptp_timer0>;
+        };
+
+        mdio@e1000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xe1000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
new file mode 100644
index 000000000000..0b8f87f79d15
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
@@ -0,0 +1,63 @@
+/*
+ * QorIQ FMan v3 10g port #0 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@400000 {
+        fman0_rx_0x10: port@90000 {
+                cell-index = <0x10>;
+                compatible = "fsl,fman-v3-port-rx";
+                reg = <0x90000 0x1000>;
+                fsl,fman-10g-port;
+        };
+
+        fman0_tx_0x30: port@b0000 {
+                cell-index = <0x30>;
+                compatible = "fsl,fman-v3-port-tx";
+                reg = <0xb0000 0x1000>;
+                fsl,fman-10g-port;
+        };
+
+        ethernet@f0000 {
+                cell-index = <0x8>;
+                compatible = "fsl,fman-memac";
+                reg = <0xf0000 0x1000>;
+                fsl,fman-ports = <&fman0_rx_0x10 &fman0_tx_0x30>;
+        };
+
+        mdio@f1000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xf1000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi
new file mode 100644
index 000000000000..ba6f2275d3f6
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi
@@ -0,0 +1,66 @@
+/*
+ * QorIQ FMan v3 1g port #1 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@400000 {
+        fman0_rx_0x09: port@89000 {
+                cell-index = <0x9>;
+                compatible = "fsl,fman-v3-port-rx";
+                reg = <0x89000 0x1000>;
+                fsl,fman-10g-port;
+                fsl,fman-best-effort-port;
+        };
+
+        fman0_tx_0x29: port@a9000 {
+                cell-index = <0x29>;
+                compatible = "fsl,fman-v3-port-tx";
+                reg = <0xa9000 0x1000>;
+                fsl,fman-10g-port;
+                fsl,fman-best-effort-port;
+        };
+
+        ethernet@e2000 {
+                cell-index = <1>;
+                compatible = "fsl,fman-memac";
+                reg = <0xe2000 0x1000>;
+                fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
+                ptp-timer = <&ptp_timer0>;
+        };
+
+        mdio@e3000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xe3000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
new file mode 100644
index 000000000000..886003805592
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
@@ -0,0 +1,63 @@
+/*
+ * QorIQ FMan v3 10g port #1 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@400000 {
+        fman0_rx_0x11: port@91000 {
+                cell-index = <0x11>;
+                compatible = "fsl,fman-v3-port-rx";
+                reg = <0x91000 0x1000>;
+                fsl,fman-10g-port;
+        };
+
+        fman0_tx_0x31: port@b1000 {
+                cell-index = <0x31>;
+                compatible = "fsl,fman-v3-port-tx";
+                reg = <0xb1000 0x1000>;
+                fsl,fman-10g-port;
+        };
+
+        ethernet@f2000 {
+                cell-index = <0x9>;
+                compatible = "fsl,fman-memac";
+                reg = <0xf2000 0x1000>;
+                fsl,fman-ports = <&fman0_rx_0x11 &fman0_tx_0x31>;
+        };
+
+        mdio@f3000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xf3000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi
new file mode 100644
index 000000000000..ace9c13648ce
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi
@@ -0,0 +1,62 @@
+/*
+ * QorIQ FMan v3 1g port #0 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@400000 {
+        fman0_rx_0x08: port@88000 {
+                cell-index = <0x8>;
+                compatible = "fsl,fman-v3-port-rx";
+                reg = <0x88000 0x1000>;
+        };
+
+        fman0_tx_0x28: port@a8000 {
+                cell-index = <0x28>;
+                compatible = "fsl,fman-v3-port-tx";
+                reg = <0xa8000 0x1000>;
+        };
+
+        ethernet@e0000 {
+                cell-index = <0>;
+                compatible = "fsl,fman-memac";
+                reg = <0xe0000 0x1000>;
+                fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>;
+                ptp-timer = <&ptp_timer0>;
+        };
+
+        mdio@e1000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xe1000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi
new file mode 100644
index 000000000000..a4fc28654b31
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi
@@ -0,0 +1,62 @@
+/*
+ * QorIQ FMan v3 1g port #1 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@400000 {
+        fman0_rx_0x09: port@89000 {
+                cell-index = <0x9>;
+                compatible = "fsl,fman-v3-port-rx";
+                reg = <0x89000 0x1000>;
+        };
+
+        fman0_tx_0x29: port@a9000 {
+                cell-index = <0x29>;
+                compatible = "fsl,fman-v3-port-tx";
+                reg = <0xa9000 0x1000>;
+        };
+
+        ethernet@e2000 {
+                cell-index = <1>;
+                compatible = "fsl,fman-memac";
+                reg = <0xe2000 0x1000>;
+                fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
+                ptp-timer = <&ptp_timer0>;
+        };
+
+        mdio@e3000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xe3000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi
new file mode 100644
index 000000000000..78596faadf99
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi
@@ -0,0 +1,62 @@
+/*
+ * QorIQ FMan v3 1g port #2 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@400000 {
+        fman0_rx_0x0a: port@8a000 {
+                cell-index = <0xa>;
+                compatible = "fsl,fman-v3-port-rx";
+                reg = <0x8a000 0x1000>;
+        };
+
+        fman0_tx_0x2a: port@aa000 {
+                cell-index = <0x2a>;
+                compatible = "fsl,fman-v3-port-tx";
+                reg = <0xaa000 0x1000>;
+        };
+
+        ethernet@e4000 {
+                cell-index = <2>;
+                compatible = "fsl,fman-memac";
+                reg = <0xe4000 0x1000>;
+                fsl,fman-ports = <&fman0_rx_0x0a &fman0_tx_0x2a>;
+                ptp-timer = <&ptp_timer0>;
+        };
+
+        mdio@e5000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xe5000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi
new file mode 100644
index 000000000000..af93abd86d78
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi
@@ -0,0 +1,62 @@
+/*
+ * QorIQ FMan v3 1g port #3 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@400000 {
+        fman0_rx_0x0b: port@8b000 {
+                cell-index = <0xb>;
+                compatible = "fsl,fman-v3-port-rx";
+                reg = <0x8b000 0x1000>;
+        };
+
+        fman0_tx_0x2b: port@ab000 {
+                cell-index = <0x2b>;
+                compatible = "fsl,fman-v3-port-tx";
+                reg = <0xab000 0x1000>;
+        };
+
+        ethernet@e6000 {
+                cell-index = <3>;
+                compatible = "fsl,fman-memac";
+                reg = <0xe6000 0x1000>;
+                fsl,fman-ports = <&fman0_rx_0x0b &fman0_tx_0x2b>;
+                ptp-timer = <&ptp_timer0>;
+        };
+
+        mdio@e7000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xe7000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi
new file mode 100644
index 000000000000..97cffd74bf3d
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi
@@ -0,0 +1,62 @@
+/*
+ * QorIQ FMan v3 1g port #4 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@400000 {
+        fman0_rx_0x0c: port@8c000 {
+                cell-index = <0xc>;
+                compatible = "fsl,fman-v3-port-rx";
+                reg = <0x8c000 0x1000>;
+        };
+
+        fman0_tx_0x2c: port@ac000 {
+                cell-index = <0x2c>;
+                compatible = "fsl,fman-v3-port-tx";
+                reg = <0xac000 0x1000>;
+        };
+
+        ethernet@e8000 {
+                cell-index = <4>;
+                compatible = "fsl,fman-memac";
+                reg = <0xe8000 0x1000>;
+                fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>;
+                ptp-timer = <&ptp_timer0>;
+        };
+
+        mdio@e9000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xe9000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi
new file mode 100644
index 000000000000..232c5c277bdb
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi
@@ -0,0 +1,62 @@
+/*
+ * QorIQ FMan v3 1g port #5 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@400000 {
+        fman0_rx_0x0d: port@8d000 {
+                cell-index = <0xd>;
+                compatible = "fsl,fman-v3-port-rx";
+                reg = <0x8d000 0x1000>;
+        };
+
+        fman0_tx_0x2d: port@ad000 {
+                cell-index = <0x2d>;
+                compatible = "fsl,fman-v3-port-tx";
+                reg = <0xad000 0x1000>;
+        };
+
+        ethernet@ea000 {
+                cell-index = <5>;
+                compatible = "fsl,fman-memac";
+                reg = <0xea000 0x1000>;
+                fsl,fman-ports = <&fman0_rx_0x0d &fman0_tx_0x2d>;
+                ptp-timer = <&ptp_timer0>;
+        };
+
+        mdio@eb000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xeb000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0.dtsi
new file mode 100644
index 000000000000..3a20e0d1a6d2
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0.dtsi
@@ -0,0 +1,106 @@
+/*
+ * QorIQ FMan v3 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman0: fman@400000 {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        cell-index = <0>;
+        compatible = "fsl,fman";
+        ranges = <0 0x400000 0x100000>;
+        reg = <0x400000 0x100000>;
+        interrupts = <96 2 0 0>, <16 2 1 1>;
+        clocks = <&clockgen 3 0>;
+        clock-names = "fmanclk";
+        fsl,qman-channel-range = <0x800 0x10>;
+
+        muram@0 {
+                compatible = "fsl,fman-muram";
+                reg = <0x0 0x60000>;
+        };
+
+        fman0_oh_0x2: port@82000 {
+                cell-index = <0x2>;
+                compatible = "fsl,fman-v3-port-oh";
+                reg = <0x82000 0x1000>;
+        };
+
+        fman0_oh_0x3: port@83000 {
+                cell-index = <0x3>;
+                compatible = "fsl,fman-v3-port-oh";
+                reg = <0x83000 0x1000>;
+        };
+
+        fman0_oh_0x4: port@84000 {
+                cell-index = <0x4>;
+                compatible = "fsl,fman-v3-port-oh";
+                reg = <0x84000 0x1000>;
+        };
+
+        fman0_oh_0x5: port@85000 {
+                cell-index = <0x5>;
+                compatible = "fsl,fman-v3-port-oh";
+                reg = <0x85000 0x1000>;
+        };
+
+        fman0_oh_0x6: port@86000 {
+                cell-index = <0x6>;
+                compatible = "fsl,fman-v3-port-oh";
+                reg = <0x86000 0x1000>;
+        };
+
+        fman0_oh_0x7: port@87000 {
+                cell-index = <0x7>;
+                compatible = "fsl,fman-v3-port-oh";
+                reg = <0x87000 0x1000>;
+        };
+
+        mdio0: mdio@fc000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xfc000 0x1000>;
+        };
+
+        xmdio0: mdio@fd000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xfd000 0x1000>;
+        };
+
+        ptp_timer0: ptp-timer@fe000 {
+                compatible = "fsl,fman-ptp-timer";
+                reg = <0xfe000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi
new file mode 100644
index 000000000000..89d64ee282b0
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi
@@ -0,0 +1,63 @@
+/*
+ * QorIQ FMan v3 10g port #0 device tree stub [ controller @ offset 0x500000 ]
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@500000 {
+        fman1_rx_0x10: port@90000 {
+                cell-index = <0x10>;
+                compatible = "fsl,fman-v3-port-rx";
+                reg = <0x90000 0x1000>;
+                fsl,fman-10g-port;
+        };
+
+        fman1_tx_0x30: port@b0000 {
+                cell-index = <0x30>;
+                compatible = "fsl,fman-v3-port-tx";
+                reg = <0xb0000 0x1000>;
+                fsl,fman-10g-port;
+        };
+
+        ethernet@f0000 {
+                cell-index = <0x8>;
+                compatible = "fsl,fman-memac";
+                reg = <0xf0000 0x1000>;
+                fsl,fman-ports = <&fman1_rx_0x10 &fman1_tx_0x30>;
+        };
+
+        mdio@f1000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xf1000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi
new file mode 100644
index 000000000000..7fa9260889c6
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi
@@ -0,0 +1,63 @@
+/*
+ * QorIQ FMan v3 10g port #1 device tree stub [ controller @ offset 0x500000 ]
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@500000 {
+        fman1_rx_0x11: port@91000 {
+                cell-index = <0x11>;
+                compatible = "fsl,fman-v3-port-rx";
+                reg = <0x91000 0x1000>;
+                fsl,fman-10g-port;
+        };
+
+        fman1_tx_0x31: port@b1000 {
+                cell-index = <0x31>;
+                compatible = "fsl,fman-v3-port-tx";
+                reg = <0xb1000 0x1000>;
+                fsl,fman-10g-port;
+        };
+
+        ethernet@f2000 {
+                cell-index = <0x9>;
+                compatible = "fsl,fman-memac";
+                reg = <0xf2000 0x1000>;
+                fsl,fman-ports = <&fman1_rx_0x11 &fman1_tx_0x31>;
+        };
+
+        mdio@f3000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xf3000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi
new file mode 100644
index 000000000000..3d236662bf07
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi
@@ -0,0 +1,62 @@
+/*
+ * QorIQ FMan v3 1g port #0 device tree stub [ controller @ offset 0x500000 ]
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@500000 {
+        fman1_rx_0x08: port@88000 {
+                cell-index = <0x8>;
+                compatible = "fsl,fman-v3-port-rx";
+                reg = <0x88000 0x1000>;
+        };
+
+        fman1_tx_0x28: port@a8000 {
+                cell-index = <0x28>;
+                compatible = "fsl,fman-v3-port-tx";
+                reg = <0xa8000 0x1000>;
+        };
+
+        ethernet@e0000 {
+                cell-index = <0>;
+                compatible = "fsl,fman-memac";
+                reg = <0xe0000 0x1000>;
+                fsl,fman-ports = <&fman1_rx_0x08 &fman1_tx_0x28>;
+                ptp-timer = <&ptp_timer1>;
+        };
+
+        mdio@e1000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xe1000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi
new file mode 100644
index 000000000000..97dc2eedd462
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi
@@ -0,0 +1,62 @@
+/*
+ * QorIQ FMan v3 1g port #1 device tree stub [ controller @ offset 0x500000 ]
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@500000 {
+        fman1_rx_0x09: port@89000 {
+                cell-index = <0x9>;
+                compatible = "fsl,fman-v3-port-rx";
+                reg = <0x89000 0x1000>;
+        };
+
+        fman1_tx_0x29: port@a9000 {
+                cell-index = <0x29>;
+                compatible = "fsl,fman-v3-port-tx";
+                reg = <0xa9000 0x1000>;
+        };
+
+        ethernet@e2000 {
+                cell-index = <1>;
+                compatible = "fsl,fman-memac";
+                reg = <0xe2000 0x1000>;
+                fsl,fman-ports = <&fman1_rx_0x09 &fman1_tx_0x29>;
+                ptp-timer = <&ptp_timer1>;
+        };
+
+        mdio@e3000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xe3000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi
new file mode 100644
index 000000000000..f084dd2f0bec
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi
@@ -0,0 +1,62 @@
+/*
+ * QorIQ FMan v3 1g port #2 device tree stub [ controller @ offset 0x500000 ]
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@500000 {
+        fman1_rx_0x0a: port@8a000 {
+                cell-index = <0xa>;
+                compatible = "fsl,fman-v3-port-rx";
+                reg = <0x8a000 0x1000>;
+        };
+
+        fman1_tx_0x2a: port@aa000 {
+                cell-index = <0x2a>;
+                compatible = "fsl,fman-v3-port-tx";
+                reg = <0xaa000 0x1000>;
+        };
+
+        ethernet@e4000 {
+                cell-index = <2>;
+                compatible = "fsl,fman-memac";
+                reg = <0xe4000 0x1000>;
+                fsl,fman-ports = <&fman1_rx_0x0a &fman1_tx_0x2a>;
+                ptp-timer = <&ptp_timer1>;
+        };
+
+        mdio@e5000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xe5000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi
new file mode 100644
index 000000000000..bb627b3bf3db
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi
@@ -0,0 +1,62 @@
+/*
+ * QorIQ FMan v3 1g port #3 device tree stub [ controller @ offset 0x500000 ]
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@500000 {
+        fman1_rx_0x0b: port@8b000 {
+                cell-index = <0xb>;
+                compatible = "fsl,fman-v3-port-rx";
+                reg = <0x8b000 0x1000>;
+        };
+
+        fman1_tx_0x2b: port@ab000 {
+                cell-index = <0x2b>;
+                compatible = "fsl,fman-v3-port-tx";
+                reg = <0xab000 0x1000>;
+        };
+
+        ethernet@e6000 {
+                cell-index = <3>;
+                compatible = "fsl,fman-memac";
+                reg = <0xe6000 0x1000>;
+                fsl,fman-ports = <&fman1_rx_0x0b &fman1_tx_0x2b>;
+                ptp-timer = <&ptp_timer1>;
+        };
+
+        mdio@e7000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xe7000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi
new file mode 100644
index 000000000000..821ed12225d4
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi
@@ -0,0 +1,62 @@
+/*
+ * QorIQ FMan v3 1g port #4 device tree stub [ controller @ offset 0x500000 ]
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@500000 {
+        fman1_rx_0x0c: port@8c000 {
+                cell-index = <0xc>;
+                compatible = "fsl,fman-v3-port-rx";
+                reg = <0x8c000 0x1000>;
+        };
+
+        fman1_tx_0x2c: port@ac000 {
+                cell-index = <0x2c>;
+                compatible = "fsl,fman-v3-port-tx";
+                reg = <0xac000 0x1000>;
+        };
+
+        ethernet@e8000 {
+                cell-index = <4>;
+                compatible = "fsl,fman-memac";
+                reg = <0xe8000 0x1000>;
+                fsl,fman-ports = <&fman1_rx_0x0c &fman1_tx_0x2c>;
+                ptp-timer = <&ptp_timer1>;
+        };
+
+        mdio@e9000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xe9000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi
new file mode 100644
index 000000000000..e245f1a1e42a
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi
@@ -0,0 +1,62 @@
+/*
+ * QorIQ FMan v3 1g port #5 device tree stub [ controller @ offset 0x500000 ]
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman@500000 {
+        fman1_rx_0x0d: port@8d000 {
+                cell-index = <0xd>;
+                compatible = "fsl,fman-v3-port-rx";
+                reg = <0x8d000 0x1000>;
+        };
+
+        fman1_tx_0x2d: port@ad000 {
+                cell-index = <0x2d>;
+                compatible = "fsl,fman-v3-port-tx";
+                reg = <0xad000 0x1000>;
+        };
+
+        ethernet@ea000 {
+                cell-index = <5>;
+                compatible = "fsl,fman-memac";
+                reg = <0xea000 0x1000>;
+                fsl,fman-ports = <&fman1_rx_0x0d &fman1_tx_0x2d>;
+                ptp-timer = <&ptp_timer1>;
+        };
+
+        mdio@eb000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xeb000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1.dtsi
new file mode 100644
index 000000000000..82750ac944c7
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1.dtsi
@@ -0,0 +1,106 @@
+/*
+ * QorIQ FMan v3 device tree stub [ controller @ offset 0x500000 ]
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman1: fman@500000 {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        cell-index = <1>;
+        compatible = "fsl,fman";
+        ranges = <0 0x500000 0x100000>;
+        reg = <0x500000 0x100000>;
+        interrupts = <97 2 0 0>, <16 2 1 0>;
+        clocks = <&clockgen 3 1>;
+        clock-names = "fmanclk";
+        fsl,qman-channel-range = <0x820 0x10>;
+
+        muram@0 {
+                compatible = "fsl,fman-muram";
+                reg = <0x0 0x60000>;
+        };
+
+        fman1_oh_0x2: port@82000 {
+                cell-index = <0x2>;
+                compatible = "fsl,fman-v3-port-oh";
+                reg = <0x82000 0x1000>;
+        };
+
+        fman1_oh_0x3: port@83000 {
+                cell-index = <0x3>;
+                compatible = "fsl,fman-v3-port-oh";
+                reg = <0x83000 0x1000>;
+        };
+
+        fman1_oh_0x4: port@84000 {
+                cell-index = <0x4>;
+                compatible = "fsl,fman-v3-port-oh";
+                reg = <0x84000 0x1000>;
+        };
+
+        fman1_oh_0x5: port@85000 {
+                cell-index = <0x5>;
+                compatible = "fsl,fman-v3-port-oh";
+                reg = <0x85000 0x1000>;
+        };
+
+        fman1_oh_0x6: port@86000 {
+                cell-index = <0x6>;
+                compatible = "fsl,fman-v3-port-oh";
+                reg = <0x86000 0x1000>;
+        };
+
+        fman1_oh_0x7: port@87000 {
+                cell-index = <0x7>;
+                compatible = "fsl,fman-v3-port-oh";
+                reg = <0x87000 0x1000>;
+        };
+
+        mdio1: mdio@fc000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xfc000 0x1000>;
+        };
+
+        mdio@fd000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xfd000 0x1000>;
+        };
+
+        ptp_timer1: ptp-timer@fe000 {
+                compatible = "fsl,fman-ptp-timer";
+                reg = <0xfe000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3l-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3l-0.dtsi
new file mode 100644
index 000000000000..7f60b6060176
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3l-0.dtsi
@@ -0,0 +1,94 @@
+/*
+ * QorIQ FMan v3 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman0: fman@400000 {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        cell-index = <0>;
+        compatible = "fsl,fman";
+        ranges = <0 0x400000 0x100000>;
+        reg = <0x400000 0x100000>;
+        interrupts = <96 2 0 0>, <16 2 1 1>;
+        clocks = <&clockgen 3 0>;
+        clock-names = "fmanclk";
+        fsl,qman-channel-range = <0x800 0x10>;
+
+        muram@0 {
+                compatible = "fsl,fman-muram";
+                reg = <0x0 0x30000>;
+        };
+
+        fman0_oh_0x2: port@82000 {
+                cell-index = <0x2>;
+                compatible = "fsl,fman-v3-port-oh";
+                reg = <0x82000 0x1000>;
+        };
+
+        fman0_oh_0x3: port@83000 {
+                cell-index = <0x3>;
+                compatible = "fsl,fman-v3-port-oh";
+                reg = <0x83000 0x1000>;
+        };
+
+        fman0_oh_0x4: port@84000 {
+                cell-index = <0x4>;
+                compatible = "fsl,fman-v3-port-oh";
+                reg = <0x84000 0x1000>;
+        };
+
+        fman0_oh_0x5: port@85000 {
+                cell-index = <0x5>;
+                compatible = "fsl,fman-v3-port-oh";
+                reg = <0x85000 0x1000>;
+        };
+
+        mdio0: mdio@fc000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xfc000 0x1000>;
+        };
+
+        xmdio0: mdio@fd000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+                reg = <0xfd000 0x1000>;
+        };
+
+        ptp_timer0: ptp-timer@fe000 {
+                compatible = "fsl,fman-ptp-timer";
+                reg = <0xfe000 0x1000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/t1023rdb.dts b/arch/powerpc/boot/dts/fsl/t1023rdb.dts
index d3fa8294cd49..2b2fff4a12a2 100644
--- a/arch/powerpc/boot/dts/t1023rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t1023rdb.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/t102xsi-pre.dtsi"
+/include/ "t102xsi-pre.dtsi"
 
 / {
         model = "fsl,T1023RDB";
@@ -159,4 +159,4 @@
         };
 };
 
-/include/ "fsl/t1023si-post.dtsi"
+/include/ "t1023si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
index df1f068a5376..518ddaa8da2d 100644
--- a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
@@ -327,4 +327,23 @@
         };
 
 /include/ "qoriq-sec5.0-0.dtsi"
+
+/include/ "qoriq-fman3l-0.dtsi"
+/include/ "qoriq-fman3-0-10g-0-best-effort.dtsi"
+/include/ "qoriq-fman3-0-1g-1.dtsi"
+/include/ "qoriq-fman3-0-1g-2.dtsi"
+/include/ "qoriq-fman3-0-1g-3.dtsi"
+        fman@400000 {
+                enet0: ethernet@e0000 {
+                };
+
+                enet1: ethernet@e2000 {
+                };
+
+                enet2: ethernet@e4000 {
+                };
+
+                enet3: ethernet@e6000 {
+                };
+        };
 };
diff --git a/arch/powerpc/boot/dts/t1024qds.dts b/arch/powerpc/boot/dts/fsl/t1024qds.dts
index f31fabb383b9..43cd5b50cd0a 100644
--- a/arch/powerpc/boot/dts/t1024qds.dts
+++ b/arch/powerpc/boot/dts/fsl/t1024qds.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/t102xsi-pre.dtsi"
+/include/ "t102xsi-pre.dtsi"
 
 / {
         model = "fsl,T1024QDS";
@@ -248,4 +248,4 @@
         };
 };
 
-/include/ "fsl/t1024si-post.dtsi"
+/include/ "t1024si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/t1024rdb.dts b/arch/powerpc/boot/dts/fsl/t1024rdb.dts
index bf05e324fda2..429d8c73650a 100644
--- a/arch/powerpc/boot/dts/t1024rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t1024rdb.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/t102xsi-pre.dtsi"
+/include/ "t102xsi-pre.dtsi"
 
 / {
         model = "fsl,T1024RDB";
@@ -188,4 +188,4 @@
         };
 };
 
-/include/ "fsl/t1024si-post.dtsi"
+/include/ "t1024si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi b/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi
index 1f1a9f8474d5..3e1528abf3f4 100644
--- a/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi
@@ -59,6 +59,12 @@
                 sdhc = &sdhc;
 
                 crypto = &crypto;
+
+                fman0 = &fman0;
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                ethernet3 = &enet3;
         };
 
         cpus {
diff --git a/arch/powerpc/boot/dts/t1040d4rdb.dts b/arch/powerpc/boot/dts/fsl/t1040d4rdb.dts
index 2d1315a1670e..681746efd31d 100644
--- a/arch/powerpc/boot/dts/t1040d4rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t1040d4rdb.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/t104xsi-pre.dtsi"
+/include/ "t104xsi-pre.dtsi"
 /include/ "t104xd4rdb.dtsi"
 
 / {
@@ -43,4 +43,4 @@
         interrupt-parent = <&mpic>;
 };
 
-/include/ "fsl/t1040si-post.dtsi"
+/include/ "t1040si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/t1040qds.dts b/arch/powerpc/boot/dts/fsl/t1040qds.dts
index 973c29c2f56e..4d298659468c 100644
--- a/arch/powerpc/boot/dts/t1040qds.dts
+++ b/arch/powerpc/boot/dts/fsl/t1040qds.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/t104xsi-pre.dtsi"
+/include/ "t104xsi-pre.dtsi"
 /include/ "t104xqds.dtsi"
 
 / {
@@ -43,4 +43,4 @@
         interrupt-parent = <&mpic>;
 };
 
-/include/ "fsl/t1040si-post.dtsi"
+/include/ "t1040si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/t1040rdb.dts b/arch/powerpc/boot/dts/fsl/t1040rdb.dts
index 79a0bed04c1a..8f9e65b47515 100644
--- a/arch/powerpc/boot/dts/t1040rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t1040rdb.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/t104xsi-pre.dtsi"
+/include/ "t104xsi-pre.dtsi"
 /include/ "t104xrdb.dtsi"
 
 / {
@@ -45,4 +45,4 @@
         };
 };
 
-/include/ "fsl/t1040si-post.dtsi"
+/include/ "t1040si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
index 9770d0278493..d30b3de1cfc5 100644
--- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
@@ -547,4 +547,35 @@
 /include/ "qoriq-sec5.0-0.dtsi"
 /include/ "qoriq-qman3.dtsi"
 /include/ "qoriq-bman1.dtsi"
+
+/include/ "qoriq-fman3l-0.dtsi"
+/include/ "qoriq-fman3-0-1g-0.dtsi"
+/include/ "qoriq-fman3-0-1g-1.dtsi"
+/include/ "qoriq-fman3-0-1g-2.dtsi"
+/include/ "qoriq-fman3-0-1g-3.dtsi"
+/include/ "qoriq-fman3-0-1g-4.dtsi"
+        fman@400000 {
+                enet0: ethernet@e0000 {
+                };
+
+                enet1: ethernet@e2000 {
+                };
+
+                enet2: ethernet@e4000 {
+                };
+
+                enet3: ethernet@e6000 {
+                };
+
+                enet4: ethernet@e8000 {
+                };
+
+                mdio@fc000 {
+                        interrupts = <100 1 0 0>;
+                };
+
+                mdio@fd000 {
+                        status = "disabled";
+                };
+        };
 };
diff --git a/arch/powerpc/boot/dts/t1042d4rdb.dts b/arch/powerpc/boot/dts/fsl/t1042d4rdb.dts
index 846f8c87e85a..b245b31b8279 100644
--- a/arch/powerpc/boot/dts/t1042d4rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t1042d4rdb.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/t104xsi-pre.dtsi"
+/include/ "t104xsi-pre.dtsi"
 /include/ "t104xd4rdb.dtsi"
 
 / {
@@ -50,4 +50,4 @@
         };
 };
 
-/include/ "fsl/t1040si-post.dtsi"
+/include/ "t1040si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/t1042qds.dts b/arch/powerpc/boot/dts/fsl/t1042qds.dts
index 45bd03752154..4ab9bbe7c5c5 100644
--- a/arch/powerpc/boot/dts/t1042qds.dts
+++ b/arch/powerpc/boot/dts/fsl/t1042qds.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/t104xsi-pre.dtsi"
+/include/ "t104xsi-pre.dtsi"
 /include/ "t104xqds.dtsi"
 
 / {
@@ -43,4 +43,4 @@
         interrupt-parent = <&mpic>;
 };
 
-/include/ "fsl/t1042si-post.dtsi"
+/include/ "t1042si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/t1042rdb.dts b/arch/powerpc/boot/dts/fsl/t1042rdb.dts
index 738c23790e94..67af56bc5ee9 100644
--- a/arch/powerpc/boot/dts/t1042rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t1042rdb.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/t104xsi-pre.dtsi"
+/include/ "t104xsi-pre.dtsi"
 /include/ "t104xrdb.dtsi"
 
 / {
@@ -45,4 +45,4 @@
         };
 };
 
-/include/ "fsl/t1042si-post.dtsi"
+/include/ "t1042si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/t1042rdb_pi.dts b/arch/powerpc/boot/dts/fsl/t1042rdb_pi.dts
index 634f751fa6d3..2f67677530a4 100644
--- a/arch/powerpc/boot/dts/t1042rdb_pi.dts
+++ b/arch/powerpc/boot/dts/fsl/t1042rdb_pi.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/t104xsi-pre.dtsi"
+/include/ "t104xsi-pre.dtsi"
 /include/ "t104xrdb.dtsi"
 
 / {
@@ -54,4 +54,4 @@
         };
 };
 
-/include/ "fsl/t1042si-post.dtsi"
+/include/ "t1042si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/t104xd4rdb.dtsi b/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi
index 491367bd3883..3f6d7c6a106b 100644
--- a/arch/powerpc/boot/dts/t104xd4rdb.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi
@@ -109,6 +109,16 @@
                                 /* input clock */
                                 spi-max-frequency = <10000000>;
                         };
+                        slic@1 {
+                                compatible = "maxim,ds26522";
+                                reg = <1>;
+                                spi-max-frequency = <2000000>; /* input clock */
+                        };
+                        slic@2 {
+                                compatible = "maxim,ds26522";
+                                reg = <2>;
+                                spi-max-frequency = <2000000>; /* input clock */
+                        };
                 };
                 i2c@118000 {
                         hwmon@4c {
diff --git a/arch/powerpc/boot/dts/t104xqds.dtsi b/arch/powerpc/boot/dts/fsl/t104xqds.dtsi
index 1498d1e4aecf..1498d1e4aecf 100644
--- a/arch/powerpc/boot/dts/t104xqds.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xqds.dtsi
diff --git a/arch/powerpc/boot/dts/t104xrdb.dtsi b/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
index 830ea484295b..830ea484295b 100644
--- a/arch/powerpc/boot/dts/t104xrdb.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
diff --git a/arch/powerpc/boot/dts/fsl/t104xsi-pre.dtsi b/arch/powerpc/boot/dts/fsl/t104xsi-pre.dtsi
index bbb7025ca9c2..fcfa38ae5e02 100644
--- a/arch/powerpc/boot/dts/fsl/t104xsi-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xsi-pre.dtsi
@@ -1,7 +1,7 @@
 /*
  * T1040/T1042 Silicon/SoC Device Tree Source (pre include)
  *
- * Copyright 2013 Freescale Semiconductor Inc.
+ * Copyright 2013-2014 Freescale Semiconductor Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -58,6 +58,13 @@
                 sdhc = &sdhc;
 
                 crypto = &crypto;
+
+                fman0 = &fman0;
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                ethernet3 = &enet3;
+                ethernet4 = &enet4;
         };
 
         cpus {
diff --git a/arch/powerpc/boot/dts/t2080qds.dts b/arch/powerpc/boot/dts/fsl/t2080qds.dts
index aa1d6d8c169b..9c8e10fe04cb 100644
--- a/arch/powerpc/boot/dts/t2080qds.dts
+++ b/arch/powerpc/boot/dts/fsl/t2080qds.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/t208xsi-pre.dtsi"
+/include/ "t208xsi-pre.dtsi"
 /include/ "t208xqds.dtsi"
 
 / {
@@ -54,4 +54,4 @@
         };
 };
 
-/include/ "fsl/t2080si-post.dtsi"
+/include/ "t2080si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/t2080rdb.dts b/arch/powerpc/boot/dts/fsl/t2080rdb.dts
index e8891047600c..33205bf08919 100644
--- a/arch/powerpc/boot/dts/t2080rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t2080rdb.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/t208xsi-pre.dtsi"
+/include/ "t208xsi-pre.dtsi"
 /include/ "t208xrdb.dtsi"
 
 / {
@@ -54,4 +54,4 @@
         };
 };
 
-/include/ "fsl/t2080si-post.dtsi"
+/include/ "t2080si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/t2081qds.dts b/arch/powerpc/boot/dts/fsl/t2081qds.dts
index 8ec80a71e102..b81213596dbf 100644
--- a/arch/powerpc/boot/dts/t2081qds.dts
+++ b/arch/powerpc/boot/dts/fsl/t2081qds.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/t208xsi-pre.dtsi"
+/include/ "t208xsi-pre.dtsi"
 /include/ "t208xqds.dtsi"
 
 / {
@@ -43,4 +43,4 @@
         interrupt-parent = <&mpic>;
 };
 
-/include/ "fsl/t2081si-post.dtsi"
+/include/ "t2081si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
index 32c790ae7fde..c744569a20e1 100644
--- a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
@@ -630,6 +630,49 @@
 /include/ "qoriq-qman3.dtsi"
 /include/ "qoriq-bman1.dtsi"
 
+/include/ "qoriq-fman3-0.dtsi"
+/include/ "qoriq-fman3-0-1g-0.dtsi"
+/include/ "qoriq-fman3-0-1g-1.dtsi"
+/include/ "qoriq-fman3-0-1g-2.dtsi"
+/include/ "qoriq-fman3-0-1g-3.dtsi"
+/include/ "qoriq-fman3-0-1g-4.dtsi"
+/include/ "qoriq-fman3-0-1g-5.dtsi"
+/include/ "qoriq-fman3-0-10g-0.dtsi"
+/include/ "qoriq-fman3-0-10g-1.dtsi"
+        fman@400000 {
+                enet0: ethernet@e0000 {
+                };
+
+                enet1: ethernet@e2000 {
+                };
+
+                enet2: ethernet@e4000 {
+                };
+
+                enet3: ethernet@e6000 {
+                };
+
+                enet4: ethernet@e8000 {
+                };
+
+                enet5: ethernet@ea000 {
+                };
+
+                enet6: ethernet@f0000 {
+                };
+
+                enet7: ethernet@f2000 {
+                };
+
+                mdio@fc000 {
+                        interrupts = <100 1 0 0>;
+                };
+
+                mdio@fd000 {
+                        interrupts = <101 1 0 0>;
+                };
+        };
+
         L2_1: l2-cache-controller@c20000 {
                 /* Cluster 0 L2 cache */
                 compatible = "fsl,t2080-l2-cache-controller";
diff --git a/arch/powerpc/boot/dts/t208xqds.dtsi b/arch/powerpc/boot/dts/fsl/t208xqds.dtsi
index 869f9159b4d1..869f9159b4d1 100644
--- a/arch/powerpc/boot/dts/t208xqds.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t208xqds.dtsi
diff --git a/arch/powerpc/boot/dts/t208xrdb.dtsi b/arch/powerpc/boot/dts/fsl/t208xrdb.dtsi
index 693d2a8fa01c..693d2a8fa01c 100644
--- a/arch/powerpc/boot/dts/t208xrdb.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t208xrdb.dtsi
diff --git a/arch/powerpc/boot/dts/fsl/t208xsi-pre.dtsi b/arch/powerpc/boot/dts/fsl/t208xsi-pre.dtsi
index e71ceb0e1100..c2e57203910d 100644
--- a/arch/powerpc/boot/dts/fsl/t208xsi-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t208xsi-pre.dtsi
@@ -51,6 +51,17 @@
                 serial3 = &serial3;
 
                 crypto = &crypto;
+
+                fman0 = &fman0;
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                ethernet3 = &enet3;
+                ethernet4 = &enet4;
+                ethernet5 = &enet5;
+                ethernet6 = &enet6;
+                ethernet7 = &enet7;
+
                 pci0 = &pci0;
                 pci1 = &pci1;
                 pci2 = &pci2;
diff --git a/arch/powerpc/boot/dts/t4240qds.dts b/arch/powerpc/boot/dts/fsl/t4240qds.dts
index 93722da10e16..c067a6533809 100644
--- a/arch/powerpc/boot/dts/t4240qds.dts
+++ b/arch/powerpc/boot/dts/fsl/t4240qds.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/t4240si-pre.dtsi"
+/include/ "t4240si-pre.dtsi"
 
 / {
         model = "fsl,T4240QDS";
@@ -307,4 +307,4 @@
         };
 };
 
-/include/ "fsl/t4240si-post.dtsi"
+/include/ "t4240si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/t4240rdb.dts b/arch/powerpc/boot/dts/fsl/t4240rdb.dts
index 993eb4b8a487..6e820a875621 100644
--- a/arch/powerpc/boot/dts/t4240rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t4240rdb.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "fsl/t4240si-pre.dtsi"
+/include/ "t4240si-pre.dtsi"
 
 / {
         model = "fsl,T4240RDB";
@@ -210,4 +210,4 @@
         };
 };
 
-/include/ "fsl/t4240si-post.dtsi"
+/include/ "t4240si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
index d806360d0f64..68c4eadc19e3 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -1,7 +1,7 @@
 /*
  * T4240 Silicon/SoC Device Tree Source (post include)
  *
- * Copyright 2012 - 2014 Freescale Semiconductor Inc.
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -1068,6 +1068,92 @@
 /include/ "qoriq-qman3.dtsi"
 /include/ "qoriq-bman1.dtsi"
 
+/include/ "qoriq-fman3-0.dtsi"
+/include/ "qoriq-fman3-0-1g-0.dtsi"
+/include/ "qoriq-fman3-0-1g-1.dtsi"
+/include/ "qoriq-fman3-0-1g-2.dtsi"
+/include/ "qoriq-fman3-0-1g-3.dtsi"
+/include/ "qoriq-fman3-0-1g-4.dtsi"
+/include/ "qoriq-fman3-0-1g-5.dtsi"
+/include/ "qoriq-fman3-0-10g-0.dtsi"
+/include/ "qoriq-fman3-0-10g-1.dtsi"
+        fman@400000 {
+                enet0: ethernet@e0000 {
+                };
+
+                enet1: ethernet@e2000 {
+                };
+
+                enet2: ethernet@e4000 {
+                };
+
+                enet3: ethernet@e6000 {
+                };
+
+                enet4: ethernet@e8000 {
+                };
+
+                enet5: ethernet@ea000 {
+                };
+
+                enet6: ethernet@f0000 {
+                };
+
+                enet7: ethernet@f2000 {
+                };
+
+                mdio@fc000 {
+                        status = "disabled";
+                };
+
+                mdio@fd000 {
+                        status = "disabled";
+                };
+        };
+
+/include/ "qoriq-fman3-1.dtsi"
+/include/ "qoriq-fman3-1-1g-0.dtsi"
+/include/ "qoriq-fman3-1-1g-1.dtsi"
+/include/ "qoriq-fman3-1-1g-2.dtsi"
+/include/ "qoriq-fman3-1-1g-3.dtsi"
+/include/ "qoriq-fman3-1-1g-4.dtsi"
+/include/ "qoriq-fman3-1-1g-5.dtsi"
+/include/ "qoriq-fman3-1-10g-0.dtsi"
+/include/ "qoriq-fman3-1-10g-1.dtsi"
+        fman@500000 {
+                enet8: ethernet@e0000 {
+                };
+
+                enet9: ethernet@e2000 {
+                };
+
+                enet10: ethernet@e4000 {
+                };
+
+                enet11: ethernet@e6000 {
+                };
+
+                enet12: ethernet@e8000 {
+                };
+
+                enet13: ethernet@ea000 {
+                };
+
+                enet14: ethernet@f0000 {
+                };
+
+                enet15: ethernet@f2000 {
+                };
+
+                mdio@fc000 {
+                        interrupts = <100 1 0 0>;
+                };
+
+                mdio@fd000 {
+                        interrupts = <101 1 0 0>;
+                };
+        };
+
         L2_1: l2-cache-controller@c20000 {
                 compatible = "fsl,t4240-l2-cache-controller";
                 reg = <0xc20000 0x40000>;
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
index 261a3abb1a55..1184a746fcb1 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
@@ -1,7 +1,7 @@
 /*
  * T4240 Silicon/SoC Device Tree Source (pre include)
  *
- * Copyright 2012 Freescale Semiconductor Inc.
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -51,6 +51,7 @@
                 serial2 = &serial2;
                 serial3 = &serial3;
                 crypto = &crypto;
+
                 pci0 = &pci0;
                 pci1 = &pci1;
                 pci2 = &pci2;
@@ -59,6 +60,25 @@
                 dma1 = &dma1;
                 dma2 = &dma2;
                 sdhc = &sdhc;
+
+                fman0 = &fman0;
+                fman1 = &fman1;
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                ethernet3 = &enet3;
+                ethernet4 = &enet4;
+                ethernet5 = &enet5;
+                ethernet6 = &enet6;
+                ethernet7 = &enet7;
+                ethernet8 = &enet8;
+                ethernet9 = &enet9;
+                ethernet10 = &enet10;
+                ethernet11 = &enet11;
+                ethernet12 = &enet12;
+                ethernet13 = &enet13;
+                ethernet14 = &enet14;
+                ethernet15 = &enet15;
         };
 
         cpus {
diff --git a/arch/powerpc/boot/dts/mpc5121.dtsi b/arch/powerpc/boot/dts/mpc5121.dtsi
index 7f9d14f5c4da..a015e450437a 100644
--- a/arch/powerpc/boot/dts/mpc5121.dtsi
+++ b/arch/powerpc/boot/dts/mpc5121.dtsi
@@ -77,7 +77,6 @@
                 #address-cells = <2>;
                 #size-cells = <1>;
                 reg = <0x80000020 0x40>;
-                interrupts = <7 0x8>;
                 ranges = <0x0 0x0 0xfc000000 0x04000000>;
         };
 
@@ -329,7 +328,15 @@
                 /* LocalPlus controller */
                 lpc@10000 {
                         compatible = "fsl,mpc5121-lpc";
-                        reg = <0x10000 0x200>;
+                        reg = <0x10000 0x100>;
+                };
+
+                sclpc@10100 {
+                        compatible = "fsl,mpc512x-lpbfifo";
+                        reg = <0x10100 0x50>;
+                        interrupts = <7 0x8>;
+                        dmas = <&dma0 26>;
+                        dma-names = "rx-tx";
                 };
 
                 pata@10200 {
diff --git a/arch/powerpc/boot/dts/mpc5125twr.dts b/arch/powerpc/boot/dts/mpc5125twr.dts
index e4f297471748..898eb58e49dd 100644
--- a/arch/powerpc/boot/dts/mpc5125twr.dts
+++ b/arch/powerpc/boot/dts/mpc5125twr.dts
@@ -246,6 +246,14 @@
                         status = "disabled";
                 };
 
+                sclpc@10100 {
+                        compatible = "fsl,mpc512x-lpbfifo";
+                        reg = <0x10100 0x50>;
+                        interrupts = <7 0x8>;
+                        dmas = <&dma0 26>;
+                        dma-names = "rx-tx";
+                };
+
                 // 5125 PSCs are not 52xx or 5121 PSC compatible
                 // PSC1 uart0 aka ttyPSC0
                 serial@11100 {
@@ -279,10 +287,11 @@
                         clock-names = "ipg";
                 };
 
-                dma@14000 {
+                dma0: dma@14000 {
                         compatible = "fsl,mpc5121-dma"; // BSP name: "mpc512x-dma2"
                         reg = <0x14000 0x1800>;
                         interrupts = <65 0x8>;
+                        #dma-cells = <1>;
                 };
         };
 };
diff --git a/arch/powerpc/boot/dts/prpmc2800.dts b/arch/powerpc/boot/dts/prpmc2800.dts
deleted file mode 100644
index 00afaacf8c8c..000000000000
--- a/arch/powerpc/boot/dts/prpmc2800.dts
+++ /dev/null
@@ -1,297 +0,0 @@
-/* Device Tree Source for Motorola PrPMC2800
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- *
- * 2007 (c) MontaVista, Software, Inc.  This file is licensed under
- * the terms of the GNU General Public License version 2.  This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Property values that are labeled as "Default" will be updated by bootwrapper
- * if it can determine the exact PrPMC type.
- */
-
-/dts-v1/;
-
-/ {
-        #address-cells = <1>;
-        #size-cells = <1>;
-        model = "PrPMC280/PrPMC2800"; /* Default */
-        compatible = "motorola,PrPMC2800";
-        coherency-off;
-
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                PowerPC,7447 {
-                        device_type = "cpu";
-                        reg = <0>;
-                        clock-frequency = <733333333>;  /* Default */
-                        bus-frequency = <133333333>;
-                        timebase-frequency = <33333333>;
-                        i-cache-line-size = <32>;
-                        d-cache-line-size = <32>;
-                        i-cache-size = <32768>;
-                        d-cache-size = <32768>;
-                };
-        };
-
-        memory {
-                device_type = "memory";
-                reg = <0x0 0x20000000>;                 /* Default (512MB) */
-        };
-
-        system-controller@f1000000 { /* Marvell Discovery mv64360 */
-                #address-cells = <1>;
-                #size-cells = <1>;
-                model = "mv64360";                      /* Default */
-                compatible = "marvell,mv64360";
-                clock-frequency = <133333333>;
-                reg = <0xf1000000 0x10000>;
-                virtual-reg = <0xf1000000>;
-                ranges = <0x88000000 0x88000000 0x1000000 /* PCI 0 I/O Space */
-                          0x80000000 0x80000000 0x8000000 /* PCI 0 MEM Space */
-                          0xa0000000 0xa0000000 0x4000000 /* User FLASH */
-                          0x00000000 0xf1000000 0x0010000 /* Bridge's regs */
-                          0xf2000000 0xf2000000 0x0040000>;/* Integrated SRAM */
-
-                flash@a0000000 {
-                        device_type = "rom";
-                        compatible = "direct-mapped";
-                        reg = <0xa0000000 0x4000000>; /* Default (64MB) */
-                        probe-type = "CFI";
-                        bank-width = <4>;
-                        partitions = <0x00000000 0x00100000 /* RO */
-                                      0x00100000 0x00040001 /* RW */
-                                      0x00140000 0x00400000 /* RO */
-                                      0x00540000 0x039c0000 /* RO */
-                                      0x03f00000 0x00100000>; /* RO */
-                        partition-names = "FW Image A", "FW Config Data", "Kernel Image", "Filesystem", "FW Image B";
-                };
-
-                mdio {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "marvell,mv64360-mdio";
-                        PHY0: ethernet-phy@1 {
-                                compatible = "broadcom,bcm5421";
-                                interrupts = <76>;      /* GPP 12 */
-                                interrupt-parent = <&PIC>;
-                                reg = <1>;
-                        };
-                        PHY1: ethernet-phy@3 {
-                                compatible = "broadcom,bcm5421";
-                                interrupts = <76>;      /* GPP 12 */
-                                interrupt-parent = <&PIC>;
-                                reg = <3>;
-                        };
-                };
-
-                ethernet-group@2000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "marvell,mv64360-eth-group";
-                        reg = <0x2000 0x2000>;
-                        ethernet@0 {
-                                device_type = "network";
-                                compatible = "marvell,mv64360-eth";
-                                reg = <0>;
-                                interrupts = <32>;
-                                interrupt-parent = <&PIC>;
-                                phy = <&PHY0>;
-                                local-mac-address = [ 00 00 00 00 00 00 ];
-                        };
-                        ethernet@1 {
-                                device_type = "network";
-                                compatible = "marvell,mv64360-eth";
-                                reg = <1>;
-                                interrupts = <33>;
-                                interrupt-parent = <&PIC>;
-                                phy = <&PHY1>;
-                                local-mac-address = [ 00 00 00 00 00 00 ];
-                        };
-                };
-
-                SDMA0: sdma@4000 {
-                        compatible = "marvell,mv64360-sdma";
-                        reg = <0x4000 0xc18>;
-                        virtual-reg = <0xf1004000>;
-                        interrupts = <36>;
-                        interrupt-parent = <&PIC>;
-                };
-
-                SDMA1: sdma@6000 {
-                        compatible = "marvell,mv64360-sdma";
-                        reg = <0x6000 0xc18>;
-                        virtual-reg = <0xf1006000>;
-                        interrupts = <38>;
-                        interrupt-parent = <&PIC>;
-                };
-
-                BRG0: brg@b200 {
-                        compatible = "marvell,mv64360-brg";
-                        reg = <0xb200 0x8>;
-                        clock-src = <8>;
-                        clock-frequency = <133333333>;
-                        current-speed = <9600>;
-                };
-
-                BRG1: brg@b208 {
-                        compatible = "marvell,mv64360-brg";
-                        reg = <0xb208 0x8>;
-                        clock-src = <8>;
-                        clock-frequency = <133333333>;
-                        current-speed = <9600>;
-                };
-
-                CUNIT: cunit@f200 {
-                        reg = <0xf200 0x200>;
-                };
-
-                MPSCROUTING: mpscrouting@b400 {
-                        reg = <0xb400 0xc>;
-                };
-
-                MPSCINTR: mpscintr@b800 {
-                        reg = <0xb800 0x100>;
-                        virtual-reg = <0xf100b800>;
-                };
-
-                MPSC0: mpsc@8000 {
-                        compatible = "marvell,mv64360-mpsc";
-                        reg = <0x8000 0x38>;
-                        virtual-reg = <0xf1008000>;
-                        sdma = <&SDMA0>;
-                        brg = <&BRG0>;
-                        cunit = <&CUNIT>;
-                        mpscrouting = <&MPSCROUTING>;
-                        mpscintr = <&MPSCINTR>;
-                        cell-index = <0>;
-                        interrupts = <40>;
-                        interrupt-parent = <&PIC>;
-                };
-
-                MPSC1: mpsc@9000 {
-                        compatible = "marvell,mv64360-mpsc";
-                        reg = <0x9000 0x38>;
-                        virtual-reg = <0xf1009000>;
-                        sdma = <&SDMA1>;
-                        brg = <&BRG1>;
-                        cunit = <&CUNIT>;
-                        mpscrouting = <&MPSCROUTING>;
-                        mpscintr = <&MPSCINTR>;
-                        cell-index = <1>;
-                        interrupts = <42>;
-                        interrupt-parent = <&PIC>;
-                };
-
-                wdt@b410 {                      /* watchdog timer */
-                        compatible = "marvell,mv64360-wdt";
-                        reg = <0xb410 0x8>;
-                };
-
-                i2c@c000 {
-                        device_type = "i2c";
-                        compatible = "marvell,mv64360-i2c";
-                        reg = <0xc000 0x20>;
-                        virtual-reg = <0xf100c000>;
-                        interrupts = <37>;
-                        interrupt-parent = <&PIC>;
-                };
-
-                PIC: pic {
-                        #interrupt-cells = <1>;
-                        #address-cells = <0>;
-                        compatible = "marvell,mv64360-pic";
-                        reg = <0x0 0x88>;
-                        interrupt-controller;
-                };
-
-                mpp@f000 {
-                        compatible = "marvell,mv64360-mpp";
-                        reg = <0xf000 0x10>;
-                };
-
-                gpp@f100 {
-                        compatible = "marvell,mv64360-gpp";
-                        reg = <0xf100 0x20>;
-                };
-
-                pci@80000000 {
-                        #address-cells = <3>;
-                        #size-cells = <2>;
-                        #interrupt-cells = <1>;
-                        device_type = "pci";
-                        compatible = "marvell,mv64360-pci";
-                        reg = <0xcf8 0x8>;
-                        ranges = <0x01000000 0x0        0x0
-                                        0x88000000 0x0 0x01000000
-                                  0x02000000 0x0 0x80000000
-                                        0x80000000 0x0 0x08000000>;
-                        bus-range = <0 255>;
-                        clock-frequency = <66000000>;
-                        interrupt-pci-iack = <0xc34>;
-                        interrupt-parent = <&PIC>;
-                        interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                        interrupt-map = <
-                                /* IDSEL 0x0a */
-                                0x5000 0 0 1 &PIC 80
-                                0x5000 0 0 2 &PIC 81
-                                0x5000 0 0 3 &PIC 91
-                                0x5000 0 0 4 &PIC 93
-
-                                /* IDSEL 0x0b */
-                                0x5800 0 0 1 &PIC 91
-                                0x5800 0 0 2 &PIC 93
-                                0x5800 0 0 3 &PIC 80
-                                0x5800 0 0 4 &PIC 81
-
-                                /* IDSEL 0x0c */
-                                0x6000 0 0 1 &PIC 91
-                                0x6000 0 0 2 &PIC 93
-                                0x6000 0 0 3 &PIC 80
-                                0x6000 0 0 4 &PIC 81
-
-                                /* IDSEL 0x0d */
-                                0x6800 0 0 1 &PIC 93
-                                0x6800 0 0 2 &PIC 80
-                                0x6800 0 0 3 &PIC 81
-                                0x6800 0 0 4 &PIC 91
-                        >;
-                };
-
-                cpu-error@0070 {
-                        compatible = "marvell,mv64360-cpu-error";
-                        reg = <0x70 0x10 0x128 0x28>;
-                        interrupts = <3>;
-                        interrupt-parent = <&PIC>;
-                };
-
-                sram-ctrl@0380 {
-                        compatible = "marvell,mv64360-sram-ctrl";
-                        reg = <0x380 0x80>;
-                        interrupts = <13>;
-                        interrupt-parent = <&PIC>;
-                };
-
-                pci-error@1d40 {
-                        compatible = "marvell,mv64360-pci-error";
-                        reg = <0x1d40 0x40 0xc28 0x4>;
-                        interrupts = <12>;
-                        interrupt-parent = <&PIC>;
-                };
-
-                mem-ctrl@1400 {
-                        compatible = "marvell,mv64360-mem-ctrl";
-                        reg = <0x1400 0x60>;
-                        interrupts = <17>;
-                        interrupt-parent = <&PIC>;
-                };
-        };
-
-        chosen {
-                bootargs = "ip=on";
-                linux,stdout-path = &MPSC0;
-        };
-};
diff --git a/arch/powerpc/boot/page.h b/arch/powerpc/boot/page.h
index 14eca30fef64..87c42d7d283d 100644
--- a/arch/powerpc/boot/page.h
+++ b/arch/powerpc/boot/page.h
@@ -22,8 +22,8 @@
 #define PAGE_MASK       (~(PAGE_SIZE-1))
 
 /* align addr on a size boundary - adjust address up/down if needed */
-#define _ALIGN_UP(addr,size)    (((addr)+((size)-1))&(~((size)-1)))
-#define _ALIGN_DOWN(addr,size)  ((addr)&(~((size)-1)))
+#define _ALIGN_UP(addr, size)   (((addr)+((size)-1))&(~((typeof(addr))(size)-1)))
+#define _ALIGN_DOWN(addr, size) ((addr)&(~((typeof(addr))(size)-1)))
 
 /* align addr on a size boundary - adjust address up if needed */
 #define _ALIGN(addr,size)     _ALIGN_UP(addr,size)
diff --git a/arch/powerpc/boot/prpmc2800.c b/arch/powerpc/boot/prpmc2800.c
deleted file mode 100644
index da31d6030482..000000000000
--- a/arch/powerpc/boot/prpmc2800.c
+++ /dev/null
@@ -1,571 +0,0 @@
-/*
- * Motorola ECC prpmc280/f101 & prpmc2800/f101e platform code.
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- *
- * 2007 (c) MontaVista, Software, Inc.  This file is licensed under
- * the terms of the GNU General Public License version 2.  This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <stdarg.h>
-#include <stddef.h>
-#include "types.h"
-#include "elf.h"
-#include "page.h"
-#include "string.h"
-#include "stdio.h"
-#include "io.h"
-#include "ops.h"
-#include "gunzip_util.h"
-#include "mv64x60.h"
-
-#define KB      1024U
-#define MB      (KB*KB)
-#define GB      (KB*MB)
-#define MHz     (1000U*1000U)
-#define GHz     (1000U*MHz)
-
-#define BOARD_MODEL     "PrPMC2800"
-#define BOARD_MODEL_MAX 32 /* max strlen(BOARD_MODEL) + 1 */
-
-#define EEPROM2_ADDR    0xa4
-#define EEPROM3_ADDR    0xa8
-
-BSS_STACK(16*KB);
-
-static u8 *bridge_base;
-
-typedef enum {
-        BOARD_MODEL_PRPMC280,
-        BOARD_MODEL_PRPMC2800,
-} prpmc2800_board_model;
-
-typedef enum {
-        BRIDGE_TYPE_MV64360,
-        BRIDGE_TYPE_MV64362,
-} prpmc2800_bridge_type;
-
-struct prpmc2800_board_info {
-        prpmc2800_board_model model;
-        char variant;
-        prpmc2800_bridge_type bridge_type;
-        u8 subsys0;
-        u8 subsys1;
-        u8 vpd4;
-        u8 vpd4_mask;
-        u32 core_speed;
-        u32 mem_size;
-        u32 boot_flash;
-        u32 user_flash;
-};
-
-static struct prpmc2800_board_info prpmc2800_board_info[] = {
-        {
-                .model          = BOARD_MODEL_PRPMC280,
-                .variant        = 'a',
-                .bridge_type    = BRIDGE_TYPE_MV64360,
-                .subsys0        = 0xff,
-                .subsys1        = 0xff,
-                .vpd4           = 0x00,
-                .vpd4_mask      = 0x0f,
-                .core_speed     = 1*GHz,
-                .mem_size       = 512*MB,
-                .boot_flash     = 1*MB,
-                .user_flash     = 64*MB,
-        },
-        {
-                .model          = BOARD_MODEL_PRPMC280,
-                .variant        = 'b',
-                .bridge_type    = BRIDGE_TYPE_MV64362,
-                .subsys0        = 0xff,
-                .subsys1        = 0xff,
-                .vpd4           = 0x01,
-                .vpd4_mask      = 0x0f,
-                .core_speed     = 1*GHz,
-                .mem_size       = 512*MB,
-                .boot_flash     = 0,
-                .user_flash     = 0,
-        },
-        {
-                .model          = BOARD_MODEL_PRPMC280,
-                .variant        = 'c',
-                .bridge_type    = BRIDGE_TYPE_MV64360,
-                .subsys0        = 0xff,
-                .subsys1        = 0xff,
-                .vpd4           = 0x02,
-                .vpd4_mask      = 0x0f,
-                .core_speed     = 733*MHz,
-                .mem_size       = 512*MB,
-                .boot_flash     = 1*MB,
-                .user_flash     = 64*MB,
-        },
-        {
-                .model          = BOARD_MODEL_PRPMC280,
-                .variant        = 'd',
-                .bridge_type    = BRIDGE_TYPE_MV64360,
-                .subsys0        = 0xff,
-                .subsys1        = 0xff,
-                .vpd4           = 0x03,
-                .vpd4_mask      = 0x0f,
-                .core_speed     = 1*GHz,
-                .mem_size       = 1*GB,
-                .boot_flash     = 1*MB,
-                .user_flash     = 64*MB,
-        },
-        {
-                .model          = BOARD_MODEL_PRPMC280,
-                .variant        = 'e',
-                .bridge_type    = BRIDGE_TYPE_MV64360,
-                .subsys0        = 0xff,
-                .subsys1        = 0xff,
-                .vpd4           = 0x04,
-                .vpd4_mask      = 0x0f,
-                .core_speed     = 1*GHz,
-                .mem_size       = 512*MB,
-                .boot_flash     = 1*MB,
-                .user_flash     = 64*MB,
-        },
-        {
-                .model          = BOARD_MODEL_PRPMC280,
-                .variant        = 'f',
-                .bridge_type    = BRIDGE_TYPE_MV64362,
-                .subsys0        = 0xff,
-                .subsys1        = 0xff,
-                .vpd4           = 0x05,
-                .vpd4_mask      = 0x0f,
-                .core_speed     = 733*MHz,
-                .mem_size       = 128*MB,
-                .boot_flash     = 1*MB,
-                .user_flash     = 0,
-        },
-        {
-                .model          = BOARD_MODEL_PRPMC280,
-                .variant        = 'g',
-                .bridge_type    = BRIDGE_TYPE_MV64360,
-                .subsys0        = 0xff,
-                .subsys1        = 0xff,
-                .vpd4           = 0x06,
-                .vpd4_mask      = 0x0f,
-                .core_speed     = 1*GHz,
-                .mem_size       = 256*MB,
-                .boot_flash     = 1*MB,
-                .user_flash     = 0,
-        },
-        {
-                .model          = BOARD_MODEL_PRPMC280,
-                .variant        = 'h',
-                .bridge_type    = BRIDGE_TYPE_MV64360,
-                .subsys0        = 0xff,
-                .subsys1        = 0xff,
-                .vpd4           = 0x07,
-                .vpd4_mask      = 0x0f,
-                .core_speed     = 1*GHz,
-                .mem_size       = 1*GB,
-                .boot_flash     = 1*MB,
-                .user_flash     = 64*MB,
-        },
-        {
-                .model          = BOARD_MODEL_PRPMC2800,
-                .variant        = 'a',
-                .bridge_type    = BRIDGE_TYPE_MV64360,
-                .subsys0        = 0xb2,
-                .subsys1        = 0x8c,
-                .vpd4           = 0x00,
-                .vpd4_mask      = 0x00,
-                .core_speed     = 1*GHz,
-                .mem_size       = 512*MB,
-                .boot_flash     = 2*MB,
-                .user_flash     = 64*MB,
-        },
-        {
-                .model          = BOARD_MODEL_PRPMC2800,
-                .variant        = 'b',
-                .bridge_type    = BRIDGE_TYPE_MV64362,
-                .subsys0        = 0xb2,
-                .subsys1        = 0x8d,
-                .vpd4           = 0x00,
-                .vpd4_mask      = 0x00,
-                .core_speed     = 1*GHz,
-                .mem_size       = 512*MB,
-                .boot_flash     = 0,
-                .user_flash     = 0,
-        },
-        {
-                .model          = BOARD_MODEL_PRPMC2800,
-                .variant        = 'c',
-                .bridge_type    = BRIDGE_TYPE_MV64360,
-                .subsys0        = 0xb2,
-                .subsys1        = 0x8e,
-                .vpd4           = 0x00,
-                .vpd4_mask      = 0x00,
-                .core_speed     = 733*MHz,
-                .mem_size       = 512*MB,
-                .boot_flash     = 2*MB,
-                .user_flash     = 64*MB,
-        },
-        {
-                .model          = BOARD_MODEL_PRPMC2800,
-                .variant        = 'd',
-                .bridge_type    = BRIDGE_TYPE_MV64360,
-                .subsys0        = 0xb2,
-                .subsys1        = 0x8f,
-                .vpd4           = 0x00,
-                .vpd4_mask      = 0x00,
-                .core_speed     = 1*GHz,
-                .mem_size       = 1*GB,
-                .boot_flash     = 2*MB,
-                .user_flash     = 64*MB,
-        },
-        {
-                .model          = BOARD_MODEL_PRPMC2800,
-                .variant        = 'e',
-                .bridge_type    = BRIDGE_TYPE_MV64360,
-                .subsys0        = 0xa2,
-                .subsys1        = 0x8a,
-                .vpd4           = 0x00,
-                .vpd4_mask      = 0x00,
-                .core_speed     = 1*GHz,
-                .mem_size       = 512*MB,
-                .boot_flash     = 2*MB,
-                .user_flash     = 64*MB,
-        },
-        {
-                .model          = BOARD_MODEL_PRPMC2800,
-                .variant        = 'f',
-                .bridge_type    = BRIDGE_TYPE_MV64362,
-                .subsys0        = 0xa2,
-                .subsys1        = 0x8b,
-                .vpd4           = 0x00,
-                .vpd4_mask      = 0x00,
-                .core_speed     = 733*MHz,
-                .mem_size       = 128*MB,
-                .boot_flash     = 2*MB,
-                .user_flash     = 0,
-        },
-        {
-                .model          = BOARD_MODEL_PRPMC2800,
-                .variant        = 'g',
-                .bridge_type    = BRIDGE_TYPE_MV64360,
-                .subsys0        = 0xa2,
-                .subsys1        = 0x8c,
-                .vpd4           = 0x00,
-                .vpd4_mask      = 0x00,
-                .core_speed     = 1*GHz,
-                .mem_size       = 2*GB,
-                .boot_flash     = 2*MB,
-                .user_flash     = 64*MB,
-        },
-        {
-                .model          = BOARD_MODEL_PRPMC2800,
-                .variant        = 'h',
-                .bridge_type    = BRIDGE_TYPE_MV64360,
-                .subsys0        = 0xa2,
-                .subsys1        = 0x8d,
-                .vpd4           = 0x00,
-                .vpd4_mask      = 0x00,
-                .core_speed     = 733*MHz,
-                .mem_size       = 1*GB,
-                .boot_flash     = 2*MB,
-                .user_flash     = 64*MB,
-        },
-};
-
-static struct prpmc2800_board_info *prpmc2800_get_board_info(u8 *vpd)
-{
-        struct prpmc2800_board_info *bip;
-        int i;
-
-        for (i=0,bip=prpmc2800_board_info; i<ARRAY_SIZE(prpmc2800_board_info);
-                        i++,bip++)
-                if ((vpd[0] == bip->subsys0) && (vpd[1] == bip->subsys1)
-                                && ((vpd[4] & bip->vpd4_mask) == bip->vpd4))
-                        return bip;
-
-        return NULL;
-}
-
-/* Get VPD from i2c eeprom 2, then match it to a board info entry */
-static struct prpmc2800_board_info *prpmc2800_get_bip(void)
-{
-        struct prpmc2800_board_info *bip;
-        u8 vpd[5];
-        int rc;
-
-        if (mv64x60_i2c_open())
-                fatal("Error: Can't open i2c device\n\r");
-
-        /* Get VPD from i2c eeprom-2 */
-        memset(vpd, 0, sizeof(vpd));
-        rc = mv64x60_i2c_read(EEPROM2_ADDR, vpd, 0x1fde, 2, sizeof(vpd));
-        if (rc < 0)
-                fatal("Error: Couldn't read eeprom2\n\r");
-        mv64x60_i2c_close();
-
-        /* Get board type & related info */
-        bip = prpmc2800_get_board_info(vpd);
-        if (bip == NULL) {
-                printf("Error: Unsupported board or corrupted VPD:\n\r");
-                printf("  0x%x 0x%x 0x%x 0x%x 0x%x\n\r",
-                                vpd[0], vpd[1], vpd[2], vpd[3], vpd[4]);
-                printf("Using device tree defaults...\n\r");
-        }
-
-        return bip;
-}
-
-static void prpmc2800_bridge_setup(u32 mem_size)
-{
-        u32 i, v[12], enables, acc_bits;
-        u32 pci_base_hi, pci_base_lo, size, buf[2];
-        unsigned long cpu_base;
-        int rc;
-        void *devp;
-        u8 *bridge_pbase, is_coherent;
-        struct mv64x60_cpu2pci_win *tbl;
-
-        bridge_pbase = mv64x60_get_bridge_pbase();
-        is_coherent = mv64x60_is_coherent();
-
-        if (is_coherent)
-                acc_bits = MV64x60_PCI_ACC_CNTL_SNOOP_WB
-                        | MV64x60_PCI_ACC_CNTL_SWAP_NONE
-                        | MV64x60_PCI_ACC_CNTL_MBURST_32_BYTES
-                        | MV64x60_PCI_ACC_CNTL_RDSIZE_32_BYTES;
-        else
-                acc_bits = MV64x60_PCI_ACC_CNTL_SNOOP_NONE
-                        | MV64x60_PCI_ACC_CNTL_SWAP_NONE
-                        | MV64x60_PCI_ACC_CNTL_MBURST_128_BYTES
-                        | MV64x60_PCI_ACC_CNTL_RDSIZE_256_BYTES;
-
-        mv64x60_config_ctlr_windows(bridge_base, bridge_pbase, is_coherent);
-        mv64x60_config_pci_windows(bridge_base, bridge_pbase, 0, 0, mem_size,
-                        acc_bits);
-
-        /* Get the cpu -> pci i/o & mem mappings from the device tree */
-        devp = find_node_by_compatible(NULL, "marvell,mv64360-pci");
-        if (devp == NULL)
-                fatal("Error: Missing marvell,mv64360-pci"
-                                " device tree node\n\r");
-
-        rc = getprop(devp, "ranges", v, sizeof(v));
-        if (rc != sizeof(v))
-                fatal("Error: Can't find marvell,mv64360-pci ranges"
-                                " property\n\r");
-
-        /* Get the cpu -> pci i/o & mem mappings from the device tree */
-        devp = find_node_by_compatible(NULL, "marvell,mv64360");
-        if (devp == NULL)
-                fatal("Error: Missing marvell,mv64360 device tree node\n\r");
-
-        enables = in_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE));
-        enables |= 0x0007fe00; /* Disable all cpu->pci windows */
-        out_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE), enables);
-
-        for (i=0; i<12; i+=6) {
-                switch (v[i] & 0xff000000) {
-                case 0x01000000: /* PCI I/O Space */
-                        tbl = mv64x60_cpu2pci_io;
-                        break;
-                case 0x02000000: /* PCI MEM Space */
-                        tbl = mv64x60_cpu2pci_mem;
-                        break;
-                default:
-                        continue;
-                }
-
-                pci_base_hi = v[i+1];
-                pci_base_lo = v[i+2];
-                cpu_base = v[i+3];
-                size = v[i+5];
-
-                buf[0] = cpu_base;
-                buf[1] = size;
-
-                if (!dt_xlate_addr(devp, buf, sizeof(buf), &cpu_base))
-                        fatal("Error: Can't translate PCI address 0x%x\n\r",
-                                        (u32)cpu_base);
-
-                mv64x60_config_cpu2pci_window(bridge_base, 0, pci_base_hi,
-                                pci_base_lo, cpu_base, size, tbl);
-        }
-
-        enables &= ~0x00000600; /* Enable cpu->pci0 i/o, cpu->pci0 mem0 */
-        out_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE), enables);
-}
-
-static void prpmc2800_fixups(void)
-{
-        u32 v[2], l, mem_size;
-        int rc;
-        void *devp;
-        char model[BOARD_MODEL_MAX];
-        struct prpmc2800_board_info *bip;
-
-        bip = prpmc2800_get_bip(); /* Get board info based on VPD */
-
-        mem_size = (bip) ? bip->mem_size : mv64x60_get_mem_size(bridge_base);
-        prpmc2800_bridge_setup(mem_size); /* Do necessary bridge setup */
-
-        /* If the VPD doesn't match what we know about, just use the
-         * defaults already in the device tree.
-         */
-        if (!bip)
-                return;
-
-        /* Know the board type so override device tree defaults */
-        /* Set /model appropriately */
-        devp = finddevice("/");
-        if (devp == NULL)
-                fatal("Error: Missing '/' device tree node\n\r");
-        memset(model, 0, BOARD_MODEL_MAX);
-        strncpy(model, BOARD_MODEL, BOARD_MODEL_MAX - 2);
-        l = strlen(model);
-        if (bip->model == BOARD_MODEL_PRPMC280)
-                l--;
-        model[l++] = bip->variant;
-        model[l++] = '\0';
-        setprop(devp, "model", model, l);
-
-        /* Set /cpus/PowerPC,7447/clock-frequency */
-        devp = find_node_by_prop_value_str(NULL, "device_type", "cpu");
-        if (devp == NULL)
-                fatal("Error: Missing proper cpu device tree node\n\r");
-        v[0] = bip->core_speed;
-        setprop(devp, "clock-frequency", &v[0], sizeof(v[0]));
-
-        /* Set /memory/reg size */
-        devp = finddevice("/memory");
-        if (devp == NULL)
-                fatal("Error: Missing /memory device tree node\n\r");
-        v[0] = 0;
-        v[1] = bip->mem_size;
-        setprop(devp, "reg", v, sizeof(v));
-
-        /* Update model, if this is a mv64362 */
-        if (bip->bridge_type == BRIDGE_TYPE_MV64362) {
-                devp = find_node_by_compatible(NULL, "marvell,mv64360");
-                if (devp == NULL)
-                        fatal("Error: Missing marvell,mv64360"
-                                        " device tree node\n\r");
-                setprop(devp, "model", "mv64362", strlen("mv64362") + 1);
-        }
-
-        /* Set User FLASH size */
-        devp = find_node_by_compatible(NULL, "direct-mapped");
-        if (devp == NULL)
-                fatal("Error: Missing User FLASH device tree node\n\r");
-        rc = getprop(devp, "reg", v, sizeof(v));
-        if (rc != sizeof(v))
-                fatal("Error: Can't find User FLASH reg property\n\r");
-        v[1] = bip->user_flash;
-        setprop(devp, "reg", v, sizeof(v));
-}
-
-#define MV64x60_MPP_CNTL_0      0xf000
-#define MV64x60_MPP_CNTL_2      0xf008
-#define MV64x60_GPP_IO_CNTL     0xf100
-#define MV64x60_GPP_LEVEL_CNTL  0xf110
-#define MV64x60_GPP_VALUE_SET   0xf118
-
-static void prpmc2800_reset(void)
-{
-        u32 temp;
-
-        udelay(5000000);
-
-        if (bridge_base != 0) {
-                temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_0));
-                temp &= 0xFFFF0FFF;
-                out_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_0), temp);
-
-                temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL));
-                temp |= 0x00000004;
-                out_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL), temp);
-
-                temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL));
-                temp |= 0x00000004;
-                out_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL), temp);
-
-                temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_2));
-                temp &= 0xFFFF0FFF;
-                out_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_2), temp);
-
-                temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL));
-                temp |= 0x00080000;
-                out_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL), temp);
-
-                temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL));
-                temp |= 0x00080000;
-                out_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL), temp);
-
-                out_le32((u32 *)(bridge_base + MV64x60_GPP_VALUE_SET),
-                                0x00080004);
-        }
-
-        for (;;);
-}
-
-#define HEAP_SIZE       (16*MB)
-static struct gunzip_state gzstate;
-
-void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
-                   unsigned long r6, unsigned long r7)
-{
-        struct elf_info ei;
-        char *heap_start, *dtb;
-        int dt_size = _dtb_end - _dtb_start;
-        void *vmlinuz_addr = _vmlinux_start;
-        unsigned long vmlinuz_size = _vmlinux_end - _vmlinux_start;
-        char elfheader[256];
-
-        if (dt_size <= 0) /* No fdt */
-                exit();
-
-        /*
-         * Start heap after end of the kernel (after decompressed to
-         * address 0) or the end of the zImage, whichever is higher.
-         * That's so things allocated by simple_alloc won't overwrite
-         * any part of the zImage and the kernel won't overwrite the dtb
-         * when decompressed & relocated.
-         */
-        gunzip_start(&gzstate, vmlinuz_addr, vmlinuz_size);
-        gunzip_exactly(&gzstate, elfheader, sizeof(elfheader));
-
-        if (!parse_elf32(elfheader, &ei))
-                exit();
-
-        heap_start = (char *)(ei.memsize + ei.elfoffset); /* end of kernel*/
-        heap_start = max(heap_start, (char *)_end); /* end of zImage */
-
-        if ((unsigned)simple_alloc_init(heap_start, HEAP_SIZE, 2*KB, 16)
-                        > (128*MB))
-                exit();
-
-        /* Relocate dtb to safe area past end of zImage & kernel */
-        dtb = malloc(dt_size);
-        if (!dtb)
-                exit();
-        memmove(dtb, _dtb_start, dt_size);
-        fdt_init(dtb);
-
-        bridge_base = mv64x60_get_bridge_base();
-
-        platform_ops.fixups = prpmc2800_fixups;
-        platform_ops.exit = prpmc2800_reset;
-
-        if (serial_console_init() < 0)
-                exit();
-}
-
-/* _zimage_start called very early--need to turn off external interrupts */
-asm ("  .globl _zimage_start\n\
-        _zimage_start:\n\
-                mfmsr   10\n\
-                rlwinm  10,10,0,~(1<<15)        /* Clear MSR_EE */\n\
-                sync\n\
-                mtmsr   10\n\
-                isync\n\
-                b _zimage_start_lib\n\
-");
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 3f50c27ed8f8..ceaa75d5a684 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -63,6 +63,23 @@ usage() {
     exit 1
 }
 
+run_cmd() {
+    if [ "$V" = 1 ]; then
+        $* 2>&1
+    else
+        local msg
+
+        set +e
+        msg=$($* 2>&1)
+
+        if [ $? -ne "0" ]; then
+                echo $msg
+                exit 1
+        fi
+        set -e
+    fi
+}
+
 while [ "$#" -gt 0 ]; do
     case "$1" in
     -o)
@@ -456,12 +473,12 @@ ps3)
 
     ${CROSS}objcopy -O binary "$ofile" "$ofile.bin"
 
-    dd if="$ofile.bin" of="$ofile.bin" conv=notrunc   \
-        skip=$overlay_dest seek=$system_reset_kernel  \
+    run_cmd dd if="$ofile.bin" of="$ofile.bin" conv=notrunc   \
+        skip=$overlay_dest seek=$system_reset_kernel          \
         count=$overlay_size bs=1
 
-    dd if="$ofile.bin" of="$ofile.bin" conv=notrunc   \
-        skip=$system_reset_overlay seek=$overlay_dest \
+    run_cmd dd if="$ofile.bin" of="$ofile.bin" conv=notrunc   \
+        skip=$system_reset_overlay seek=$overlay_dest         \
         count=$overlay_size bs=1
 
     odir="$(dirname "$ofile.bin")"
diff --git a/arch/powerpc/configs/cell_defconfig b/arch/powerpc/configs/cell_defconfig
index 9227b517560a..db328e618bb9 100644
--- a/arch/powerpc/configs/cell_defconfig
+++ b/arch/powerpc/configs/cell_defconfig
@@ -1,5 +1,5 @@
 CONFIG_PPC64=y
-CONFIG_TUNE_CELL=y
+CONFIG_CELL_CPU=y
 CONFIG_ALTIVEC=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=4
diff --git a/arch/powerpc/configs/mpc512x_defconfig b/arch/powerpc/configs/mpc512x_defconfig
index 59b85cb95259..d16d6c5cb282 100644
--- a/arch/powerpc/configs/mpc512x_defconfig
+++ b/arch/powerpc/configs/mpc512x_defconfig
@@ -112,6 +112,7 @@ CONFIG_RTC_DRV_M41T80=y
 CONFIG_RTC_DRV_MPC5121=y
 CONFIG_DMADEVICES=y
 CONFIG_MPC512X_DMA=y
+CONFIG_MPC512x_LPBFIFO=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT2_FS_XIP=y
 CONFIG_EXT3_FS=y
diff --git a/arch/powerpc/configs/ps3_defconfig b/arch/powerpc/configs/ps3_defconfig
index adc14e813a49..c40046074f8b 100644
--- a/arch/powerpc/configs/ps3_defconfig
+++ b/arch/powerpc/configs/ps3_defconfig
@@ -1,5 +1,5 @@
 CONFIG_PPC64=y
-CONFIG_TUNE_CELL=y
+CONFIG_CELL_CPU=y
 CONFIG_ALTIVEC=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=2
@@ -53,7 +53,6 @@ CONFIG_IP_PNP_DHCP=y
 # CONFIG_INET_XFRM_MODE_BEET is not set
 # CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
-CONFIG_IPV6=y
 CONFIG_BT=m
 CONFIG_BT_RFCOMM=m
 CONFIG_BT_RFCOMM_TTY=y
@@ -141,8 +140,6 @@ CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_PS3=y
 # CONFIG_IOMMU_SUPPORT is not set
 CONFIG_EXT2_FS=m
-CONFIG_EXT3_FS=m
-# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT4_FS=y
 CONFIG_QUOTA=y
 CONFIG_QFMT_V2=y
@@ -175,9 +172,7 @@ CONFIG_DEBUG_LOCKDEP=y
 CONFIG_DEBUG_LIST=y
 CONFIG_RCU_CPU_STALL_TIMEOUT=60
 # CONFIG_FTRACE is not set
-CONFIG_CRYPTO_GCM=m
 CONFIG_CRYPTO_PCBC=m
 CONFIG_CRYPTO_MICHAEL_MIC=m
 CONFIG_CRYPTO_SALSA20=m
 CONFIG_CRYPTO_LZO=m
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/powerpc/include/asm/exception-64e.h b/arch/powerpc/include/asm/exception-64e.h
index a8b52b61043f..a703452d67b6 100644
--- a/arch/powerpc/include/asm/exception-64e.h
+++ b/arch/powerpc/include/asm/exception-64e.h
@@ -69,13 +69,14 @@
 #define EX_TLB_ESR      ( 9 * 8) /* Level 0 and 2 only */
 #define EX_TLB_SRR0     (10 * 8)
 #define EX_TLB_SRR1     (11 * 8)
+#define EX_TLB_R7       (12 * 8)
 #ifdef CONFIG_BOOK3E_MMU_TLB_STATS
-#define EX_TLB_R8       (12 * 8)
-#define EX_TLB_R9       (13 * 8)
-#define EX_TLB_LR       (14 * 8)
-#define EX_TLB_SIZE     (15 * 8)
+#define EX_TLB_R8       (13 * 8)
+#define EX_TLB_R9       (14 * 8)
+#define EX_TLB_LR       (15 * 8)
+#define EX_TLB_SIZE     (16 * 8)
 #else
-#define EX_TLB_SIZE     (12 * 8)
+#define EX_TLB_SIZE     (13 * 8)
 #endif
 
 #define START_EXCEPTION(label)                                          \
@@ -204,8 +205,8 @@ exc_##label##_book3e:
 #endif
 
 #define SET_IVOR(vector_number, vector_offset)  \
-        li      r3,vector_offset@l;             \
-        ori     r3,r3,interrupt_base_book3e@l;  \
+        LOAD_REG_ADDR(r3,interrupt_base_book3e);\
+        ori     r3,r3,vector_offset@l;          \
         mtspr   SPRN_IVOR##vector_number,r3;
 
 #endif /* _ASM_POWERPC_EXCEPTION_64E_H */
diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h
index a82f5347540a..ba3342bbdbda 100644
--- a/arch/powerpc/include/asm/mmu-hash64.h
+++ b/arch/powerpc/include/asm/mmu-hash64.h
@@ -14,6 +14,7 @@
 
 #include <asm/asm-compat.h>
 #include <asm/page.h>
+#include <asm/bug.h>
 
 /*
  * This is necessary to get the definition of PGTABLE_RANGE which we
diff --git a/arch/powerpc/include/asm/mpc5121.h b/arch/powerpc/include/asm/mpc5121.h
index 4a69cd1d5041..deaeb0b1f171 100644
--- a/arch/powerpc/include/asm/mpc5121.h
+++ b/arch/powerpc/include/asm/mpc5121.h
@@ -60,4 +60,63 @@ struct mpc512x_lpc {
 
 int mpc512x_cs_config(unsigned int cs, u32 val);
 
+/*
+ * SCLPC Module (LPB FIFO)
+ */
+struct mpc512x_lpbfifo {
+        u32     pkt_size;       /* SCLPC Packet Size Register */
+        u32     start_addr;     /* SCLPC Start Address Register */
+        u32     ctrl;           /* SCLPC Control Register */
+        u32     enable;         /* SCLPC Enable Register */
+        u32     reserved1;
+        u32     status;         /* SCLPC Status Register */
+        u32     bytes_done;     /* SCLPC Bytes Done Register */
+        u32     emb_sc;         /* EMB Share Counter Register */
+        u32     emb_pc;         /* EMB Pause Control Register */
+        u32     reserved2[7];
+        u32     data_word;      /* LPC RX/TX FIFO Data Word Register */
+        u32     fifo_status;    /* LPC RX/TX FIFO Status Register */
+        u32     fifo_ctrl;      /* LPC RX/TX FIFO Control Register */
+        u32     fifo_alarm;     /* LPC RX/TX FIFO Alarm Register */
+};
+
+#define MPC512X_SCLPC_START             (1 << 31)
+#define MPC512X_SCLPC_CS(x)             (((x) & 0x7) << 24)
+#define MPC512X_SCLPC_FLUSH             (1 << 17)
+#define MPC512X_SCLPC_READ              (1 << 16)
+#define MPC512X_SCLPC_DAI               (1 << 8)
+#define MPC512X_SCLPC_BPT(x)            ((x) & 0x3f)
+#define MPC512X_SCLPC_RESET             (1 << 24)
+#define MPC512X_SCLPC_FIFO_RESET        (1 << 16)
+#define MPC512X_SCLPC_ABORT_INT_ENABLE  (1 << 9)
+#define MPC512X_SCLPC_NORM_INT_ENABLE   (1 << 8)
+#define MPC512X_SCLPC_ENABLE            (1 << 0)
+#define MPC512X_SCLPC_SUCCESS           (1 << 24)
+#define MPC512X_SCLPC_FIFO_CTRL(x)      (((x) & 0x7) << 24)
+#define MPC512X_SCLPC_FIFO_ALARM(x)     ((x) & 0x3ff)
+
+enum lpb_dev_portsize {
+        LPB_DEV_PORTSIZE_UNDEFINED = 0,
+        LPB_DEV_PORTSIZE_1_BYTE = 1,
+        LPB_DEV_PORTSIZE_2_BYTES = 2,
+        LPB_DEV_PORTSIZE_4_BYTES = 4,
+        LPB_DEV_PORTSIZE_8_BYTES = 8
+};
+
+enum mpc512x_lpbfifo_req_dir {
+        MPC512X_LPBFIFO_REQ_DIR_READ,
+        MPC512X_LPBFIFO_REQ_DIR_WRITE
+};
+
+struct mpc512x_lpbfifo_request {
+        phys_addr_t dev_phys_addr; /* physical address of some device on LPB */
+        void *ram_virt_addr; /* virtual address of some region in RAM */
+        u32 size;
+        enum lpb_dev_portsize portsize;
+        enum mpc512x_lpbfifo_req_dir dir;
+        void (*callback)(struct mpc512x_lpbfifo_request *);
+};
+
+int mpc512x_lpbfifo_submit(struct mpc512x_lpbfifo_request *req);
+
 #endif /* __ASM_POWERPC_MPC5121_H__ */
diff --git a/arch/powerpc/include/asm/mpc52xx_psc.h b/arch/powerpc/include/asm/mpc52xx_psc.h
index 04c7e8fc24c2..ec995b289280 100644
--- a/arch/powerpc/include/asm/mpc52xx_psc.h
+++ b/arch/powerpc/include/asm/mpc52xx_psc.h
@@ -261,8 +261,6 @@ struct mpc52xx_psc_fifo {
 #define MPC512x_PSC_FIFO_FULL           0x2
 #define MPC512x_PSC_FIFO_ALARM          0x4
 #define MPC512x_PSC_FIFO_URERR          0x8
-#define MPC512x_PSC_FIFO_ORERR          0x01
-#define MPC512x_PSC_FIFO_MEMERROR       0x02
 
 struct mpc512x_psc_fifo {
         u32             reserved1[10];
diff --git a/arch/powerpc/include/asm/msi_bitmap.h b/arch/powerpc/include/asm/msi_bitmap.h
index 97ac3f46ae0d..1ec7125551f1 100644
--- a/arch/powerpc/include/asm/msi_bitmap.h
+++ b/arch/powerpc/include/asm/msi_bitmap.h
@@ -19,6 +19,7 @@ struct msi_bitmap {
         unsigned long           *bitmap;
         spinlock_t              lock;
         unsigned int            irq_count;
+        bool                    bitmap_from_slab;
 };
 
 int msi_bitmap_alloc_hwirqs(struct msi_bitmap *bmp, int num);
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index 71294a6e976e..3140c19c448c 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -12,6 +12,7 @@
 
 #ifndef __ASSEMBLY__
 #include <linux/types.h>
+#include <linux/kernel.h>
 #else
 #include <asm/types.h>
 #endif
@@ -107,12 +108,13 @@ extern long long virt_phys_offset;
 #endif
 
 /* See Description below for VIRT_PHYS_OFFSET */
-#ifdef CONFIG_RELOCATABLE_PPC32
+#if defined(CONFIG_PPC32) && defined(CONFIG_BOOKE)
+#ifdef CONFIG_RELOCATABLE
 #define VIRT_PHYS_OFFSET virt_phys_offset
 #else
 #define VIRT_PHYS_OFFSET (KERNELBASE - PHYSICAL_START)
 #endif
-
+#endif
 
 #ifdef CONFIG_PPC64
 #define MEMORY_START    0UL
@@ -127,9 +129,10 @@ extern long long virt_phys_offset;
 #define pfn_valid(pfn)          ((pfn) >= ARCH_PFN_OFFSET && (pfn) < max_mapnr)
 #endif
 
-#define virt_to_page(kaddr)     pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
+#define virt_to_pfn(kaddr)      (__pa(kaddr) >> PAGE_SHIFT)
+#define virt_to_page(kaddr)     pfn_to_page(virt_to_pfn(kaddr))
 #define pfn_to_kaddr(pfn)       __va((pfn) << PAGE_SHIFT)
-#define virt_addr_valid(kaddr)  pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
+#define virt_addr_valid(kaddr)  pfn_valid(virt_to_pfn(kaddr))
 
 /*
  * On Book-E parts we need __va to parse the device tree and we can't
@@ -204,7 +207,7 @@ extern long long virt_phys_offset;
  * On non-Book-E PPC64 PAGE_OFFSET and MEMORY_START are constants so use
  * the other definitions for __va & __pa.
  */
-#ifdef CONFIG_BOOKE
+#if defined(CONFIG_PPC32) && defined(CONFIG_BOOKE)
 #define __va(x) ((void *)(unsigned long)((phys_addr_t)(x) + VIRT_PHYS_OFFSET))
 #define __pa(x) ((unsigned long)(x) - VIRT_PHYS_OFFSET)
 #else
@@ -240,8 +243,8 @@ extern long long virt_phys_offset;
 #endif
 
 /* align addr on a size boundary - adjust address up/down if needed */
-#define _ALIGN_UP(addr,size)    (((addr)+((size)-1))&(~((size)-1)))
-#define _ALIGN_DOWN(addr,size)  ((addr)&(~((size)-1)))
+#define _ALIGN_UP(addr, size)   __ALIGN_KERNEL(addr, size)
+#define _ALIGN_DOWN(addr, size) ((addr)&(~((typeof(addr))(size)-1)))
 
 /* align addr on a size boundary - adjust address up if needed */
 #define _ALIGN(addr,size)     _ALIGN_UP(addr,size)
@@ -362,6 +365,20 @@ typedef struct { signed long pd; } hugepd_t;
 
 #ifdef CONFIG_HUGETLB_PAGE
 #ifdef CONFIG_PPC_BOOK3S_64
+#ifdef CONFIG_PPC_64K_PAGES
+/*
+ * With 64k page size, we have hugepage ptes in the pgd and pmd entries. We don't
+ * need to setup hugepage directory for them. Our pte and page directory format
+ * enable us to have this enabled. But to avoid errors when implementing new
+ * features disable hugepd for 64K. We enable a debug version here, So we catch
+ * wrong usage.
+ */
+#ifdef CONFIG_DEBUG_VM
+extern int hugepd_ok(hugepd_t hpd);
+#else
+#define hugepd_ok(x)    (0)
+#endif
+#else
 static inline int hugepd_ok(hugepd_t hpd)
 {
         /*
@@ -370,6 +387,7 @@ static inline int hugepd_ok(hugepd_t hpd)
          */
         return (((hpd.pd & 0x3) == 0x0) && ((hpd.pd & HUGEPD_SHIFT_MASK) != 0));
 }
+#endif
 #else
 static inline int hugepd_ok(hugepd_t hpd)
 {
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h
index fa1dfb7f7b48..3245f2d96d4f 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64.h
@@ -437,9 +437,9 @@ static inline char *get_hpte_slot_array(pmd_t *pmdp)
 
 }
 
+#ifdef CONFIG_TRANSPARENT_HUGEPAGE
 extern void hpte_do_hugepage_flush(struct mm_struct *mm, unsigned long addr,
                                    pmd_t *pmdp, unsigned long old_pmd);
-#ifdef CONFIG_TRANSPARENT_HUGEPAGE
 extern pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot);
 extern pmd_t mk_pmd(struct page *page, pgprot_t pgprot);
 extern pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot);
@@ -479,6 +479,14 @@ static inline int pmd_trans_splitting(pmd_t pmd)
 }
 
 extern int has_transparent_hugepage(void);
+#else
+static inline void hpte_do_hugepage_flush(struct mm_struct *mm,
+                                          unsigned long addr, pmd_t *pmdp,
+                                          unsigned long old_pmd)
+{
+
+        WARN(1, "%s called with THP disabled\n", __func__);
+}
 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 
 static inline int pmd_large(pmd_t pmd)
diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h
index 0717693c8428..b64b4212b71f 100644
--- a/arch/powerpc/include/asm/pgtable.h
+++ b/arch/powerpc/include/asm/pgtable.h
@@ -259,15 +259,15 @@ extern int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long addr,
 #define has_transparent_hugepage() 0
 #endif
 pte_t *__find_linux_pte_or_hugepte(pgd_t *pgdir, unsigned long ea,
-                                 unsigned *shift);
+                                   bool *is_thp, unsigned *shift);
 static inline pte_t *find_linux_pte_or_hugepte(pgd_t *pgdir, unsigned long ea,
-                                               unsigned *shift)
+                                               bool *is_thp, unsigned *shift)
 {
         if (!arch_irqs_disabled()) {
                 pr_info("%s called with irq enabled\n", __func__);
                 dump_stack();
         }
-        return __find_linux_pte_or_hugepte(pgdir, ea, shift);
+        return __find_linux_pte_or_hugepte(pgdir, ea, is_thp, shift);
 }
 #endif /* __ASSEMBLY__ */
 
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index 126d0c4f9b7d..c9e26cb264f4 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -370,3 +370,15 @@ COMPAT_SYS(execveat)
 PPC64ONLY(switch_endian)
 SYSCALL_SPU(userfaultfd)
 SYSCALL_SPU(membarrier)
+SYSCALL(semop)
+SYSCALL(semget)
+COMPAT_SYS(semctl)
+COMPAT_SYS(semtimedop)
+COMPAT_SYS(msgsnd)
+COMPAT_SYS(msgrcv)
+SYSCALL(msgget)
+COMPAT_SYS(msgctl)
+COMPAT_SYS(shmat)
+SYSCALL(shmdt)
+SYSCALL(shmget)
+COMPAT_SYS(shmctl)
diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h
index 13411be86041..6d8f8023ac27 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -12,7 +12,7 @@
 #include <uapi/asm/unistd.h>
 
 
-#define __NR_syscalls           366
+#define __NR_syscalls           378
 
 #define __NR__exit __NR_exit
 #define NR_syscalls     __NR_syscalls
diff --git a/arch/powerpc/include/uapi/asm/unistd.h b/arch/powerpc/include/uapi/asm/unistd.h
index 6337738018aa..81579e93c659 100644
--- a/arch/powerpc/include/uapi/asm/unistd.h
+++ b/arch/powerpc/include/uapi/asm/unistd.h
@@ -388,5 +388,17 @@
 #define __NR_switch_endian      363
 #define __NR_userfaultfd        364
 #define __NR_membarrier         365
+#define __NR_semop              366
+#define __NR_semget             367
+#define __NR_semctl             368
+#define __NR_semtimedop         369
+#define __NR_msgsnd             370
+#define __NR_msgrcv             371
+#define __NR_msgget             372
+#define __NR_msgctl             373
+#define __NR_shmat              374
+#define __NR_shmdt              375
+#define __NR_shmget             376
+#define __NR_shmctl             377
 
 #endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c
index 51dbace3269b..2bb252c01f07 100644
--- a/arch/powerpc/kernel/crash.c
+++ b/arch/powerpc/kernel/crash.c
@@ -221,8 +221,8 @@ void crash_kexec_secondary(struct pt_regs *regs)
 #endif  /* CONFIG_SMP */
 
 /* wait for all the CPUs to hit real mode but timeout if they don't come in */
-#if defined(CONFIG_SMP) && defined(CONFIG_PPC_STD_MMU_64)
-static void crash_kexec_wait_realmode(int cpu)
+#if defined(CONFIG_SMP) && defined(CONFIG_PPC64)
+static void __maybe_unused crash_kexec_wait_realmode(int cpu)
 {
         unsigned int msecs;
         int i;
@@ -244,7 +244,7 @@ static void crash_kexec_wait_realmode(int cpu)
 }
 #else
 static inline void crash_kexec_wait_realmode(int cpu) {}
-#endif  /* CONFIG_SMP && CONFIG_PPC_STD_MMU_64 */
+#endif  /* CONFIG_SMP && CONFIG_PPC64 */
 
 /*
  * Register a function to be called on shutdown.  Only use this if you
diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
index e968533e3e05..40e4d4a27663 100644
--- a/arch/powerpc/kernel/eeh.c
+++ b/arch/powerpc/kernel/eeh.c
@@ -351,7 +351,8 @@ static inline unsigned long eeh_token_to_phys(unsigned long token)
          * worried about _PAGE_SPLITTING/collapse. Also we will not hit
          * page table free, because of init_mm.
          */
-        ptep = __find_linux_pte_or_hugepte(init_mm.pgd, token, &hugepage_shift);
+        ptep = __find_linux_pte_or_hugepte(init_mm.pgd, token,
+                                           NULL, &hugepage_shift);
         if (!ptep)
                 return token;
         WARN_ON(hugepage_shift);
@@ -630,7 +631,7 @@ int eeh_pci_enable(struct eeh_pe *pe, int function)
          */
         switch (function) {
         case EEH_OPT_THAW_MMIO:
-                active_flag = EEH_STATE_MMIO_ACTIVE;
+                active_flag = EEH_STATE_MMIO_ACTIVE | EEH_STATE_MMIO_ENABLED;
                 break;
         case EEH_OPT_THAW_DMA:
                 active_flag = EEH_STATE_DMA_ACTIVE;
@@ -1411,8 +1412,7 @@ void eeh_dev_release(struct pci_dev *pdev)
                 goto out;
 
         /* Decrease PE's pass through count */
-        atomic_dec(&edev->pe->pass_dev_cnt);
-        WARN_ON(atomic_read(&edev->pe->pass_dev_cnt) < 0);
+        WARN_ON(atomic_dec_if_positive(&edev->pe->pass_dev_cnt) < 0);
         eeh_pe_change_owner(edev->pe);
 out:
         mutex_unlock(&eeh_dev_mutex);
diff --git a/arch/powerpc/kernel/eeh_driver.c b/arch/powerpc/kernel/eeh_driver.c
index 89eb4bc34d3a..80dfe8965df9 100644
--- a/arch/powerpc/kernel/eeh_driver.c
+++ b/arch/powerpc/kernel/eeh_driver.c
@@ -416,7 +416,10 @@ static void *eeh_rmv_device(void *data, void *userdata)
         driver = eeh_pcid_get(dev);
         if (driver) {
                 eeh_pcid_put(dev);
-                if (driver->err_handler)
+                if (driver->err_handler &&
+                    driver->err_handler->error_detected &&
+                    driver->err_handler->slot_reset &&
+                    driver->err_handler->resume)
                         return NULL;
         }
 
@@ -587,10 +590,16 @@ static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus)
         eeh_ops->configure_bridge(pe);
         eeh_pe_restore_bars(pe);
 
-        /* Clear frozen state */
-        rc = eeh_clear_pe_frozen_state(pe, false);
-        if (rc)
-                return rc;
+        /*
+         * If it's PHB PE, the frozen state on all available PEs should have
+         * been cleared by the PHB reset. Otherwise, we unfreeze the PE and its
+         * child PEs because they might be in frozen state.
+         */
+        if (!(pe->type & EEH_PE_PHB)) {
+                rc = eeh_clear_pe_frozen_state(pe, false);
+                if (rc)
+                        return rc;
+        }
 
         /* Give the system 5 seconds to finish running the user-space
          * hotplug shutdown scripts, e.g. ifdown for ethernet.  Yes,
@@ -655,9 +664,17 @@ static void eeh_handle_normal_event(struct eeh_pe *pe)
          * to accomplish the reset.  Each child gets a report of the
          * status ... if any child can't handle the reset, then the entire
          * slot is dlpar removed and added.
+         *
+         * When the PHB is fenced, we have to issue a reset to recover from
+         * the error. Override the result if necessary to have partially
+         * hotplug for this case.
          */
         pr_info("EEH: Notify device drivers to shutdown\n");
         eeh_pe_dev_traverse(pe, eeh_report_error, &result);
+        if ((pe->type & EEH_PE_PHB) &&
+            result != PCI_ERS_RESULT_NONE &&
+            result != PCI_ERS_RESULT_NEED_RESET)
+                result = PCI_ERS_RESULT_NEED_RESET;
 
         /* Get the current PCI slot state. This can take a long time,
          * sometimes over 300 seconds for certain systems.
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index f3bd5e747ed8..488e6314f993 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -542,8 +542,8 @@ interrupt_base_book3e:					/* fake trap */
         EXCEPTION_STUB(0x320, ehpriv)
         EXCEPTION_STUB(0x340, lrat_error)
 
-        .globl interrupt_end_book3e
-interrupt_end_book3e:
+        .globl __end_interrupts
+__end_interrupts:
 
 /* Critical Input Interrupt */
         START_EXCEPTION(critical_input);
@@ -736,7 +736,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
         beq+    1f
 
         LOAD_REG_IMMEDIATE(r14,interrupt_base_book3e)
-        LOAD_REG_IMMEDIATE(r15,interrupt_end_book3e)
+        LOAD_REG_IMMEDIATE(r15,__end_interrupts)
         cmpld   cr0,r10,r14
         cmpld   cr1,r10,r15
         blt+    cr0,1f
@@ -800,7 +800,7 @@ kernel_dbg_exc:
         beq+    1f
 
         LOAD_REG_IMMEDIATE(r14,interrupt_base_book3e)
-        LOAD_REG_IMMEDIATE(r15,interrupt_end_book3e)
+        LOAD_REG_IMMEDIATE(r15,__end_interrupts)
         cmpld   cr0,r10,r14
         cmpld   cr1,r10,r15
         blt+    cr0,1f
@@ -1351,7 +1351,10 @@ skpinv:	addi	r6,r6,1				/* Increment */
  * r4 = MAS0 w/TLBSEL & ESEL for the temp mapping
  */
         /* Now we branch the new virtual address mapped by this entry */
-        LOAD_REG_IMMEDIATE(r6,2f)
+        bl      1f              /* Find our address */
+1:      mflr    r6
+        addi    r6,r6,(2f - 1b)
+        tovirt(r6,r6)
         lis     r7,MSR_KERNEL@h
         ori     r7,r7,MSR_KERNEL@l
         mtspr   SPRN_SRR0,r6
@@ -1583,9 +1586,11 @@ _GLOBAL(book3e_secondary_thread_init)
         mflr    r28
         b       3b
 
+        .globl init_core_book3e
 init_core_book3e:
         /* Establish the interrupt vector base */
-        LOAD_REG_IMMEDIATE(r3, interrupt_base_book3e)
+        tovirt(r2,r2)
+        LOAD_REG_ADDR(r3, interrupt_base_book3e)
         mtspr   SPRN_IVPR,r3
         sync
         blr
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index d48125d0c048..1b779560728f 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -182,6 +182,8 @@ exception_marker:
 
 #ifdef CONFIG_PPC_BOOK3E
 _GLOBAL(fsl_secondary_thread_init)
+        mfspr   r4,SPRN_BUCSR
+
         /* Enable branch prediction */
         lis     r3,BUCSR_INIT@h
         ori     r3,r3,BUCSR_INIT@l
@@ -196,10 +198,24 @@ _GLOBAL(fsl_secondary_thread_init)
          * number.  There are two threads per core, so shift everything
          * but the low bit right by two bits so that the cpu numbering is
          * continuous.
+         *
+         * If the old value of BUCSR is non-zero, this thread has run
+         * before.  Thus, we assume we are coming from kexec or a similar
+         * scenario, and PIR is already set to the correct value.  This
+         * is a bit of a hack, but there are limited opportunities for
+         * getting information into the thread and the alternatives
+         * seemed like they'd be overkill.  We can't tell just by looking
+         * at the old PIR value which state it's in, since the same value
+         * could be valid for one thread out of reset and for a different
+         * thread in Linux.
          */
+
         mfspr   r3, SPRN_PIR
+        cmpwi   r4,0
+        bne     1f
         rlwimi  r3, r3, 30, 2, 30
         mtspr   SPRN_PIR, r3
+1:
 #endif
 
 _GLOBAL(generic_secondary_thread_init)
@@ -441,12 +457,22 @@ __after_prom_start:
         /* process relocations for the final address of the kernel */
         lis     r25,PAGE_OFFSET@highest /* compute virtual base of kernel */
         sldi    r25,r25,32
+#if defined(CONFIG_PPC_BOOK3E)
+        tovirt(r26,r26)         /* on booke, we already run at PAGE_OFFSET */
+#endif
         lwz     r7,__run_at_load-_stext(r26)
+#if defined(CONFIG_PPC_BOOK3E)
+        tophys(r26,r26)
+#endif
         cmplwi  cr0,r7,1        /* flagged to stay where we are ? */
         bne     1f
         add     r25,r25,r26
 1:      mr      r3,r25
         bl      relocate
+#if defined(CONFIG_PPC_BOOK3E)
+        /* IVPR needs to be set after relocation. */
+        bl      init_core_book3e
+#endif
 #endif
 
 /*
@@ -458,15 +484,15 @@ __after_prom_start:
  */
         li      r3,0                    /* target addr */
 #ifdef CONFIG_PPC_BOOK3E
-        tovirt(r3,r3)                   /* on booke, we already run at PAGE_OFFSET */
+        tovirt(r3,r3)           /* on booke, we already run at PAGE_OFFSET */
 #endif
         mr.     r4,r26                  /* In some cases the loader may  */
+#if defined(CONFIG_PPC_BOOK3E)
+        tovirt(r4,r4)
+#endif
         beq     9f                      /* have already put us at zero */
         li      r6,0x100                /* Start offset, the first 0x100 */
                                         /* bytes were copied earlier.    */
-#ifdef CONFIG_PPC_BOOK3E
-        tovirt(r6,r6)                   /* on booke, we already run at PAGE_OFFSET */
-#endif
 
 #ifdef CONFIG_RELOCATABLE
 /*
@@ -474,12 +500,21 @@ __after_prom_start:
  * variable __run_at_load, if it is set the kernel is treated as relocatable
  * kernel, otherwise it will be moved to PHYSICAL_START
  */
+#if defined(CONFIG_PPC_BOOK3E)
+        tovirt(r26,r26)         /* on booke, we already run at PAGE_OFFSET */
+#endif
         lwz     r7,__run_at_load-_stext(r26)
         cmplwi  cr0,r7,1
         bne     3f
 
+#ifdef CONFIG_PPC_BOOK3E
+        LOAD_REG_ADDR(r5, __end_interrupts)
+        LOAD_REG_ADDR(r11, _stext)
+        sub     r5,r5,r11
+#else
         /* just copy interrupts */
         LOAD_REG_IMMEDIATE(r5, __end_interrupts - _stext)
+#endif
         b       5f
 3:
 #endif
diff --git a/arch/powerpc/kernel/io-workarounds.c b/arch/powerpc/kernel/io-workarounds.c
index 63d9cc4d7366..5f8613ceb97f 100644
--- a/arch/powerpc/kernel/io-workarounds.c
+++ b/arch/powerpc/kernel/io-workarounds.c
@@ -76,7 +76,7 @@ struct iowa_bus *iowa_mem_find_bus(const PCI_IO_ADDR addr)
                  * a page table free due to init_mm
                  */
                 ptep = __find_linux_pte_or_hugepte(init_mm.pgd, vaddr,
-                                                 &hugepage_shift);
+                                                   NULL, &hugepage_shift);
                 if (ptep == NULL)
                         paddr = 0;
                 else {
diff --git a/arch/powerpc/kernel/machine_kexec_64.c b/arch/powerpc/kernel/machine_kexec_64.c
index 1a74446fd9e5..0fbd75d185d7 100644
--- a/arch/powerpc/kernel/machine_kexec_64.c
+++ b/arch/powerpc/kernel/machine_kexec_64.c
@@ -30,6 +30,21 @@
 #include <asm/smp.h>
 #include <asm/hw_breakpoint.h>
 
+#ifdef CONFIG_PPC_BOOK3E
+int default_machine_kexec_prepare(struct kimage *image)
+{
+        int i;
+        /*
+         * Since we use the kernel fault handlers and paging code to
+         * handle the virtual mode, we must make sure no destination
+         * overlaps kernel static data or bss.
+         */
+        for (i = 0; i < image->nr_segments; i++)
+                if (image->segment[i].mem < __pa(_end))
+                        return -ETXTBSY;
+        return 0;
+}
+#else
 int default_machine_kexec_prepare(struct kimage *image)
 {
         int i;
@@ -95,6 +110,7 @@ int default_machine_kexec_prepare(struct kimage *image)
 
         return 0;
 }
+#endif /* !CONFIG_PPC_BOOK3E */
 
 static void copy_segments(unsigned long ind)
 {
@@ -365,6 +381,7 @@ void default_machine_kexec(struct kimage *image)
         /* NOTREACHED */
 }
 
+#ifndef CONFIG_PPC_BOOK3E
 /* Values we need to export to the second kernel via the device tree. */
 static unsigned long htab_base;
 static unsigned long htab_size;
@@ -411,3 +428,4 @@ static int __init export_htab_values(void)
         return 0;
 }
 late_initcall(export_htab_values);
+#endif /* !CONFIG_PPC_BOOK3E */
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index 6e4168cf4698..db475d41b57a 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -26,6 +26,7 @@
 #include <asm/thread_info.h>
 #include <asm/kexec.h>
 #include <asm/ptrace.h>
+#include <asm/mmu.h>
 
         .text
 
@@ -484,6 +485,8 @@ _GLOBAL(kexec_wait)
         mtsrr1  r11
         rfid
 #else
+        /* Create TLB entry in book3e_secondary_core_init */
+        li      r4,0
         ba      0x60
 #endif
 #endif
@@ -496,6 +499,51 @@ kexec_flag:
 
 
 #ifdef CONFIG_KEXEC
+#ifdef CONFIG_PPC_BOOK3E
+/*
+ * BOOK3E has no real MMU mode, so we have to setup the initial TLB
+ * for a core to identity map v:0 to p:0.  This current implementation
+ * assumes that 1G is enough for kexec.
+ */
+kexec_create_tlb:
+        /*
+         * Invalidate all non-IPROT TLB entries to avoid any TLB conflict.
+         * IPROT TLB entries should be >= PAGE_OFFSET and thus not conflict.
+         */
+        PPC_TLBILX_ALL(0,R0)
+        sync
+        isync
+
+        mfspr   r10,SPRN_TLB1CFG
+        andi.   r10,r10,TLBnCFG_N_ENTRY /* Extract # entries */
+        subi    r10,r10,1       /* Last entry: no conflict with kernel text */
+        lis     r9,MAS0_TLBSEL(1)@h
+        rlwimi  r9,r10,16,4,15          /* Setup MAS0 = TLBSEL | ESEL(r9) */
+
+/* Set up a temp identity mapping v:0 to p:0 and return to it. */
+#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
+#define M_IF_NEEDED     MAS2_M
+#else
+#define M_IF_NEEDED     0
+#endif
+        mtspr   SPRN_MAS0,r9
+
+        lis     r9,(MAS1_VALID|MAS1_IPROT)@h
+        ori     r9,r9,(MAS1_TSIZE(BOOK3E_PAGESZ_1GB))@l
+        mtspr   SPRN_MAS1,r9
+
+        LOAD_REG_IMMEDIATE(r9, 0x0 | M_IF_NEEDED)
+        mtspr   SPRN_MAS2,r9
+
+        LOAD_REG_IMMEDIATE(r9, 0x0 | MAS3_SR | MAS3_SW | MAS3_SX)
+        mtspr   SPRN_MAS3,r9
+        li      r9,0
+        mtspr   SPRN_MAS7,r9
+
+        tlbwe
+        isync
+        blr
+#endif
 
 /* kexec_smp_wait(void)
  *
@@ -525,6 +573,10 @@ _GLOBAL(kexec_smp_wait)
  * don't overwrite r3 here, it is live for kexec_wait above.
  */
 real_mode:      /* assume normal blr return */
+#ifdef CONFIG_PPC_BOOK3E
+        /* Create an identity mapping. */
+        b       kexec_create_tlb
+#else
 1:      li      r9,MSR_RI
         li      r10,MSR_DR|MSR_IR
         mflr    r11             /* return address to SRR0 */
@@ -536,7 +588,7 @@ real_mode:	/* assume normal blr return */
         mtspr   SPRN_SRR1,r10
         mtspr   SPRN_SRR0,r11
         rfid
-
+#endif
 
 /*
  * kexec_sequence(newstack, start, image, control, clear_all())
@@ -579,9 +631,13 @@ _GLOBAL(kexec_sequence)
         lhz     r25,PACAHWCPUID(r13)    /* get our phys cpu from paca */
 
         /* disable interrupts, we are overwriting kernel data next */
+#ifdef CONFIG_PPC_BOOK3E
+        wrteei  0
+#else
         mfmsr   r3
         rlwinm  r3,r3,0,17,15
         mtmsrd  r3,1
+#endif
 
         /* copy dest pages, flush whole dest image */
         mr      r3,r29
@@ -603,6 +659,7 @@ _GLOBAL(kexec_sequence)
         li      r6,1
         stw     r6,kexec_flag-1b(5)
 
+#ifndef CONFIG_PPC_BOOK3E
         /* clear out hardware hash page table and tlb */
 #if !defined(_CALL_ELF) || _CALL_ELF != 2
         ld      r12,0(r27)              /* deref function descriptor */
@@ -611,6 +668,7 @@ _GLOBAL(kexec_sequence)
 #endif
         mtctr   r12
         bctrl                           /* ppc_md.hpte_clear_all(void); */
+#endif /* !CONFIG_PPC_BOOK3E */
 
 /*
  *   kexec image calling is:
diff --git a/arch/powerpc/kernel/nvram_64.c b/arch/powerpc/kernel/nvram_64.c
index 98ba106a59ef..32e26526f7e4 100644
--- a/arch/powerpc/kernel/nvram_64.c
+++ b/arch/powerpc/kernel/nvram_64.c
@@ -1065,7 +1065,7 @@ loff_t __init nvram_create_partition(const char *name, int sig,
         /* Create our OS partition */
         new_part = kmalloc(sizeof(*new_part), GFP_KERNEL);
         if (!new_part) {
-                pr_err("nvram_create_os_partition: kmalloc failed\n");
+                pr_err("%s: kmalloc failed\n", __func__);
                 return -ENOMEM;
         }
 
@@ -1077,8 +1077,8 @@ loff_t __init nvram_create_partition(const char *name, int sig,
 
         rc = nvram_write_header(new_part);
         if (rc <= 0) {
-                pr_err("nvram_create_os_partition: nvram_write_header "
-                       "failed (%d)\n", rc);
+                pr_err("%s: nvram_write_header failed (%d)\n", __func__, rc);
+                kfree(new_part);
                 return rc;
         }
         list_add_tail(&new_part->partition, &free_part->partition);
@@ -1090,8 +1090,8 @@ loff_t __init nvram_create_partition(const char *name, int sig,
                 free_part->header.checksum = nvram_checksum(&free_part->header);
                 rc = nvram_write_header(free_part);
                 if (rc <= 0) {
-                        pr_err("nvram_create_os_partition: nvram_write_header "
-                               "failed (%d)\n", rc);
+                        pr_err("%s: nvram_write_header failed (%d)\n",
+                               __func__, rc);
                         return rc;
                 }
         } else {
@@ -1105,11 +1105,12 @@ loff_t __init nvram_create_partition(const char *name, int sig,
              tmp_index += NVRAM_BLOCK_LEN) {
                 rc = ppc_md.nvram_write(nv_init_vals, NVRAM_BLOCK_LEN, &tmp_index);
                 if (rc <= 0) {
-                        pr_err("nvram_create_partition: nvram_write failed (%d)\n", rc);
+                        pr_err("%s: nvram_write failed (%d)\n",
+                               __func__, rc);
                         return rc;
                 }
         }
-        
+
         return new_part->index + NVRAM_HEADER_LEN;
 }
 
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c
index 5a23b69f8129..01ea0edf0579 100644
--- a/arch/powerpc/kernel/paca.c
+++ b/arch/powerpc/kernel/paca.c
@@ -204,14 +204,19 @@ static int __initdata paca_size;
 
 void __init allocate_pacas(void)
 {
-        int cpu, limit;
+        u64 limit;
+        int cpu;
 
+        limit = ppc64_rma_size;
+
+#ifdef CONFIG_PPC_BOOK3S_64
         /*
          * We can't take SLB misses on the paca, and we want to access them
          * in real mode, so allocate them within the RMA and also within
          * the first segment.
          */
-        limit = min(0x10000000ULL, ppc64_rma_size);
+        limit = min(0x10000000ULL, limit);
+#endif
 
         paca_size = PAGE_ALIGN(sizeof(struct paca_struct) * nr_cpu_ids);
 
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 7587b2ae5f77..0f7a60f1e9f6 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -100,6 +100,7 @@ void pcibios_free_controller(struct pci_controller *phb)
         if (phb->is_dynamic)
                 kfree(phb);
 }
+EXPORT_SYMBOL_GPL(pcibios_free_controller);
 
 /*
  * The function is used to return the minimal alignment
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index bef76c5033e4..7030b035905d 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -783,17 +783,19 @@ void __init early_get_first_memblock_info(void *params, phys_addr_t *size)
 int of_get_ibm_chip_id(struct device_node *np)
 {
         of_node_get(np);
-        while(np) {
-                struct device_node *old = np;
-                const __be32 *prop;
+        while (np) {
+                u32 chip_id;
 
-                prop = of_get_property(np, "ibm,chip-id", NULL);
-                if (prop) {
+                /*
+                 * Skiboot may produce memory nodes that contain more than one
+                 * cell in chip-id, we only read the first one here.
+                 */
+                if (!of_property_read_u32(np, "ibm,chip-id", &chip_id)) {
                         of_node_put(np);
-                        return be32_to_cpup(prop);
+                        return chip_id;
                 }
-                np = of_get_parent(np);
-                of_node_put(old);
+
+                np = of_get_next_parent(np);
         }
         return -1;
 }
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index bdcbb716f4d6..5c03a6a9b054 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -108,6 +108,14 @@ static void setup_tlb_core_data(void)
         for_each_possible_cpu(cpu) {
                 int first = cpu_first_thread_sibling(cpu);
 
+                /*
+                 * If we boot via kdump on a non-primary thread,
+                 * make sure we point at the thread that actually
+                 * set up this TLB.
+                 */
+                if (cpu_first_thread_sibling(boot_cpuid) == first)
+                        first = boot_cpuid;
+
                 paca[cpu].tcd_ptr = &paca[first].tcd;
 
                 /*
@@ -332,11 +340,26 @@ void early_setup_secondary(void)
 #endif /* CONFIG_SMP */
 
 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
+static bool use_spinloop(void)
+{
+        if (!IS_ENABLED(CONFIG_PPC_BOOK3E))
+                return true;
+
+        /*
+         * When book3e boots from kexec, the ePAPR spin table does
+         * not get used.
+         */
+        return of_property_read_bool(of_chosen, "linux,booted-from-kexec");
+}
+
 void smp_release_cpus(void)
 {
         unsigned long *ptr;
         int i;
 
+        if (!use_spinloop())
+                return;
+
         DBG(" -> smp_release_cpus()\n");
 
         /* All secondary cpus are spinning on a common spinloop, release them
@@ -516,7 +539,7 @@ void __init setup_system(void)
          * Freescale Book3e parts spin in a loop provided by firmware,
          * so smp_release_cpus() does nothing for them
          */
-#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_FSL_BOOK3E)
+#if defined(CONFIG_SMP)
         /* Release secondary cpus out of their spinloops at 0x60 now that
          * we can map physical -> logical CPU ids
          */
diff --git a/arch/powerpc/kernel/vdso32/Makefile b/arch/powerpc/kernel/vdso32/Makefile
index 53e6c9b979ec..6abffb7a8cd9 100644
--- a/arch/powerpc/kernel/vdso32/Makefile
+++ b/arch/powerpc/kernel/vdso32/Makefile
@@ -18,7 +18,7 @@ GCOV_PROFILE := n
 
 ccflags-y := -shared -fno-common -fno-builtin
 ccflags-y += -nostdlib -Wl,-soname=linux-vdso32.so.1 \
-                $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)
+                $(call cc-ldoption, -Wl$(comma)--hash-style=both)
 asflags-y := -D__VDSO32__ -s
 
 obj-y += vdso32_wrapper.o
diff --git a/arch/powerpc/kernel/vdso32/datapage.S b/arch/powerpc/kernel/vdso32/datapage.S
index dc21e891d2e7..59cf5f452879 100644
--- a/arch/powerpc/kernel/vdso32/datapage.S
+++ b/arch/powerpc/kernel/vdso32/datapage.S
@@ -16,6 +16,10 @@
 #include <asm/vdso.h>
 
         .text
+        .global __kernel_datapage_offset;
+__kernel_datapage_offset:
+        .long   0
+
 V_FUNCTION_BEGIN(__get_datapage)
   .cfi_startproc
         /* We don't want that exposed or overridable as we want other objects
@@ -27,13 +31,11 @@ V_FUNCTION_BEGIN(__get_datapage)
         mflr    r0
   .cfi_register lr,r0
 
-        bcl     20,31,1f
-        .global __kernel_datapage_offset;
-__kernel_datapage_offset:
-        .long   0
-1:
+        bcl     20,31,data_page_branch
+data_page_branch:
         mflr    r3
         mtlr    r0
+        addi    r3, r3, __kernel_datapage_offset-data_page_branch
         lwz     r0,0(r3)
         add     r3,r0,r3
         blr
diff --git a/arch/powerpc/kernel/vdso64/Makefile b/arch/powerpc/kernel/vdso64/Makefile
index effca9404b17..8c8f2ae43935 100644
--- a/arch/powerpc/kernel/vdso64/Makefile
+++ b/arch/powerpc/kernel/vdso64/Makefile
@@ -11,7 +11,7 @@ GCOV_PROFILE := n
 
 ccflags-y := -shared -fno-common -fno-builtin
 ccflags-y += -nostdlib -Wl,-soname=linux-vdso64.so.1 \
-                $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)
+                $(call cc-ldoption, -Wl$(comma)--hash-style=both)
 asflags-y := -D__VDSO64__ -s
 
 obj-y += vdso64_wrapper.o
diff --git a/arch/powerpc/kernel/vdso64/datapage.S b/arch/powerpc/kernel/vdso64/datapage.S
index 79796de11737..2f01c4a0d8a0 100644
--- a/arch/powerpc/kernel/vdso64/datapage.S
+++ b/arch/powerpc/kernel/vdso64/datapage.S
@@ -16,6 +16,10 @@
 #include <asm/vdso.h>
 
         .text
+.global __kernel_datapage_offset;
+__kernel_datapage_offset:
+        .long   0
+
 V_FUNCTION_BEGIN(__get_datapage)
   .cfi_startproc
         /* We don't want that exposed or overridable as we want other objects
@@ -27,13 +31,11 @@ V_FUNCTION_BEGIN(__get_datapage)
         mflr    r0
   .cfi_register lr,r0
 
-        bcl     20,31,1f
-        .global __kernel_datapage_offset;
-__kernel_datapage_offset:
-        .long   0
-1:
+        bcl     20,31,data_page_branch
+data_page_branch:
         mflr    r3
         mtlr    r0
+        addi    r3, r3, __kernel_datapage_offset-data_page_branch
         lwz     r0,0(r3)
         add     r3,r0,r3
         blr
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 1db685104ffc..d41fd0af8980 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -183,6 +183,12 @@ SECTIONS
                 *(.rela*)
         }
 #endif
+        /* .exit.data is discarded at runtime, not link time,
+         * to deal with references from .exit.text
+         */
+        .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
+                EXIT_DATA
+        }
 
         /* freed after init ends here */
         . = ALIGN(PAGE_SIZE);
diff --git a/arch/powerpc/kvm/book3s_64_mmu_hv.c b/arch/powerpc/kvm/book3s_64_mmu_hv.c
index 10722b1e38b5..fb37290a57b4 100644
--- a/arch/powerpc/kvm/book3s_64_mmu_hv.c
+++ b/arch/powerpc/kvm/book3s_64_mmu_hv.c
@@ -544,7 +544,7 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu,
                          */
                         local_irq_save(flags);
                         ptep = find_linux_pte_or_hugepte(current->mm->pgd,
-                                                         hva, NULL);
+                                                         hva, NULL, NULL);
                         if (ptep) {
                                 pte = kvmppc_read_update_linux_pte(ptep, 1);
                                 if (pte_write(pte))
diff --git a/arch/powerpc/kvm/book3s_hv_rm_mmu.c b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
index 97e7f8c853d8..91700518bbf3 100644
--- a/arch/powerpc/kvm/book3s_hv_rm_mmu.c
+++ b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
@@ -32,7 +32,7 @@ static void *real_vmalloc_addr(void *x)
          * So don't worry about THP collapse/split. Called
          * Only in realmode, hence won't need irq_save/restore.
          */
-        p = __find_linux_pte_or_hugepte(swapper_pg_dir, addr, NULL);
+        p = __find_linux_pte_or_hugepte(swapper_pg_dir, addr, NULL, NULL);
         if (!p || !pte_present(*p))
                 return NULL;
         addr = (pte_pfn(*p) << PAGE_SHIFT) | (addr & ~PAGE_MASK);
@@ -221,10 +221,12 @@ long kvmppc_do_h_enter(struct kvm *kvm, unsigned long flags,
          * retry via mmu_notifier_retry.
          */
         if (realmode)
-                ptep = __find_linux_pte_or_hugepte(pgdir, hva, &hpage_shift);
+                ptep = __find_linux_pte_or_hugepte(pgdir, hva, NULL,
+                                                   &hpage_shift);
         else {
                 local_irq_save(irq_flags);
-                ptep = find_linux_pte_or_hugepte(pgdir, hva, &hpage_shift);
+                ptep = find_linux_pte_or_hugepte(pgdir, hva, NULL,
+                                                 &hpage_shift);
         }
         if (ptep) {
                 pte_t pte;
diff --git a/arch/powerpc/kvm/e500_mmu_host.c b/arch/powerpc/kvm/e500_mmu_host.c
index 5e2102c19586..34c43fff4adb 100644
--- a/arch/powerpc/kvm/e500_mmu_host.c
+++ b/arch/powerpc/kvm/e500_mmu_host.c
@@ -476,7 +476,7 @@ static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
          * can't run hence pfn won't change.
          */
         local_irq_save(flags);
-        ptep = find_linux_pte_or_hugepte(pgdir, hva, NULL);
+        ptep = find_linux_pte_or_hugepte(pgdir, hva, NULL, NULL);
         if (ptep) {
                 pte_t pte = READ_ONCE(*ptep);
 
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c
index 354ba3c09ef3..f3afe3d97f6b 100644
--- a/arch/powerpc/mm/fsl_booke_mmu.c
+++ b/arch/powerpc/mm/fsl_booke_mmu.c
@@ -141,8 +141,6 @@ static void settlbcam(int index, unsigned long virt, phys_addr_t phys,
         tlbcam_addrs[index].start = virt;
         tlbcam_addrs[index].limit = virt + size - 1;
         tlbcam_addrs[index].phys = phys;
-
-        loadcam_entry(index);
 }
 
 unsigned long calc_cam_sz(unsigned long ram, unsigned long virt,
@@ -171,7 +169,8 @@ unsigned long calc_cam_sz(unsigned long ram, unsigned long virt,
 }
 
 static unsigned long map_mem_in_cams_addr(phys_addr_t phys, unsigned long virt,
-                                        unsigned long ram, int max_cam_idx)
+                                        unsigned long ram, int max_cam_idx,
+                                        bool dryrun)
 {
         int i;
         unsigned long amount_mapped = 0;
@@ -181,13 +180,20 @@ static unsigned long map_mem_in_cams_addr(phys_addr_t phys, unsigned long virt,
                 unsigned long cam_sz;
 
                 cam_sz = calc_cam_sz(ram, virt, phys);
-                settlbcam(i, virt, phys, cam_sz, pgprot_val(PAGE_KERNEL_X), 0);
+                if (!dryrun)
+                        settlbcam(i, virt, phys, cam_sz,
+                                  pgprot_val(PAGE_KERNEL_X), 0);
 
                 ram -= cam_sz;
                 amount_mapped += cam_sz;
                 virt += cam_sz;
                 phys += cam_sz;
         }
+
+        if (dryrun)
+                return amount_mapped;
+
+        loadcam_multi(0, i, max_cam_idx);
         tlbcam_index = i;
 
 #ifdef CONFIG_PPC64
@@ -199,12 +205,12 @@ static unsigned long map_mem_in_cams_addr(phys_addr_t phys, unsigned long virt,
         return amount_mapped;
 }
 
-unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx)
+unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx, bool dryrun)
 {
         unsigned long virt = PAGE_OFFSET;
         phys_addr_t phys = memstart_addr;
 
-        return map_mem_in_cams_addr(phys, virt, ram, max_cam_idx);
+        return map_mem_in_cams_addr(phys, virt, ram, max_cam_idx, dryrun);
 }
 
 #ifdef CONFIG_PPC32
@@ -235,7 +241,7 @@ void __init adjust_total_lowmem(void)
         ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem);
 
         i = switch_to_as1();
-        __max_low_memory = map_mem_in_cams(ram, CONFIG_LOWMEM_CAM_NUM);
+        __max_low_memory = map_mem_in_cams(ram, CONFIG_LOWMEM_CAM_NUM, false);
         restore_to_as0(i, 0, 0, 1);
 
         pr_info("Memory CAM mapping: ");
@@ -303,10 +309,12 @@ notrace void __init relocate_init(u64 dt_ptr, phys_addr_t start)
                 n = switch_to_as1();
                 /* map a 64M area for the second relocation */
                 if (memstart_addr > start)
-                        map_mem_in_cams(0x4000000, CONFIG_LOWMEM_CAM_NUM);
+                        map_mem_in_cams(0x4000000, CONFIG_LOWMEM_CAM_NUM,
+                                        false);
                 else
                         map_mem_in_cams_addr(start, PAGE_OFFSET + offset,
-                                        0x4000000, CONFIG_LOWMEM_CAM_NUM);
+                                        0x4000000, CONFIG_LOWMEM_CAM_NUM,
+                                        false);
                 restore_to_as0(n, offset, __va(dt_ptr), 1);
                 /* We should never reach here */
                 panic("Relocation error");
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index aee70171355b..7f9616f7c479 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -994,6 +994,7 @@ int hash_page_mm(struct mm_struct *mm, unsigned long ea,
                  unsigned long access, unsigned long trap,
                  unsigned long flags)
 {
+        bool is_thp;
         enum ctx_state prev_state = exception_enter();
         pgd_t *pgdir;
         unsigned long vsid;
@@ -1068,7 +1069,7 @@ int hash_page_mm(struct mm_struct *mm, unsigned long ea,
 #endif /* CONFIG_PPC_64K_PAGES */
 
         /* Get PTE and page size from page tables */
-        ptep = __find_linux_pte_or_hugepte(pgdir, ea, &hugeshift);
+        ptep = __find_linux_pte_or_hugepte(pgdir, ea, &is_thp, &hugeshift);
         if (ptep == NULL || !pte_present(*ptep)) {
                 DBG_LOW(" no PTE !\n");
                 rc = 1;
@@ -1088,7 +1089,7 @@ int hash_page_mm(struct mm_struct *mm, unsigned long ea,
         }
 
         if (hugeshift) {
-                if (pmd_trans_huge(*(pmd_t *)ptep))
+                if (is_thp)
                         rc = __hash_page_thp(ea, access, vsid, (pmd_t *)ptep,
                                              trap, flags, ssize, psize);
 #ifdef CONFIG_HUGETLB_PAGE
@@ -1243,7 +1244,7 @@ void hash_preload(struct mm_struct *mm, unsigned long ea,
          * THP pages use update_mmu_cache_pmd. We don't do
          * hash preload there. Hence can ignore THP here
          */
-        ptep = find_linux_pte_or_hugepte(pgdir, ea, &hugepage_shift);
+        ptep = find_linux_pte_or_hugepte(pgdir, ea, NULL, &hugepage_shift);
         if (!ptep)
                 goto out_exit;
 
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index 06c14523b787..9833fee493ec 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -89,6 +89,25 @@ int pgd_huge(pgd_t pgd)
          */
         return ((pgd_val(pgd) & 0x3) != 0x0);
 }
+
+#if defined(CONFIG_PPC_64K_PAGES) && defined(CONFIG_DEBUG_VM)
+/*
+ * This enables us to catch the wrong page directory format
+ * Moved here so that we can use WARN() in the call.
+ */
+int hugepd_ok(hugepd_t hpd)
+{
+        bool is_hugepd;
+
+        /*
+         * We should not find this format in page directory, warn otherwise.
+         */
+        is_hugepd = (((hpd.pd & 0x3) == 0x0) && ((hpd.pd & HUGEPD_SHIFT_MASK) != 0));
+        WARN(is_hugepd, "Found wrong page directory format\n");
+        return 0;
+}
+#endif
+
 #else
 int pmd_huge(pmd_t pmd)
 {
@@ -109,7 +128,7 @@ int pgd_huge(pgd_t pgd)
 pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)
 {
         /* Only called for hugetlbfs pages, hence can ignore THP */
-        return __find_linux_pte_or_hugepte(mm->pgd, addr, NULL);
+        return __find_linux_pte_or_hugepte(mm->pgd, addr, NULL, NULL);
 }
 
 static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
@@ -684,13 +703,14 @@ void hugetlb_free_pgd_range(struct mmu_gather *tlb,
 struct page *
 follow_huge_addr(struct mm_struct *mm, unsigned long address, int write)
 {
+        bool is_thp;
         pte_t *ptep, pte;
         unsigned shift;
         unsigned long mask, flags;
         struct page *page = ERR_PTR(-EINVAL);
 
         local_irq_save(flags);
-        ptep = find_linux_pte_or_hugepte(mm->pgd, address, &shift);
+        ptep = find_linux_pte_or_hugepte(mm->pgd, address, &is_thp, &shift);
         if (!ptep)
                 goto no_page;
         pte = READ_ONCE(*ptep);
@@ -699,7 +719,7 @@ follow_huge_addr(struct mm_struct *mm, unsigned long address, int write)
          * Transparent hugepages are handled by generic code. We can skip them
          * here.
          */
-        if (!shift || pmd_trans_huge(__pmd(pte_val(pte))))
+        if (!shift || is_thp)
                 goto no_page;
 
         if (!pte_present(pte)) {
@@ -956,7 +976,7 @@ void flush_dcache_icache_hugepage(struct page *page)
  */
 
 pte_t *__find_linux_pte_or_hugepte(pgd_t *pgdir, unsigned long ea,
-                                   unsigned *shift)
+                                   bool *is_thp, unsigned *shift)
 {
         pgd_t pgd, *pgdp;
         pud_t pud, *pudp;
@@ -968,6 +988,9 @@ pte_t *__find_linux_pte_or_hugepte(pgd_t *pgdir, unsigned long ea,
         if (shift)
                 *shift = 0;
 
+        if (is_thp)
+                *is_thp = false;
+
         pgdp = pgdir + pgd_index(ea);
         pgd  = READ_ONCE(*pgdp);
         /*
@@ -1015,7 +1038,14 @@ pte_t *__find_linux_pte_or_hugepte(pgd_t *pgdir, unsigned long ea,
                         if (pmd_none(pmd))
                                 return NULL;
 
-                        if (pmd_huge(pmd) || pmd_large(pmd)) {
+                        if (pmd_trans_huge(pmd)) {
+                                if (is_thp)
+                                        *is_thp = true;
+                                ret_pte = (pte_t *) pmdp;
+                                goto out;
+                        }
+
+                        if (pmd_huge(pmd)) {
                                 ret_pte = (pte_t *) pmdp;
                                 goto out;
                         } else if (is_hugepd(__hugepd(pmd_val(pmd))))
diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h
index 085b66b10891..9f58ff44a075 100644
--- a/arch/powerpc/mm/mmu_decl.h
+++ b/arch/powerpc/mm/mmu_decl.h
@@ -141,7 +141,8 @@ extern void MMU_init_hw(void);
 extern unsigned long mmu_mapin_ram(unsigned long top);
 
 #elif defined(CONFIG_PPC_FSL_BOOK3E)
-extern unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx);
+extern unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx,
+                                     bool dryrun);
 extern unsigned long calc_cam_sz(unsigned long ram, unsigned long virt,
                                  phys_addr_t phys);
 #ifdef CONFIG_PPC32
@@ -152,6 +153,7 @@ extern int switch_to_as1(void);
 extern void restore_to_as0(int esel, int offset, void *dt_ptr, int bootcpu);
 #endif
 extern void loadcam_entry(unsigned int index);
+extern void loadcam_multi(int first_idx, int num, int tmp_idx);
 
 struct tlbcam {
         u32     MAS0;
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index 8d8a541211d0..669a15e7fa76 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -276,7 +276,6 @@ static int of_node_to_nid_single(struct device_node *device)
 /* Walk the device tree upwards, looking for an associativity id */
 int of_node_to_nid(struct device_node *device)
 {
-        struct device_node *tmp;
         int nid = -1;
 
         of_node_get(device);
@@ -285,9 +284,7 @@ int of_node_to_nid(struct device_node *device)
                 if (nid != -1)
                         break;
 
-                tmp = device;
-                device = of_get_parent(tmp);
-                of_node_put(tmp);
+                device = of_get_next_parent(device);
         }
         of_node_put(device);
 
diff --git a/arch/powerpc/mm/slb.c b/arch/powerpc/mm/slb.c
index 8a32a2be3c53..515730e499fe 100644
--- a/arch/powerpc/mm/slb.c
+++ b/arch/powerpc/mm/slb.c
@@ -25,6 +25,11 @@
 #include <asm/udbg.h>
 #include <asm/code-patching.h>
 
+enum slb_index {
+        LINEAR_INDEX    = 0, /* Kernel linear map  (0xc000000000000000) */
+        VMALLOC_INDEX   = 1, /* Kernel virtual map (0xd000000000000000) */
+        KSTACK_INDEX    = 2, /* Kernel stack map */
+};
 
 extern void slb_allocate_realmode(unsigned long ea);
 extern void slb_allocate_user(unsigned long ea);
@@ -41,9 +46,9 @@ static void slb_allocate(unsigned long ea)
         (((ssize) == MMU_SEGSIZE_256M)? ESID_MASK: ESID_MASK_1T)
 
 static inline unsigned long mk_esid_data(unsigned long ea, int ssize,
-                                         unsigned long entry)
+                                         enum slb_index index)
 {
-        return (ea & slb_esid_mask(ssize)) | SLB_ESID_V | entry;
+        return (ea & slb_esid_mask(ssize)) | SLB_ESID_V | index;
 }
 
 static inline unsigned long mk_vsid_data(unsigned long ea, int ssize,
@@ -55,39 +60,39 @@ static inline unsigned long mk_vsid_data(unsigned long ea, int ssize,
 
 static inline void slb_shadow_update(unsigned long ea, int ssize,
                                      unsigned long flags,
-                                     unsigned long entry)
+                                     enum slb_index index)
 {
+        struct slb_shadow *p = get_slb_shadow();
+
         /*
          * Clear the ESID first so the entry is not valid while we are
          * updating it.  No write barriers are needed here, provided
          * we only update the current CPU's SLB shadow buffer.
          */
-        get_slb_shadow()->save_area[entry].esid = 0;
-        get_slb_shadow()->save_area[entry].vsid =
-                                cpu_to_be64(mk_vsid_data(ea, ssize, flags));
-        get_slb_shadow()->save_area[entry].esid =
-                                cpu_to_be64(mk_esid_data(ea, ssize, entry));
+        p->save_area[index].esid = 0;
+        p->save_area[index].vsid = cpu_to_be64(mk_vsid_data(ea, ssize, flags));
+        p->save_area[index].esid = cpu_to_be64(mk_esid_data(ea, ssize, index));
 }
 
-static inline void slb_shadow_clear(unsigned long entry)
+static inline void slb_shadow_clear(enum slb_index index)
 {
-        get_slb_shadow()->save_area[entry].esid = 0;
+        get_slb_shadow()->save_area[index].esid = 0;
 }
 
 static inline void create_shadowed_slbe(unsigned long ea, int ssize,
                                         unsigned long flags,
-                                        unsigned long entry)
+                                        enum slb_index index)
 {
         /*
          * Updating the shadow buffer before writing the SLB ensures
          * we don't get a stale entry here if we get preempted by PHYP
          * between these two statements.
          */
-        slb_shadow_update(ea, ssize, flags, entry);
+        slb_shadow_update(ea, ssize, flags, index);
 
         asm volatile("slbmte  %0,%1" :
                      : "r" (mk_vsid_data(ea, ssize, flags)),
-                       "r" (mk_esid_data(ea, ssize, entry))
+                       "r" (mk_esid_data(ea, ssize, index))
                      : "memory" );
 }
 
@@ -103,16 +108,16 @@ static void __slb_flush_and_rebolt(void)
         lflags = SLB_VSID_KERNEL | linear_llp;
         vflags = SLB_VSID_KERNEL | vmalloc_llp;
 
-        ksp_esid_data = mk_esid_data(get_paca()->kstack, mmu_kernel_ssize, 2);
+        ksp_esid_data = mk_esid_data(get_paca()->kstack, mmu_kernel_ssize, KSTACK_INDEX);
         if ((ksp_esid_data & ~0xfffffffUL) <= PAGE_OFFSET) {
                 ksp_esid_data &= ~SLB_ESID_V;
                 ksp_vsid_data = 0;
-                slb_shadow_clear(2);
+                slb_shadow_clear(KSTACK_INDEX);
         } else {
                 /* Update stack entry; others don't change */
-                slb_shadow_update(get_paca()->kstack, mmu_kernel_ssize, lflags, 2);
+                slb_shadow_update(get_paca()->kstack, mmu_kernel_ssize, lflags, KSTACK_INDEX);
                 ksp_vsid_data =
-                        be64_to_cpu(get_slb_shadow()->save_area[2].vsid);
+                        be64_to_cpu(get_slb_shadow()->save_area[KSTACK_INDEX].vsid);
         }
 
         /* We need to do this all in asm, so we're sure we don't touch
@@ -151,7 +156,7 @@ void slb_vmalloc_update(void)
         unsigned long vflags;
 
         vflags = SLB_VSID_KERNEL | mmu_psize_defs[mmu_vmalloc_psize].sllp;
-        slb_shadow_update(VMALLOC_START, mmu_kernel_ssize, vflags, 1);
+        slb_shadow_update(VMALLOC_START, mmu_kernel_ssize, vflags, VMALLOC_INDEX);
         slb_flush_and_rebolt();
 }
 
@@ -326,19 +331,19 @@ void slb_initialize(void)
         asm volatile("isync":::"memory");
         asm volatile("slbmte  %0,%0"::"r" (0) : "memory");
         asm volatile("isync; slbia; isync":::"memory");
-        create_shadowed_slbe(PAGE_OFFSET, mmu_kernel_ssize, lflags, 0);
-        create_shadowed_slbe(VMALLOC_START, mmu_kernel_ssize, vflags, 1);
+        create_shadowed_slbe(PAGE_OFFSET, mmu_kernel_ssize, lflags, LINEAR_INDEX);
+        create_shadowed_slbe(VMALLOC_START, mmu_kernel_ssize, vflags, VMALLOC_INDEX);
 
         /* For the boot cpu, we're running on the stack in init_thread_union,
          * which is in the first segment of the linear mapping, and also
          * get_paca()->kstack hasn't been initialized yet.
          * For secondary cpus, we need to bolt the kernel stack entry now.
          */
-        slb_shadow_clear(2);
+        slb_shadow_clear(KSTACK_INDEX);
         if (raw_smp_processor_id() != boot_cpuid &&
             (get_paca()->kstack & slb_esid_mask(mmu_kernel_ssize)) > PAGE_OFFSET)
                 create_shadowed_slbe(get_paca()->kstack,
-                                     mmu_kernel_ssize, lflags, 2);
+                                     mmu_kernel_ssize, lflags, KSTACK_INDEX);
 
         asm volatile("isync":::"memory");
 }
diff --git a/arch/powerpc/mm/tlb_hash64.c b/arch/powerpc/mm/tlb_hash64.c
index c522969f012d..f7b80391bee7 100644
--- a/arch/powerpc/mm/tlb_hash64.c
+++ b/arch/powerpc/mm/tlb_hash64.c
@@ -190,6 +190,7 @@ void tlb_flush(struct mmu_gather *tlb)
 void __flush_hash_table_range(struct mm_struct *mm, unsigned long start,
                               unsigned long end)
 {
+        bool is_thp;
         int hugepage_shift;
         unsigned long flags;
 
@@ -208,21 +209,21 @@ void __flush_hash_table_range(struct mm_struct *mm, unsigned long start,
         local_irq_save(flags);
         arch_enter_lazy_mmu_mode();
         for (; start < end; start += PAGE_SIZE) {
-                pte_t *ptep = find_linux_pte_or_hugepte(mm->pgd, start,
+                pte_t *ptep = find_linux_pte_or_hugepte(mm->pgd, start, &is_thp,
                                                         &hugepage_shift);
                 unsigned long pte;
 
                 if (ptep == NULL)
                         continue;
                 pte = pte_val(*ptep);
-                if (hugepage_shift)
+                if (is_thp)
                         trace_hugepage_invalidate(start, pte);
                 if (!(pte & _PAGE_HASHPTE))
                         continue;
-                if (unlikely(hugepage_shift && pmd_trans_huge(*(pmd_t *)pte)))
+                if (unlikely(is_thp))
                         hpte_do_hugepage_flush(mm, start, (pmd_t *)ptep, pte);
                 else
-                        hpte_need_flush(mm, start, ptep, pte, 0);
+                        hpte_need_flush(mm, start, ptep, pte, hugepage_shift);
         }
         arch_leave_lazy_mmu_mode();
         local_irq_restore(flags);
diff --git a/arch/powerpc/mm/tlb_low_64e.S b/arch/powerpc/mm/tlb_low_64e.S
index e4185581c5a7..29d6987c37ba 100644
--- a/arch/powerpc/mm/tlb_low_64e.S
+++ b/arch/powerpc/mm/tlb_low_64e.S
@@ -68,11 +68,17 @@ END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)
         ld      r14,PACAPGD(r13)
         std     r15,EX_TLB_R15(r12)
         std     r10,EX_TLB_CR(r12)
+#ifdef CONFIG_PPC_FSL_BOOK3E
+        std     r7,EX_TLB_R7(r12)
+#endif
         TLB_MISS_PROLOG_STATS
 .endm
 
 .macro tlb_epilog_bolted
         ld      r14,EX_TLB_CR(r12)
+#ifdef CONFIG_PPC_FSL_BOOK3E
+        ld      r7,EX_TLB_R7(r12)
+#endif
         ld      r10,EX_TLB_R10(r12)
         ld      r11,EX_TLB_R11(r12)
         ld      r13,EX_TLB_R13(r12)
@@ -297,6 +303,7 @@ itlb_miss_fault_bolted:
  * r13 = PACA
  * r11 = tlb_per_core ptr
  * r10 = crap (free to use)
+ * r7  = esel_next
  */
 tlb_miss_common_e6500:
         crmove  cr2*4+2,cr0*4+2         /* cr2.eq != 0 if kernel address */
@@ -325,7 +332,11 @@ BEGIN_FTR_SECTION		/* CPU_FTR_SMT */
         bne     10b
         b       1b
         .previous
+END_FTR_SECTION_IFSET(CPU_FTR_SMT)
+
+        lbz     r7,TCD_ESEL_NEXT(r11)
 
+BEGIN_FTR_SECTION               /* CPU_FTR_SMT */
         /*
          * Erratum A-008139 says that we can't use tlbwe to change
          * an indirect entry in any way (including replacing or
@@ -334,8 +345,7 @@ BEGIN_FTR_SECTION		/* CPU_FTR_SMT */
          * with tlbilx before overwriting.
          */
 
-        lbz     r15,TCD_ESEL_NEXT(r11)
-        rlwinm  r10,r15,16,0xff0000
+        rlwinm  r10,r7,16,0xff0000
         oris    r10,r10,MAS0_TLBSEL(1)@h
         mtspr   SPRN_MAS0,r10
         isync
@@ -429,15 +439,14 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_SMT)
         mtspr   SPRN_MAS2,r15
 
 tlb_miss_huge_done_e6500:
-        lbz     r15,TCD_ESEL_NEXT(r11)
         lbz     r16,TCD_ESEL_MAX(r11)
         lbz     r14,TCD_ESEL_FIRST(r11)
-        rlwimi  r10,r15,16,0x00ff0000   /* insert esel_next into MAS0 */
-        addi    r15,r15,1               /* increment esel_next */
+        rlwimi  r10,r7,16,0x00ff0000    /* insert esel_next into MAS0 */
+        addi    r7,r7,1                 /* increment esel_next */
         mtspr   SPRN_MAS0,r10
-        cmpw    r15,r16
-        iseleq  r15,r14,r15             /* if next == last use first */
-        stb     r15,TCD_ESEL_NEXT(r11)
+        cmpw    r7,r16
+        iseleq  r7,r14,r7               /* if next == last use first */
+        stb     r7,TCD_ESEL_NEXT(r11)
 
         tlbwe
 
diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c
index 723a099f6be3..bb04e4df3100 100644
--- a/arch/powerpc/mm/tlb_nohash.c
+++ b/arch/powerpc/mm/tlb_nohash.c
@@ -42,6 +42,7 @@
 #include <asm/tlbflush.h>
 #include <asm/tlb.h>
 #include <asm/code-patching.h>
+#include <asm/cputhreads.h>
 #include <asm/hugetlb.h>
 #include <asm/paca.h>
 
@@ -628,10 +629,26 @@ static void early_init_this_mmu(void)
 #ifdef CONFIG_PPC_FSL_BOOK3E
         if (mmu_has_feature(MMU_FTR_TYPE_FSL_E)) {
                 unsigned int num_cams;
+                int __maybe_unused cpu = smp_processor_id();
+                bool map = true;
 
                 /* use a quarter of the TLBCAM for bolted linear map */
                 num_cams = (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) / 4;
-                linear_map_top = map_mem_in_cams(linear_map_top, num_cams);
+
+                /*
+                 * Only do the mapping once per core, or else the
+                 * transient mapping would cause problems.
+                 */
+#ifdef CONFIG_SMP
+                if (cpu != boot_cpuid &&
+                    (cpu != cpu_first_thread_sibling(cpu) ||
+                     cpu == cpu_first_thread_sibling(boot_cpuid)))
+                        map = false;
+#endif
+
+                if (map)
+                        linear_map_top = map_mem_in_cams(linear_map_top,
+                                                         num_cams, false);
         }
 #endif
 
@@ -729,10 +746,14 @@ void setup_initial_memory_limit(phys_addr_t first_memblock_base,
          * entries are supported though that may eventually
          * change.
          *
-         * on FSL Embedded 64-bit, we adjust the RMA size to match the
-         * first bolted TLB entry size.  We still limit max to 1G even if
-         * the TLB could cover more.  This is due to what the early init
-         * code is setup to do.
+         * on FSL Embedded 64-bit, usually all RAM is bolted, but with
+         * unusual memory sizes it's possible for some RAM to not be mapped
+         * (such RAM is not used at all by Linux, since we don't support
+         * highmem on 64-bit).  We limit ppc64_rma_size to what would be
+         * mappable if this memblock is the only one.  Additional memblocks
+         * can only increase, not decrease, the amount that ends up getting
+         * mapped.  We still limit max to 1G even if we'll eventually map
+         * more.  This is due to what the early init code is set up to do.
          *
          * We crop it to the size of the first MEMBLOCK to
          * avoid going over total available memory just in case...
@@ -740,8 +761,14 @@ void setup_initial_memory_limit(phys_addr_t first_memblock_base,
 #ifdef CONFIG_PPC_FSL_BOOK3E
         if (mmu_has_feature(MMU_FTR_TYPE_FSL_E)) {
                 unsigned long linear_sz;
-                linear_sz = calc_cam_sz(first_memblock_size, PAGE_OFFSET,
-                                        first_memblock_base);
+                unsigned int num_cams;
+
+                /* use a quarter of the TLBCAM for bolted linear map */
+                num_cams = (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) / 4;
+
+                linear_sz = map_mem_in_cams(first_memblock_size, num_cams,
+                                            true);
+
                 ppc64_rma_size = min_t(u64, linear_sz, 0x40000000);
         } else
 #endif
diff --git a/arch/powerpc/mm/tlb_nohash_low.S b/arch/powerpc/mm/tlb_nohash_low.S
index 43ff3c797fbf..68c477592e43 100644
--- a/arch/powerpc/mm/tlb_nohash_low.S
+++ b/arch/powerpc/mm/tlb_nohash_low.S
@@ -400,6 +400,7 @@ _GLOBAL(set_context)
  * extern void loadcam_entry(unsigned int index)
  *
  * Load TLBCAM[index] entry in to the L2 CAM MMU
+ * Must preserve r7, r8, r9, and r10
  */
 _GLOBAL(loadcam_entry)
         mflr    r5
@@ -423,4 +424,66 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_BIG_PHYS)
         tlbwe
         isync
         blr
+
+/*
+ * Load multiple TLB entries at once, using an alternate-space
+ * trampoline so that we don't have to care about whether the same
+ * TLB entry maps us before and after.
+ *
+ * r3 = first entry to write
+ * r4 = number of entries to write
+ * r5 = temporary tlb entry
+ */
+_GLOBAL(loadcam_multi)
+        mflr    r8
+
+        /*
+         * Set up temporary TLB entry that is the same as what we're
+         * running from, but in AS=1.
+         */
+        bl      1f
+1:      mflr    r6
+        tlbsx   0,r8
+        mfspr   r6,SPRN_MAS1
+        ori     r6,r6,MAS1_TS
+        mtspr   SPRN_MAS1,r6
+        mfspr   r6,SPRN_MAS0
+        rlwimi  r6,r5,MAS0_ESEL_SHIFT,MAS0_ESEL_MASK
+        mr      r7,r5
+        mtspr   SPRN_MAS0,r6
+        isync
+        tlbwe
+        isync
+
+        /* Switch to AS=1 */
+        mfmsr   r6
+        ori     r6,r6,MSR_IS|MSR_DS
+        mtmsr   r6
+        isync
+
+        mr      r9,r3
+        add     r10,r3,r4
+2:      bl      loadcam_entry
+        addi    r9,r9,1
+        cmpw    r9,r10
+        mr      r3,r9
+        blt     2b
+
+        /* Return to AS=0 and clear the temporary entry */
+        mfmsr   r6
+        rlwinm. r6,r6,0,~(MSR_IS|MSR_DS)
+        mtmsr   r6
+        isync
+
+        li      r6,0
+        mtspr   SPRN_MAS1,r6
+        rlwinm  r6,r7,MAS0_ESEL_SHIFT,MAS0_ESEL_MASK
+        oris    r6,r6,MAS0_TLBSEL(1)@h
+        mtspr   SPRN_MAS0,r6
+        isync
+        tlbwe
+        isync
+
+        mtlr    r8
+        blr
 #endif
diff --git a/arch/powerpc/perf/callchain.c b/arch/powerpc/perf/callchain.c
index ff09cde20cd2..e04a6752b399 100644
--- a/arch/powerpc/perf/callchain.c
+++ b/arch/powerpc/perf/callchain.c
@@ -127,7 +127,7 @@ static int read_user_stack_slow(void __user *ptr, void *buf, int nb)
                 return -EFAULT;
 
         local_irq_save(flags);
-        ptep = find_linux_pte_or_hugepte(pgdir, addr, &shift);
+        ptep = find_linux_pte_or_hugepte(pgdir, addr, NULL, &shift);
         if (!ptep)
                 goto err_out;
         if (!shift)
diff --git a/arch/powerpc/platforms/512x/Kconfig b/arch/powerpc/platforms/512x/Kconfig
index 48bf38d0de35..f09016f6b3a6 100644
--- a/arch/powerpc/platforms/512x/Kconfig
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -10,6 +10,12 @@ config PPC_MPC512x
         select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD
         select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD
 
+config MPC512x_LPBFIFO
+        tristate "MPC512x LocalPlus Bus FIFO driver"
+        depends on PPC_MPC512x && MPC512X_DMA
+        help
+          Enable support for Freescale MPC512x LocalPlus Bus FIFO (SCLPC).
+
 config MPC5121_ADS
         bool "Freescale MPC5121E ADS"
         depends on PPC_MPC512x
diff --git a/arch/powerpc/platforms/512x/Makefile b/arch/powerpc/platforms/512x/Makefile
index 01693121a2b1..f47d422953df 100644
--- a/arch/powerpc/platforms/512x/Makefile
+++ b/arch/powerpc/platforms/512x/Makefile
@@ -5,4 +5,5 @@ obj-$(CONFIG_COMMON_CLK)	+= clock-commonclk.o
 obj-y                           += mpc512x_shared.o
 obj-$(CONFIG_MPC5121_ADS)       += mpc5121_ads.o mpc5121_ads_cpld.o
 obj-$(CONFIG_MPC512x_GENERIC)   += mpc512x_generic.o
+obj-$(CONFIG_MPC512x_LPBFIFO)   += mpc512x_lpbfifo.o
 obj-$(CONFIG_PDM360NG)          += pdm360ng.o
diff --git a/arch/powerpc/platforms/512x/mpc512x_lpbfifo.c b/arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
new file mode 100644
index 000000000000..8eb82b043dd8
--- /dev/null
+++ b/arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
@@ -0,0 +1,540 @@
+/*
+ * The driver for Freescale MPC512x LocalPlus Bus FIFO
+ * (called SCLPC in the Reference Manual).
+ *
+ * Copyright (C) 2013-2015 Alexander Popov <alex.popov@linux.com>.
+ *
+ * This file is released under the GPLv2.
+ */
+
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <asm/mpc5121.h>
+#include <asm/io.h>
+#include <linux/spinlock.h>
+#include <linux/slab.h>
+#include <linux/dmaengine.h>
+#include <linux/dma-direction.h>
+#include <linux/dma-mapping.h>
+
+#define DRV_NAME "mpc512x_lpbfifo"
+
+struct cs_range {
+        u32 csnum;
+        u32 base; /* must be zero */
+        u32 addr;
+        u32 size;
+};
+
+static struct lpbfifo_data {
+        spinlock_t lock; /* for protecting lpbfifo_data */
+        phys_addr_t regs_phys;
+        resource_size_t regs_size;
+        struct mpc512x_lpbfifo __iomem *regs;
+        int irq;
+        struct cs_range *cs_ranges;
+        size_t cs_n;
+        struct dma_chan *chan;
+        struct mpc512x_lpbfifo_request *req;
+        dma_addr_t ram_bus_addr;
+        bool wait_lpbfifo_irq;
+        bool wait_lpbfifo_callback;
+} lpbfifo;
+
+/*
+ * A data transfer from RAM to some device on LPB is finished
+ * when both mpc512x_lpbfifo_irq() and mpc512x_lpbfifo_callback()
+ * have been called. We execute the callback registered in
+ * mpc512x_lpbfifo_request just after that.
+ * But for a data transfer from some device on LPB to RAM we don't enable
+ * LPBFIFO interrupt because clearing MPC512X_SCLPC_SUCCESS interrupt flag
+ * automatically disables LPBFIFO reading request to the DMA controller
+ * and the data transfer hangs. So the callback registered in
+ * mpc512x_lpbfifo_request is executed at the end of mpc512x_lpbfifo_callback().
+ */
+
+/*
+ * mpc512x_lpbfifo_irq - IRQ handler for LPB FIFO
+ */
+static irqreturn_t mpc512x_lpbfifo_irq(int irq, void *param)
+{
+        struct device *dev = (struct device *)param;
+        struct mpc512x_lpbfifo_request *req = NULL;
+        unsigned long flags;
+        u32 status;
+
+        spin_lock_irqsave(&lpbfifo.lock, flags);
+
+        if (!lpbfifo.regs)
+                goto end;
+
+        req = lpbfifo.req;
+        if (!req || req->dir == MPC512X_LPBFIFO_REQ_DIR_READ) {
+                dev_err(dev, "bogus LPBFIFO IRQ\n");
+                goto end;
+        }
+
+        status = in_be32(&lpbfifo.regs->status);
+        if (status != MPC512X_SCLPC_SUCCESS) {
+                dev_err(dev, "DMA transfer from RAM to peripheral failed\n");
+                out_be32(&lpbfifo.regs->enable,
+                                MPC512X_SCLPC_RESET | MPC512X_SCLPC_FIFO_RESET);
+                goto end;
+        }
+        /* Clear the interrupt flag */
+        out_be32(&lpbfifo.regs->status, MPC512X_SCLPC_SUCCESS);
+
+        lpbfifo.wait_lpbfifo_irq = false;
+
+        if (lpbfifo.wait_lpbfifo_callback)
+                goto end;
+
+        /* Transfer is finished, set the FIFO as idle */
+        lpbfifo.req = NULL;
+
+        spin_unlock_irqrestore(&lpbfifo.lock, flags);
+
+        if (req->callback)
+                req->callback(req);
+
+        return IRQ_HANDLED;
+
+ end:
+        spin_unlock_irqrestore(&lpbfifo.lock, flags);
+        return IRQ_HANDLED;
+}
+
+/*
+ * mpc512x_lpbfifo_callback is called by DMA driver when
+ * DMA transaction is finished.
+ */
+static void mpc512x_lpbfifo_callback(void *param)
+{
+        unsigned long flags;
+        struct mpc512x_lpbfifo_request *req = NULL;
+        enum dma_data_direction dir;
+
+        spin_lock_irqsave(&lpbfifo.lock, flags);
+
+        if (!lpbfifo.regs) {
+                spin_unlock_irqrestore(&lpbfifo.lock, flags);
+                return;
+        }
+
+        req = lpbfifo.req;
+        if (!req) {
+                pr_err("bogus LPBFIFO callback\n");
+                spin_unlock_irqrestore(&lpbfifo.lock, flags);
+                return;
+        }
+
+        /* Release the mapping */
+        if (req->dir == MPC512X_LPBFIFO_REQ_DIR_WRITE)
+                dir = DMA_TO_DEVICE;
+        else
+                dir = DMA_FROM_DEVICE;
+        dma_unmap_single(lpbfifo.chan->device->dev,
+                        lpbfifo.ram_bus_addr, req->size, dir);
+
+        lpbfifo.wait_lpbfifo_callback = false;
+
+        if (!lpbfifo.wait_lpbfifo_irq) {
+                /* Transfer is finished, set the FIFO as idle */
+                lpbfifo.req = NULL;
+
+                spin_unlock_irqrestore(&lpbfifo.lock, flags);
+
+                if (req->callback)
+                        req->callback(req);
+        } else {
+                spin_unlock_irqrestore(&lpbfifo.lock, flags);
+        }
+}
+
+static int mpc512x_lpbfifo_kick(void)
+{
+        u32 bits;
+        bool no_incr = false;
+        u32 bpt = 32; /* max bytes per LPBFIFO transaction involving DMA */
+        u32 cs = 0;
+        size_t i;
+        struct dma_device *dma_dev = NULL;
+        struct scatterlist sg;
+        enum dma_data_direction dir;
+        struct dma_slave_config dma_conf = {};
+        struct dma_async_tx_descriptor *dma_tx = NULL;
+        dma_cookie_t cookie;
+        int ret;
+
+        /*
+         * 1. Fit the requirements:
+         * - the packet size must be a multiple of 4 since FIFO Data Word
+         *    Register allows only full-word access according the Reference
+         *    Manual;
+         * - the physical address of the device on LPB and the packet size
+         *    must be aligned on BPT (bytes per transaction) or 8-bytes
+         *    boundary according the Reference Manual;
+         * - but we choose DMA maxburst equal (or very close to) BPT to prevent
+         *    DMA controller from overtaking FIFO and causing FIFO underflow
+         *    error. So we force the packet size to be aligned on BPT boundary
+         *    not to confuse DMA driver which requires the packet size to be
+         *    aligned on maxburst boundary;
+         * - BPT should be set to the LPB device port size for operation with
+         *    disabled auto-incrementing according Reference Manual.
+         */
+        if (lpbfifo.req->size == 0 || !IS_ALIGNED(lpbfifo.req->size, 4))
+                return -EINVAL;
+
+        if (lpbfifo.req->portsize != LPB_DEV_PORTSIZE_UNDEFINED) {
+                bpt = lpbfifo.req->portsize;
+                no_incr = true;
+        }
+
+        while (bpt > 1) {
+                if (IS_ALIGNED(lpbfifo.req->dev_phys_addr, min(bpt, 0x8u)) &&
+                                        IS_ALIGNED(lpbfifo.req->size, bpt)) {
+                        break;
+                }
+
+                if (no_incr)
+                        return -EINVAL;
+
+                bpt >>= 1;
+        }
+        dma_conf.dst_maxburst = max(bpt, 0x4u) / 4;
+        dma_conf.src_maxburst = max(bpt, 0x4u) / 4;
+
+        for (i = 0; i < lpbfifo.cs_n; i++) {
+                phys_addr_t cs_start = lpbfifo.cs_ranges[i].addr;
+                phys_addr_t cs_end = cs_start + lpbfifo.cs_ranges[i].size;
+                phys_addr_t access_start = lpbfifo.req->dev_phys_addr;
+                phys_addr_t access_end = access_start + lpbfifo.req->size;
+
+                if (access_start >= cs_start && access_end <= cs_end) {
+                        cs = lpbfifo.cs_ranges[i].csnum;
+                        break;
+                }
+        }
+        if (i == lpbfifo.cs_n)
+                return -EFAULT;
+
+        /* 2. Prepare DMA */
+        dma_dev = lpbfifo.chan->device;
+
+        if (lpbfifo.req->dir == MPC512X_LPBFIFO_REQ_DIR_WRITE) {
+                dir = DMA_TO_DEVICE;
+                dma_conf.direction = DMA_MEM_TO_DEV;
+                dma_conf.dst_addr = lpbfifo.regs_phys +
+                                offsetof(struct mpc512x_lpbfifo, data_word);
+        } else {
+                dir = DMA_FROM_DEVICE;
+                dma_conf.direction = DMA_DEV_TO_MEM;
+                dma_conf.src_addr = lpbfifo.regs_phys +
+                                offsetof(struct mpc512x_lpbfifo, data_word);
+        }
+        dma_conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+        dma_conf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+
+        /* Make DMA channel work with LPB FIFO data register */
+        if (dma_dev->device_config(lpbfifo.chan, &dma_conf)) {
+                ret = -EINVAL;
+                goto err_dma_prep;
+        }
+
+        sg_init_table(&sg, 1);
+
+        sg_dma_address(&sg) = dma_map_single(dma_dev->dev,
+                        lpbfifo.req->ram_virt_addr, lpbfifo.req->size, dir);
+        if (dma_mapping_error(dma_dev->dev, sg_dma_address(&sg)))
+                return -EFAULT;
+
+        lpbfifo.ram_bus_addr = sg_dma_address(&sg); /* For freeing later */
+
+        sg_dma_len(&sg) = lpbfifo.req->size;
+
+        dma_tx = dmaengine_prep_slave_sg(lpbfifo.chan, &sg,
+                                                1, dma_conf.direction, 0);
+        if (!dma_tx) {
+                ret = -ENOSPC;
+                goto err_dma_prep;
+        }
+        dma_tx->callback = mpc512x_lpbfifo_callback;
+        dma_tx->callback_param = NULL;
+
+        /* 3. Prepare FIFO */
+        out_be32(&lpbfifo.regs->enable,
+                                MPC512X_SCLPC_RESET | MPC512X_SCLPC_FIFO_RESET);
+        out_be32(&lpbfifo.regs->enable, 0x0);
+
+        /*
+         * Configure the watermarks for write operation (RAM->DMA->FIFO->dev):
+         * - high watermark 7 words according the Reference Manual,
+         * - low watermark 512 bytes (half of the FIFO).
+         * These watermarks don't work for read operation since the
+         * MPC512X_SCLPC_FLUSH bit is set (according the Reference Manual).
+         */
+        out_be32(&lpbfifo.regs->fifo_ctrl, MPC512X_SCLPC_FIFO_CTRL(0x7));
+        out_be32(&lpbfifo.regs->fifo_alarm, MPC512X_SCLPC_FIFO_ALARM(0x200));
+
+        /*
+         * Start address is a physical address of the region which belongs
+         * to the device on the LocalPlus Bus
+         */
+        out_be32(&lpbfifo.regs->start_addr, lpbfifo.req->dev_phys_addr);
+
+        /*
+         * Configure chip select, transfer direction, address increment option
+         * and bytes per transaction option
+         */
+        bits = MPC512X_SCLPC_CS(cs);
+        if (lpbfifo.req->dir == MPC512X_LPBFIFO_REQ_DIR_READ)
+                bits |= MPC512X_SCLPC_READ | MPC512X_SCLPC_FLUSH;
+        if (no_incr)
+                bits |= MPC512X_SCLPC_DAI;
+        bits |= MPC512X_SCLPC_BPT(bpt);
+        out_be32(&lpbfifo.regs->ctrl, bits);
+
+        /* Unmask irqs */
+        bits = MPC512X_SCLPC_ENABLE | MPC512X_SCLPC_ABORT_INT_ENABLE;
+        if (lpbfifo.req->dir == MPC512X_LPBFIFO_REQ_DIR_WRITE)
+                bits |= MPC512X_SCLPC_NORM_INT_ENABLE;
+        else
+                lpbfifo.wait_lpbfifo_irq = false;
+
+        out_be32(&lpbfifo.regs->enable, bits);
+
+        /* 4. Set packet size and kick FIFO off */
+        bits = lpbfifo.req->size | MPC512X_SCLPC_START;
+        out_be32(&lpbfifo.regs->pkt_size, bits);
+
+        /* 5. Finally kick DMA off */
+        cookie = dma_tx->tx_submit(dma_tx);
+        if (dma_submit_error(cookie)) {
+                ret = -ENOSPC;
+                goto err_dma_submit;
+        }
+
+        return 0;
+
+ err_dma_submit:
+        out_be32(&lpbfifo.regs->enable,
+                                MPC512X_SCLPC_RESET | MPC512X_SCLPC_FIFO_RESET);
+ err_dma_prep:
+        dma_unmap_single(dma_dev->dev, sg_dma_address(&sg),
+                                                lpbfifo.req->size, dir);
+        return ret;
+}
+
+static int mpc512x_lpbfifo_submit_locked(struct mpc512x_lpbfifo_request *req)
+{
+        int ret = 0;
+
+        if (!lpbfifo.regs)
+                return -ENODEV;
+
+        /* Check whether a transfer is in progress */
+        if (lpbfifo.req)
+                return -EBUSY;
+
+        lpbfifo.wait_lpbfifo_irq = true;
+        lpbfifo.wait_lpbfifo_callback = true;
+        lpbfifo.req = req;
+
+        ret = mpc512x_lpbfifo_kick();
+        if (ret != 0)
+                lpbfifo.req = NULL; /* Set the FIFO as idle */
+
+        return ret;
+}
+
+int mpc512x_lpbfifo_submit(struct mpc512x_lpbfifo_request *req)
+{
+        unsigned long flags;
+        int ret = 0;
+
+        spin_lock_irqsave(&lpbfifo.lock, flags);
+        ret = mpc512x_lpbfifo_submit_locked(req);
+        spin_unlock_irqrestore(&lpbfifo.lock, flags);
+
+        return ret;
+}
+EXPORT_SYMBOL(mpc512x_lpbfifo_submit);
+
+/*
+ * LPBFIFO driver uses "ranges" property of "localbus" device tree node
+ * for being able to determine the chip select number of a client device
+ * ordering a DMA transfer.
+ */
+static int get_cs_ranges(struct device *dev)
+{
+        int ret = -ENODEV;
+        struct device_node *lb_node;
+        const u32 *addr_cells_p;
+        const u32 *size_cells_p;
+        int proplen;
+        size_t i;
+
+        lb_node = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-localbus");
+        if (!lb_node)
+                return ret;
+
+        /*
+         * The node defined as compatible with 'fsl,mpc5121-localbus'
+         * should have two address cells and one size cell.
+         * Every item of its ranges property should consist of:
+         * - the first address cell which is the chipselect number;
+         * - the second address cell which is the offset in the chipselect,
+         *    must be zero.
+         * - CPU address of the beginning of an access window;
+         * - the only size cell which is the size of an access window.
+         */
+        addr_cells_p = of_get_property(lb_node, "#address-cells", NULL);
+        size_cells_p = of_get_property(lb_node, "#size-cells", NULL);
+        if (addr_cells_p == NULL || *addr_cells_p != 2 ||
+                                size_cells_p == NULL || *size_cells_p != 1) {
+                goto end;
+        }
+
+        proplen = of_property_count_u32_elems(lb_node, "ranges");
+        if (proplen <= 0 || proplen % 4 != 0)
+                goto end;
+
+        lpbfifo.cs_n = proplen / 4;
+        lpbfifo.cs_ranges = devm_kcalloc(dev, lpbfifo.cs_n,
+                                        sizeof(struct cs_range), GFP_KERNEL);
+        if (!lpbfifo.cs_ranges)
+                goto end;
+
+        if (of_property_read_u32_array(lb_node, "ranges",
+                                (u32 *)lpbfifo.cs_ranges, proplen) != 0) {
+                goto end;
+        }
+
+        for (i = 0; i < lpbfifo.cs_n; i++) {
+                if (lpbfifo.cs_ranges[i].base != 0)
+                        goto end;
+        }
+
+        ret = 0;
+
+ end:
+        of_node_put(lb_node);
+        return ret;
+}
+
+static int mpc512x_lpbfifo_probe(struct platform_device *pdev)
+{
+        struct resource r;
+        int ret = 0;
+
+        memset(&lpbfifo, 0, sizeof(struct lpbfifo_data));
+        spin_lock_init(&lpbfifo.lock);
+
+        lpbfifo.chan = dma_request_slave_channel(&pdev->dev, "rx-tx");
+        if (lpbfifo.chan == NULL)
+                return -EPROBE_DEFER;
+
+        if (of_address_to_resource(pdev->dev.of_node, 0, &r) != 0) {
+                dev_err(&pdev->dev, "bad 'reg' in 'sclpc' device tree node\n");
+                ret = -ENODEV;
+                goto err0;
+        }
+
+        lpbfifo.regs_phys = r.start;
+        lpbfifo.regs_size = resource_size(&r);
+
+        if (!devm_request_mem_region(&pdev->dev, lpbfifo.regs_phys,
+                                        lpbfifo.regs_size, DRV_NAME)) {
+                dev_err(&pdev->dev, "unable to request region\n");
+                ret = -EBUSY;
+                goto err0;
+        }
+
+        lpbfifo.regs = devm_ioremap(&pdev->dev,
+                                        lpbfifo.regs_phys, lpbfifo.regs_size);
+        if (!lpbfifo.regs) {
+                dev_err(&pdev->dev, "mapping registers failed\n");
+                ret = -ENOMEM;
+                goto err0;
+        }
+
+        out_be32(&lpbfifo.regs->enable,
+                                MPC512X_SCLPC_RESET | MPC512X_SCLPC_FIFO_RESET);
+
+        if (get_cs_ranges(&pdev->dev) != 0) {
+                dev_err(&pdev->dev, "bad '/localbus' device tree node\n");
+                ret = -ENODEV;
+                goto err0;
+        }
+
+        lpbfifo.irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
+        if (lpbfifo.irq == NO_IRQ) {
+                dev_err(&pdev->dev, "mapping irq failed\n");
+                ret = -ENODEV;
+                goto err0;
+        }
+
+        if (request_irq(lpbfifo.irq, mpc512x_lpbfifo_irq, 0,
+                                                DRV_NAME, &pdev->dev) != 0) {
+                dev_err(&pdev->dev, "requesting irq failed\n");
+                ret = -ENODEV;
+                goto err1;
+        }
+
+        dev_info(&pdev->dev, "probe succeeded\n");
+        return 0;
+
+ err1:
+        irq_dispose_mapping(lpbfifo.irq);
+ err0:
+        dma_release_channel(lpbfifo.chan);
+        return ret;
+}
+
+static int mpc512x_lpbfifo_remove(struct platform_device *pdev)
+{
+        unsigned long flags;
+        struct dma_device *dma_dev = lpbfifo.chan->device;
+        struct mpc512x_lpbfifo __iomem *regs = NULL;
+
+        spin_lock_irqsave(&lpbfifo.lock, flags);
+        regs = lpbfifo.regs;
+        lpbfifo.regs = NULL;
+        spin_unlock_irqrestore(&lpbfifo.lock, flags);
+
+        dma_dev->device_terminate_all(lpbfifo.chan);
+        out_be32(&regs->enable, MPC512X_SCLPC_RESET | MPC512X_SCLPC_FIFO_RESET);
+
+        free_irq(lpbfifo.irq, &pdev->dev);
+        irq_dispose_mapping(lpbfifo.irq);
+        dma_release_channel(lpbfifo.chan);
+
+        return 0;
+}
+
+static const struct of_device_id mpc512x_lpbfifo_match[] = {
+        { .compatible = "fsl,mpc512x-lpbfifo", },
+        {},
+};
+MODULE_DEVICE_TABLE(of, mpc512x_lpbfifo_match);
+
+static struct platform_driver mpc512x_lpbfifo_driver = {
+        .probe = mpc512x_lpbfifo_probe,
+        .remove = mpc512x_lpbfifo_remove,
+        .driver = {
+                .name = DRV_NAME,
+                .owner = THIS_MODULE,
+                .of_match_table = mpc512x_lpbfifo_match,
+        },
+};
+
+module_platform_driver(mpc512x_lpbfifo_driver);
+
+MODULE_AUTHOR("Alexander Popov <alex.popov@linux.com>");
+MODULE_DESCRIPTION("MPC512x LocalPlus Bus FIFO device driver");
+MODULE_LICENSE("GPL v2");
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
index 78ac19aefa4d..3048e34db6d8 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
@@ -724,7 +724,7 @@ static int mpc52xx_gpt_probe(struct platform_device *ofdev)
 {
         struct mpc52xx_gpt_priv *gpt;
 
-        gpt = kzalloc(sizeof *gpt, GFP_KERNEL);
+        gpt = devm_kzalloc(&ofdev->dev, sizeof *gpt, GFP_KERNEL);
         if (!gpt)
                 return -ENOMEM;
 
@@ -732,10 +732,8 @@ static int mpc52xx_gpt_probe(struct platform_device *ofdev)
         gpt->dev = &ofdev->dev;
         gpt->ipb_freq = mpc5xxx_get_bus_frequency(ofdev->dev.of_node);
         gpt->regs = of_iomap(ofdev->dev.of_node, 0);
-        if (!gpt->regs) {
-                kfree(gpt);
+        if (!gpt->regs)
                 return -ENOMEM;
-        }
 
         dev_set_drvdata(&ofdev->dev, gpt);
 
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
index 251dcb90ef34..7bb42a0100de 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
@@ -568,6 +568,7 @@ static const struct of_device_id mpc52xx_lpbfifo_match[] = {
         { .compatible = "fsl,mpc5200-lpbfifo", },
         {},
 };
+MODULE_DEVICE_TABLE(of, mpc52xx_lpbfifo_match);
 
 static struct platform_driver mpc52xx_lpbfifo_driver = {
         .driver = {
diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c b/arch/powerpc/platforms/85xx/corenet_generic.c
index b39557120cbb..46d05c94add6 100644
--- a/arch/powerpc/platforms/85xx/corenet_generic.c
+++ b/arch/powerpc/platforms/85xx/corenet_generic.c
@@ -161,6 +161,7 @@ static const char * const boards[] __initconst = {
         "fsl,T1042RDB",
         "fsl,T1042RDB_PI",
         "keymile,kmcoge4",
+        "varisys,CYRUS",
         NULL
 };
 
@@ -214,7 +215,17 @@ define_machine(corenet_generic) {
         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
 #endif
+/*
+ * Core reset may cause issues if using the proxy mode of MPIC.
+ * So, use the mixed mode of MPIC if enabling CPU hotplug.
+ *
+ * Likewise, problems have been seen with kexec when coreint is enabled.
+ */
+#if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_KEXEC)
+        .get_irq                = mpic_get_irq,
+#else
         .get_irq                = mpic_get_coreint_irq,
+#endif
         .restart                = fsl_rstcr_restart,
         .calibrate_decr         = generic_calibrate_decr,
         .progress               = udbg_progress,
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index a392e94a07fa..f0be439ceaaa 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -34,6 +34,7 @@
 #include <linux/of_device.h>
 #include <linux/phy.h>
 #include <linux/memblock.h>
+#include <linux/fsl/guts.h>
 
 #include <linux/atomic.h>
 #include <asm/time.h>
@@ -51,7 +52,6 @@
 #include <asm/qe_ic.h>
 #include <asm/mpic.h>
 #include <asm/swiotlb.h>
-#include <asm/fsl_guts.h>
 #include "smp.h"
 
 #include "mpc85xx.h"
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index e358bed66d01..50dcc00a0f5a 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -17,6 +17,7 @@
 #include <linux/seq_file.h>
 #include <linux/interrupt.h>
 #include <linux/of_platform.h>
+#include <linux/fsl/guts.h>
 
 #include <asm/time.h>
 #include <asm/machdep.h>
@@ -27,7 +28,6 @@
 #include <asm/mpic.h>
 #include <asm/qe.h>
 #include <asm/qe_ic.h>
-#include <asm/fsl_guts.h>
 
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c
index 6ac986d3f8a3..371df822e88e 100644
--- a/arch/powerpc/platforms/85xx/p1022_ds.c
+++ b/arch/powerpc/platforms/85xx/p1022_ds.c
@@ -16,6 +16,7 @@
  * kind, whether express or implied.
  */
 
+#include <linux/fsl/guts.h>
 #include <linux/pci.h>
 #include <linux/of_platform.h>
 #include <asm/div64.h>
@@ -25,7 +26,6 @@
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
 #include <asm/udbg.h>
-#include <asm/fsl_guts.h>
 #include <asm/fsl_lbc.h>
 #include "smp.h"
 
diff --git a/arch/powerpc/platforms/85xx/p1022_rdk.c b/arch/powerpc/platforms/85xx/p1022_rdk.c
index 680232d6ba48..5087becaa8bc 100644
--- a/arch/powerpc/platforms/85xx/p1022_rdk.c
+++ b/arch/powerpc/platforms/85xx/p1022_rdk.c
@@ -12,6 +12,7 @@
  * kind, whether express or implied.
  */
 
+#include <linux/fsl/guts.h>
 #include <linux/pci.h>
 #include <linux/of_platform.h>
 #include <asm/div64.h>
@@ -21,7 +22,6 @@
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
 #include <asm/udbg.h>
-#include <asm/fsl_guts.h>
 #include "smp.h"
 
 #include "mpc85xx.h"
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index b8b821697910..6b107cea1c08 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -19,6 +19,7 @@
 #include <linux/kexec.h>
 #include <linux/highmem.h>
 #include <linux/cpu.h>
+#include <linux/fsl/guts.h>
 
 #include <asm/machdep.h>
 #include <asm/pgtable.h>
@@ -26,7 +27,6 @@
 #include <asm/mpic.h>
 #include <asm/cacheflush.h>
 #include <asm/dbell.h>
-#include <asm/fsl_guts.h>
 #include <asm/code-patching.h>
 #include <asm/cputhreads.h>
 
@@ -173,15 +173,22 @@ static inline u32 read_spin_table_addr_l(void *spin_table)
 static void wake_hw_thread(void *info)
 {
         void fsl_secondary_thread_init(void);
-        unsigned long imsr1, inia1;
+        unsigned long imsr, inia;
         int nr = *(const int *)info;
 
-        imsr1 = MSR_KERNEL;
-        inia1 = *(unsigned long *)fsl_secondary_thread_init;
-
-        mttmr(TMRN_IMSR1, imsr1);
-        mttmr(TMRN_INIA1, inia1);
-        mtspr(SPRN_TENS, TEN_THREAD(1));
+        imsr = MSR_KERNEL;
+        inia = *(unsigned long *)fsl_secondary_thread_init;
+
+        if (cpu_thread_in_core(nr) == 0) {
+                /* For when we boot on a secondary thread with kdump */
+                mttmr(TMRN_IMSR0, imsr);
+                mttmr(TMRN_INIA0, inia);
+                mtspr(SPRN_TENS, TEN_THREAD(0));
+        } else {
+                mttmr(TMRN_IMSR1, imsr);
+                mttmr(TMRN_INIA1, inia);
+                mtspr(SPRN_TENS, TEN_THREAD(1));
+        }
 
         smp_generic_kick_cpu(nr);
 }
@@ -224,6 +231,12 @@ static int smp_85xx_kick_cpu(int nr)
 
                 smp_call_function_single(primary, wake_hw_thread, &nr, 0);
                 return 0;
+        } else if (cpu_thread_in_core(boot_cpuid) != 0 &&
+                   cpu_first_thread_sibling(boot_cpuid) == nr) {
+                if (WARN_ON_ONCE(!cpu_has_feature(CPU_FTR_SMT)))
+                        return -ENOENT;
+
+                smp_call_function_single(boot_cpuid, wake_hw_thread, &nr, 0);
         }
 #endif
 
@@ -331,13 +344,14 @@ struct smp_ops_t smp_85xx_ops = {
         .cpu_disable    = generic_cpu_disable,
         .cpu_die        = generic_cpu_die,
 #endif
-#ifdef CONFIG_KEXEC
+#if defined(CONFIG_KEXEC) && !defined(CONFIG_PPC64)
         .give_timebase  = smp_generic_give_timebase,
         .take_timebase  = smp_generic_take_timebase,
 #endif
 };
 
 #ifdef CONFIG_KEXEC
+#ifdef CONFIG_PPC32
 atomic_t kexec_down_cpus = ATOMIC_INIT(0);
 
 void mpc85xx_smp_kexec_cpu_down(int crash_shutdown, int secondary)
@@ -357,9 +371,64 @@ static void mpc85xx_smp_kexec_down(void *arg)
         if (ppc_md.kexec_cpu_down)
                 ppc_md.kexec_cpu_down(0,1);
 }
+#else
+void mpc85xx_smp_kexec_cpu_down(int crash_shutdown, int secondary)
+{
+        int cpu = smp_processor_id();
+        int sibling = cpu_last_thread_sibling(cpu);
+        bool notified = false;
+        int disable_cpu;
+        int disable_threadbit = 0;
+        long start = mftb();
+        long now;
+
+        local_irq_disable();
+        hard_irq_disable();
+        mpic_teardown_this_cpu(secondary);
+
+        if (cpu == crashing_cpu && cpu_thread_in_core(cpu) != 0) {
+                /*
+                 * We enter the crash kernel on whatever cpu crashed,
+                 * even if it's a secondary thread.  If that's the case,
+                 * disable the corresponding primary thread.
+                 */
+                disable_threadbit = 1;
+                disable_cpu = cpu_first_thread_sibling(cpu);
+        } else if (sibling != crashing_cpu &&
+                   cpu_thread_in_core(cpu) == 0 &&
+                   cpu_thread_in_core(sibling) != 0) {
+                disable_threadbit = 2;
+                disable_cpu = sibling;
+        }
+
+        if (disable_threadbit) {
+                while (paca[disable_cpu].kexec_state < KEXEC_STATE_REAL_MODE) {
+                        barrier();
+                        now = mftb();
+                        if (!notified && now - start > 1000000) {
+                                pr_info("%s/%d: waiting for cpu %d to enter KEXEC_STATE_REAL_MODE (%d)\n",
+                                        __func__, smp_processor_id(),
+                                        disable_cpu,
+                                        paca[disable_cpu].kexec_state);
+                                notified = true;
+                        }
+                }
+
+                if (notified) {
+                        pr_info("%s: cpu %d done waiting\n",
+                                __func__, disable_cpu);
+                }
+
+                mtspr(SPRN_TENC, disable_threadbit);
+                while (mfspr(SPRN_TENSR) & disable_threadbit)
+                        cpu_relax();
+        }
+}
+#endif
 
 static void mpc85xx_smp_machine_kexec(struct kimage *image)
 {
+#ifdef CONFIG_PPC32
         int timeout = INT_MAX;
         int i, num_cpus = num_present_cpus();
 
@@ -380,6 +449,7 @@ static void mpc85xx_smp_machine_kexec(struct kimage *image)
                 if ( i == smp_processor_id() ) continue;
                 mpic_reset_core(i);
         }
+#endif
 
         default_machine_kexec(image);
 }
diff --git a/arch/powerpc/platforms/85xx/twr_p102x.c b/arch/powerpc/platforms/85xx/twr_p102x.c
index 30e002f4648c..892e613519cc 100644
--- a/arch/powerpc/platforms/85xx/twr_p102x.c
+++ b/arch/powerpc/platforms/85xx/twr_p102x.c
@@ -15,6 +15,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/errno.h>
+#include <linux/fsl/guts.h>
 #include <linux/pci.h>
 #include <linux/of_platform.h>
 
@@ -23,7 +24,6 @@
 #include <asm/mpic.h>
 #include <asm/qe.h>
 #include <asm/qe_ic.h>
-#include <asm/fsl_guts.h>
 
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index 55413a547ea8..437a9c372ae1 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -24,6 +24,7 @@
 #include <linux/delay.h>
 #include <linux/seq_file.h>
 #include <linux/of.h>
+#include <linux/fsl/guts.h>
 
 #include <asm/time.h>
 #include <asm/machdep.h>
@@ -38,7 +39,6 @@
 #include <sysdev/fsl_pci.h>
 #include <sysdev/fsl_soc.h>
 #include <sysdev/simple_gpio.h>
-#include <asm/fsl_guts.h>
 
 #include "mpc86xx.h"
 
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index c140e94c7c72..142dff5e96d6 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -147,17 +147,6 @@ config 6xx
         depends on PPC32 && PPC_BOOK3S
         select PPC_HAVE_PMU_SUPPORT
 
-config TUNE_CELL
-        bool "Optimize for Cell Broadband Engine"
-        depends on PPC64 && PPC_BOOK3S
-        help
-          Cause the compiler to optimize for the PPE of the Cell Broadband
-          Engine. This will make the code run considerably faster on Cell
-          but somewhat slower on other machines. This option only changes
-          the scheduling of instructions, not the selection of instructions
-          itself, so the resulting kernel will keep running on all other
-          machines.
-
 # this is temp to handle compat with arch=ppc
 config 8xx
         bool
diff --git a/arch/powerpc/platforms/cell/Kconfig b/arch/powerpc/platforms/cell/Kconfig
index b0ac1773cea6..429fc59d2a47 100644
--- a/arch/powerpc/platforms/cell/Kconfig
+++ b/arch/powerpc/platforms/cell/Kconfig
@@ -25,7 +25,7 @@ config PPC_CELL_NATIVE
 
 config PPC_IBM_CELL_BLADE
         bool "IBM Cell Blade"
-        depends on PPC64 && PPC_BOOK3S
+        depends on PPC64 && PPC_BOOK3S && CPU_BIG_ENDIAN
         select PPC_CELL_NATIVE
         select PPC_OF_PLATFORM_PCI
         select PCI
@@ -35,7 +35,7 @@ config PPC_IBM_CELL_BLADE
 
 config PPC_CELL_QPACE
         bool "IBM Cell - QPACE"
-        depends on PPC64 && PPC_BOOK3S
+        depends on PPC64 && PPC_BOOK3S && CPU_BIG_ENDIAN
         select PPC_CELL_COMMON
 
 config AXON_MSI
diff --git a/arch/powerpc/platforms/maple/Kconfig b/arch/powerpc/platforms/maple/Kconfig
index 1ea621a94c3b..e359d0db092c 100644
--- a/arch/powerpc/platforms/maple/Kconfig
+++ b/arch/powerpc/platforms/maple/Kconfig
@@ -1,5 +1,5 @@
 config PPC_MAPLE
-        depends on PPC64 && PPC_BOOK3S
+        depends on PPC64 && PPC_BOOK3S && CPU_BIG_ENDIAN
         bool "Maple 970FX Evaluation Board"
         select PCI
         select MPIC
diff --git a/arch/powerpc/platforms/pasemi/Kconfig b/arch/powerpc/platforms/pasemi/Kconfig
index a2aeb327d185..00d4b28cbb60 100644
--- a/arch/powerpc/platforms/pasemi/Kconfig
+++ b/arch/powerpc/platforms/pasemi/Kconfig
@@ -1,5 +1,5 @@
 config PPC_PASEMI
-        depends on PPC64 && PPC_BOOK3S
+        depends on PPC64 && PPC_BOOK3S && CPU_BIG_ENDIAN
         bool "PA Semi SoC-based platforms"
         default n
         select MPIC
diff --git a/arch/powerpc/platforms/powermac/Kconfig b/arch/powerpc/platforms/powermac/Kconfig
index 607124bae2e7..43c606268baf 100644
--- a/arch/powerpc/platforms/powermac/Kconfig
+++ b/arch/powerpc/platforms/powermac/Kconfig
@@ -1,6 +1,6 @@
 config PPC_PMAC
         bool "Apple PowerMac based machines"
-        depends on PPC_BOOK3S
+        depends on PPC_BOOK3S && CPU_BIG_ENDIAN
         select MPIC
         select PCI
         select PPC_INDIRECT_PCI if PPC32
diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c
index 3bb6acb76339..e1c90725522a 100644
--- a/arch/powerpc/platforms/powernv/eeh-powernv.c
+++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
@@ -43,17 +43,11 @@
 static bool pnv_eeh_nb_init = false;
 static int eeh_event_irq = -EINVAL;
 
-/**
- * pnv_eeh_init - EEH platform dependent initialization
- *
- * EEH platform dependent initialization on powernv
- */
 static int pnv_eeh_init(void)
 {
         struct pci_controller *hose;
         struct pnv_phb *phb;
 
-        /* We require OPALv3 */
         if (!firmware_has_feature(FW_FEATURE_OPALv3)) {
                 pr_warn("%s: OPALv3 is required !\n",
                         __func__);
@@ -77,9 +71,9 @@ static int pnv_eeh_init(void)
                 /*
                  * PE#0 should be regarded as valid by EEH core
                  * if it's not the reserved one. Currently, we
-                 * have the reserved PE#0 and PE#127 for PHB3
+                 * have the reserved PE#255 and PE#127 for PHB3
                  * and P7IOC separately. So we should regard
-                 * PE#0 as valid for P7IOC.
+                 * PE#0 as valid for PHB3 and P7IOC.
                  */
                 if (phb->ioda.reserved_pe != 0)
                         eeh_add_flag(EEH_VALID_PE_ZERO);
@@ -284,33 +278,23 @@ static int pnv_eeh_post_init(void)
 #endif /* CONFIG_DEBUG_FS */
         }
 
-
         return ret;
 }
 
-static int pnv_eeh_cap_start(struct pci_dn *pdn)
+static int pnv_eeh_find_cap(struct pci_dn *pdn, int cap)
 {
-        u32 status;
+        int pos = PCI_CAPABILITY_LIST;
+        int cnt = 48;   /* Maximal number of capabilities */
+        u32 status, id;
 
         if (!pdn)
                 return 0;
 
+        /* Check if the device supports capabilities */
         pnv_pci_cfg_read(pdn, PCI_STATUS, 2, &status);
         if (!(status & PCI_STATUS_CAP_LIST))
                 return 0;
 
-        return PCI_CAPABILITY_LIST;
-}
-
-static int pnv_eeh_find_cap(struct pci_dn *pdn, int cap)
-{
-        int pos = pnv_eeh_cap_start(pdn);
-        int cnt = 48;   /* Maximal number of capabilities */
-        u32 id;
-
-        if (!pos)
-                return 0;
-
         while (cnt--) {
                 pnv_pci_cfg_read(pdn, pos, 1, &pos);
                 if (pos < 0x40)
@@ -443,11 +427,14 @@ static void *pnv_eeh_probe(struct pci_dn *pdn, void *data)
          * that PE to block its config space.
          *
          * Broadcom Austin 4-ports NICs (14e4:1657)
+         * Broadcom Shiner 4-ports 1G NICs (14e4:168a)
          * Broadcom Shiner 2-ports 10G NICs (14e4:168e)
          */
         if ((pdn->vendor_id == PCI_VENDOR_ID_BROADCOM &&
              pdn->device_id == 0x1657) ||
             (pdn->vendor_id == PCI_VENDOR_ID_BROADCOM &&
+             pdn->device_id == 0x168a) ||
+            (pdn->vendor_id == PCI_VENDOR_ID_BROADCOM &&
              pdn->device_id == 0x168e))
                 edev->pe->state |= EEH_PE_CFG_RESTRICTED;
 
@@ -487,10 +474,9 @@ static int pnv_eeh_set_option(struct eeh_pe *pe, int option)
         struct pci_controller *hose = pe->phb;
         struct pnv_phb *phb = hose->private_data;
         bool freeze_pe = false;
-        int opt, ret = 0;
+        int opt;
         s64 rc;
 
-        /* Sanity check on option */
         switch (option) {
         case EEH_OPT_DISABLE:
                 return -EPERM;
@@ -511,38 +497,37 @@ static int pnv_eeh_set_option(struct eeh_pe *pe, int option)
                 return -EINVAL;
         }
 
-        /* If PHB supports compound PE, to handle it */
+        /* Freeze master and slave PEs if PHB supports compound PEs */
         if (freeze_pe) {
                 if (phb->freeze_pe) {
                         phb->freeze_pe(phb, pe->addr);
-                } else {
-                        rc = opal_pci_eeh_freeze_set(phb->opal_id,
-                                                     pe->addr, opt);
-                        if (rc != OPAL_SUCCESS) {
-                                pr_warn("%s: Failure %lld freezing "
-                                        "PHB#%x-PE#%x\n",
-                                        __func__, rc,
-                                        phb->hose->global_number, pe->addr);
-                                ret = -EIO;
-                        }
+                        return 0;
                 }
-        } else {
-                if (phb->unfreeze_pe) {
-                        ret = phb->unfreeze_pe(phb, pe->addr, opt);
-                } else {
-                        rc = opal_pci_eeh_freeze_clear(phb->opal_id,
-                                                       pe->addr, opt);
-                        if (rc != OPAL_SUCCESS) {
-                                pr_warn("%s: Failure %lld enable %d "
-                                        "for PHB#%x-PE#%x\n",
-                                        __func__, rc, option,
-                                        phb->hose->global_number, pe->addr);
-                                ret = -EIO;
-                        }
+
+                rc = opal_pci_eeh_freeze_set(phb->opal_id, pe->addr, opt);
+                if (rc != OPAL_SUCCESS) {
+                        pr_warn("%s: Failure %lld freezing PHB#%x-PE#%x\n",
+                                __func__, rc, phb->hose->global_number,
+                                pe->addr);
+                        return -EIO;
                 }
+
+                return 0;
         }
 
-        return ret;
+        /* Unfreeze master and slave PEs if PHB supports */
+        if (phb->unfreeze_pe)
+                return phb->unfreeze_pe(phb, pe->addr, opt);
+
+        rc = opal_pci_eeh_freeze_clear(phb->opal_id, pe->addr, opt);
+        if (rc != OPAL_SUCCESS) {
+                pr_warn("%s: Failure %lld enable %d for PHB#%x-PE#%x\n",
+                        __func__, rc, option, phb->hose->global_number,
+                        pe->addr);
+                return -EIO;
+        }
+
+        return 0;
 }
 
 /**
@@ -1065,7 +1050,6 @@ static int pnv_eeh_err_inject(struct eeh_pe *pe, int type, int func,
         struct pnv_phb *phb = hose->private_data;
         s64 rc;
 
-        /* Sanity check on error type */
         if (type != OPAL_ERR_INJECT_TYPE_IOA_BUS_ERR &&
             type != OPAL_ERR_INJECT_TYPE_IOA_BUS_ERR64) {
                 pr_warn("%s: Invalid error type %d\n",
diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c
index 685b3cbe1362..a9a8fa37a555 100644
--- a/arch/powerpc/platforms/powernv/setup.c
+++ b/arch/powerpc/platforms/powernv/setup.c
@@ -187,7 +187,7 @@ static void pnv_kexec_wait_secondaries_down(void)
 
         for_each_online_cpu(i) {
                 uint8_t status;
-                int64_t rc;
+                int64_t rc, timeout = 1000;
 
                 if (i == my_cpu)
                         continue;
@@ -204,6 +204,18 @@ static void pnv_kexec_wait_secondaries_down(void)
                                        i, paca[i].hw_cpu_id);
                                 notified = i;
                         }
+
+                        /*
+                         * On crash secondaries might be unreachable or hung,
+                         * so timeout if we've waited too long
+                         * */
+                        mdelay(1);
+                        if (timeout-- == 0) {
+                                printk(KERN_ERR "kexec: timed out waiting for "
+                                       "cpu %d (physical %d) to enter OPAL\n",
+                                       i, paca[i].hw_cpu_id);
+                                break;
+                        }
                 }
         }
 }
@@ -225,13 +237,6 @@ static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
 
                 /* Return the CPU to OPAL */
                 opal_return_cpu();
-        } else if (crash_shutdown) {
-                /*
-                 * On crash, we don't wait for secondaries to go
-                 * down as they might be unreachable or hung, so
-                 * instead we just wait a bit and move on.
-                 */
-                mdelay(1);
         } else {
                 /* Primary waits for the secondaries to have reached OPAL */
                 pnv_kexec_wait_secondaries_down();
diff --git a/arch/powerpc/platforms/ps3/Kconfig b/arch/powerpc/platforms/ps3/Kconfig
index 56f274064d6c..b27f40f26efc 100644
--- a/arch/powerpc/platforms/ps3/Kconfig
+++ b/arch/powerpc/platforms/ps3/Kconfig
@@ -1,6 +1,6 @@
 config PPC_PS3
         bool "Sony PS3"
-        depends on PPC64 && PPC_BOOK3S
+        depends on PPC64 && PPC_BOOK3S && CPU_BIG_ENDIAN
         select PPC_CELL
         select USB_OHCI_LITTLE_ENDIAN
         select USB_OHCI_BIG_ENDIAN_MMIO
diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig
index 54c87d5d349d..bec90fb30425 100644
--- a/arch/powerpc/platforms/pseries/Kconfig
+++ b/arch/powerpc/platforms/pseries/Kconfig
@@ -4,6 +4,7 @@ config PPC_PSERIES
         select HAVE_PCSPKR_PLATFORM
         select MPIC
         select OF_DYNAMIC
+        select PCI
         select PCI_MSI
         select PPC_XICS
         select PPC_ICP_NATIVE
@@ -15,7 +16,6 @@ config PPC_PSERIES
         select RTAS_ERROR_LOGGING
         select PPC_UDBG_16550
         select PPC_NATIVE
-        select PPC_PCI_CHOICE if EXPERT
         select PPC_DOORBELL
         select HAVE_CONTEXT_TRACKING
         select HOTPLUG_CPU if SMP
@@ -43,11 +43,6 @@ config DTL
 
           Say N if you are unsure.
 
-config PSERIES_MSI
-       bool
-       depends on PCI_MSI && PPC_PSERIES && EEH
-       default y
-
 config PSERIES_ENERGY
         tristate "pSeries energy management capabilities driver"
         depends on PPC_PSERIES
diff --git a/arch/powerpc/platforms/pseries/Makefile b/arch/powerpc/platforms/pseries/Makefile
index 03480796af9a..fedc2ccf029d 100644
--- a/arch/powerpc/platforms/pseries/Makefile
+++ b/arch/powerpc/platforms/pseries/Makefile
@@ -2,14 +2,13 @@ ccflags-$(CONFIG_PPC64)			:= $(NO_MINIMAL_TOC)
 ccflags-$(CONFIG_PPC_PSERIES_DEBUG)     += -DDEBUG
 
 obj-y                   := lpar.o hvCall.o nvram.o reconfig.o \
+                           of_helpers.o \
                            setup.o iommu.o event_sources.o ras.o \
-                           firmware.o power.o dlpar.o mobility.o rng.o
+                           firmware.o power.o dlpar.o mobility.o rng.o \
+                           pci.o pci_dlpar.o eeh_pseries.o msi.o
 obj-$(CONFIG_SMP)       += smp.o
 obj-$(CONFIG_SCANLOG)   += scanlog.o
-obj-$(CONFIG_EEH)       += eeh_pseries.o
 obj-$(CONFIG_KEXEC)     += kexec.o
-obj-$(CONFIG_PCI)       += pci.o pci_dlpar.o
-obj-$(CONFIG_PSERIES_MSI)       += msi.o
 obj-$(CONFIG_PSERIES_ENERGY)    += pseries_energy.o
 
 obj-$(CONFIG_HOTPLUG_CPU)       += hotplug-cpu.o
diff --git a/arch/powerpc/platforms/pseries/dlpar.c b/arch/powerpc/platforms/pseries/dlpar.c
index db17827eb746..f244dcb4f2cf 100644
--- a/arch/powerpc/platforms/pseries/dlpar.c
+++ b/arch/powerpc/platforms/pseries/dlpar.c
@@ -18,6 +18,8 @@
 #include <linux/cpu.h>
 #include <linux/slab.h>
 #include <linux/of.h>
+
+#include "of_helpers.h"
 #include "offline_states.h"
 #include "pseries.h"
 
@@ -244,36 +246,13 @@ cc_error:
         return first_dn;
 }
 
-static struct device_node *derive_parent(const char *path)
-{
-        struct device_node *parent;
-        char *last_slash;
-
-        last_slash = strrchr(path, '/');
-        if (last_slash == path) {
-                parent = of_find_node_by_path("/");
-        } else {
-                char *parent_path;
-                int parent_path_len = last_slash - path + 1;
-                parent_path = kmalloc(parent_path_len, GFP_KERNEL);
-                if (!parent_path)
-                        return NULL;
-
-                strlcpy(parent_path, path, parent_path_len);
-                parent = of_find_node_by_path(parent_path);
-                kfree(parent_path);
-        }
-
-        return parent;
-}
-
 int dlpar_attach_node(struct device_node *dn)
 {
         int rc;
 
-        dn->parent = derive_parent(dn->full_name);
-        if (!dn->parent)
-                return -ENOMEM;
+        dn->parent = pseries_of_derive_parent(dn->full_name);
+        if (IS_ERR(dn->parent))
+                return PTR_ERR(dn->parent);
 
         rc = of_attach_node(dn);
         if (rc) {
diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c
index 1ba55d0bb449..ac3ffd97e059 100644
--- a/arch/powerpc/platforms/pseries/eeh_pseries.c
+++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
@@ -433,42 +433,34 @@ static int pseries_eeh_get_state(struct eeh_pe *pe, int *state)
                 return ret;
 
         /* Parse the result out */
-        result = 0;
-        if (rets[1]) {
-                switch(rets[0]) {
-                case 0:
-                        result &= ~EEH_STATE_RESET_ACTIVE;
-                        result |= EEH_STATE_MMIO_ACTIVE;
-                        result |= EEH_STATE_DMA_ACTIVE;
-                        break;
-                case 1:
-                        result |= EEH_STATE_RESET_ACTIVE;
-                        result |= EEH_STATE_MMIO_ACTIVE;
-                        result |= EEH_STATE_DMA_ACTIVE;
-                        break;
-                case 2:
-                        result &= ~EEH_STATE_RESET_ACTIVE;
-                        result &= ~EEH_STATE_MMIO_ACTIVE;
-                        result &= ~EEH_STATE_DMA_ACTIVE;
-                        break;
-                case 4:
-                        result &= ~EEH_STATE_RESET_ACTIVE;
-                        result &= ~EEH_STATE_MMIO_ACTIVE;
-                        result &= ~EEH_STATE_DMA_ACTIVE;
-                        result |= EEH_STATE_MMIO_ENABLED;
-                        break;
-                case 5:
-                        if (rets[2]) {
-                                if (state) *state = rets[2];
-                                result = EEH_STATE_UNAVAILABLE;
-                        } else {
-                                result = EEH_STATE_NOT_SUPPORT;
-                        }
-                        break;
-                default:
+        if (!rets[1])
+                return EEH_STATE_NOT_SUPPORT;
+
+        switch(rets[0]) {
+        case 0:
+                result = EEH_STATE_MMIO_ACTIVE |
+                         EEH_STATE_DMA_ACTIVE;
+                break;
+        case 1:
+                result = EEH_STATE_RESET_ACTIVE |
+                         EEH_STATE_MMIO_ACTIVE  |
+                         EEH_STATE_DMA_ACTIVE;
+                break;
+        case 2:
+                result = 0;
+                break;
+        case 4:
+                result = EEH_STATE_MMIO_ENABLED;
+                break;
+        case 5:
+                if (rets[2]) {
+                        if (state) *state = rets[2];
+                        result = EEH_STATE_UNAVAILABLE;
+                } else {
                         result = EEH_STATE_NOT_SUPPORT;
                 }
-        } else {
+                break;
+        default:
                 result = EEH_STATE_NOT_SUPPORT;
         }
 
diff --git a/arch/powerpc/platforms/pseries/hvcserver.c b/arch/powerpc/platforms/pseries/hvcserver.c
index eedb64594dc5..94a6e5612b0d 100644
--- a/arch/powerpc/platforms/pseries/hvcserver.c
+++ b/arch/powerpc/platforms/pseries/hvcserver.c
@@ -142,11 +142,11 @@ int hvcs_get_partner_info(uint32_t unit_address, struct list_head *head,
         int more = 1;
         int retval;
 
-        memset(pi_buff, 0x00, PAGE_SIZE);
         /* invalid parameters */
         if (!head || !pi_buff)
                 return -EINVAL;
 
+        memset(pi_buff, 0x00, PAGE_SIZE);
         last_p_partition_ID = last_p_unit_address = ~0UL;
         INIT_LIST_HEAD(head);
 
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index 0946b98d75d4..bd98ce2be17b 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -532,7 +532,6 @@ static int tce_setrange_multi_pSeriesLP_walk(unsigned long start_pfn,
         return tce_setrange_multi_pSeriesLP(start_pfn, num_pfn, arg);
 }
 
-#ifdef CONFIG_PCI
 static void iommu_table_setparms(struct pci_controller *phb,
                                  struct device_node *dn,
                                  struct iommu_table *tbl)
@@ -1292,15 +1291,6 @@ static u64 dma_get_required_mask_pSeriesLP(struct device *dev)
         return dma_iommu_ops.get_required_mask(dev);
 }
 
-#else  /* CONFIG_PCI */
-#define pci_dma_bus_setup_pSeries       NULL
-#define pci_dma_dev_setup_pSeries       NULL
-#define pci_dma_bus_setup_pSeriesLP     NULL
-#define pci_dma_dev_setup_pSeriesLP     NULL
-#define dma_set_mask_pSeriesLP          NULL
-#define dma_get_required_mask_pSeriesLP NULL
-#endif /* !CONFIG_PCI */
-
 static int iommu_mem_notifier(struct notifier_block *nb, unsigned long action,
                 void *data)
 {
diff --git a/arch/powerpc/platforms/pseries/of_helpers.c b/arch/powerpc/platforms/pseries/of_helpers.c
new file mode 100644
index 000000000000..2798933c0e38
--- /dev/null
+++ b/arch/powerpc/platforms/pseries/of_helpers.c
@@ -0,0 +1,38 @@
+#include <linux/string.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/of.h>
+
+#include "of_helpers.h"
+
+/**
+ * pseries_of_derive_parent - basically like dirname(1)
+ * @path:  the full_name of a node to be added to the tree
+ *
+ * Returns the node which should be the parent of the node
+ * described by path.  E.g., for path = "/foo/bar", returns
+ * the node with full_name = "/foo".
+ */
+struct device_node *pseries_of_derive_parent(const char *path)
+{
+        struct device_node *parent;
+        char *parent_path = "/";
+        const char *tail;
+
+        /* We do not want the trailing '/' character */
+        tail = kbasename(path) - 1;
+
+        /* reject if path is "/" */
+        if (!strcmp(path, "/"))
+                return ERR_PTR(-EINVAL);
+
+        if (tail > path) {
+                parent_path = kstrndup(path, tail - path, GFP_KERNEL);
+                if (!parent_path)
+                        return ERR_PTR(-ENOMEM);
+        }
+        parent = of_find_node_by_path(parent_path);
+        if (strcmp(parent_path, "/"))
+                kfree(parent_path);
+        return parent ? parent : ERR_PTR(-EINVAL);
+}
diff --git a/arch/powerpc/platforms/pseries/of_helpers.h b/arch/powerpc/platforms/pseries/of_helpers.h
new file mode 100644
index 000000000000..bb83d39aef65
--- /dev/null
+++ b/arch/powerpc/platforms/pseries/of_helpers.h
@@ -0,0 +1,8 @@
+#ifndef _PSERIES_OF_HELPERS_H
+#define _PSERIES_OF_HELPERS_H
+
+#include <linux/of.h>
+
+struct device_node *pseries_of_derive_parent(const char *path);
+
+#endif /* _PSERIES_OF_HELPERS_H */
diff --git a/arch/powerpc/platforms/pseries/reconfig.c b/arch/powerpc/platforms/pseries/reconfig.c
index 0f319521e002..7c7fcc042549 100644
--- a/arch/powerpc/platforms/pseries/reconfig.c
+++ b/arch/powerpc/platforms/pseries/reconfig.c
@@ -22,37 +22,7 @@
 #include <asm/uaccess.h>
 #include <asm/mmu.h>
 
-/**
- *      derive_parent - basically like dirname(1)
- *      @path:  the full_name of a node to be added to the tree
- *
- *      Returns the node which should be the parent of the node
- *      described by path.  E.g., for path = "/foo/bar", returns
- *      the node with full_name = "/foo".
- */
-static struct device_node *derive_parent(const char *path)
-{
-        struct device_node *parent = NULL;
-        char *parent_path = "/";
-        size_t parent_path_len = strrchr(path, '/') - path + 1;
-
-        /* reject if path is "/" */
-        if (!strcmp(path, "/"))
-                return ERR_PTR(-EINVAL);
-
-        if (strrchr(path, '/') != path) {
-                parent_path = kmalloc(parent_path_len, GFP_KERNEL);
-                if (!parent_path)
-                        return ERR_PTR(-ENOMEM);
-                strlcpy(parent_path, path, parent_path_len);
-        }
-        parent = of_find_node_by_path(parent_path);
-        if (!parent)
-                return ERR_PTR(-EINVAL);
-        if (strcmp(parent_path, "/"))
-                kfree(parent_path);
-        return parent;
-}
+#include "of_helpers.h"
 
 static int pSeries_reconfig_add_node(const char *path, struct property *proplist)
 {
@@ -71,7 +41,7 @@ static int pSeries_reconfig_add_node(const char *path, struct property *proplist
         of_node_set_flag(np, OF_DYNAMIC);
         of_node_init(np);
 
-        np->parent = derive_parent(path);
+        np->parent = pseries_of_derive_parent(path);
         if (IS_ERR(np->parent)) {
                 err = PTR_ERR(np->parent);
                 goto out_err;
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index 9a83eb71b030..9e524c26db14 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -837,10 +837,6 @@ static int pSeries_pci_probe_mode(struct pci_bus *bus)
         return PCI_PROBE_NORMAL;
 }
 
-#ifndef CONFIG_PCI
-void pSeries_final_fixup(void) { }
-#endif
-
 struct pci_controller_ops pseries_pci_controller_ops = {
         .probe_mode             = pSeries_pci_probe_mode,
 };
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c
index e2ea51961979..e00a5ee58fd7 100644
--- a/arch/powerpc/sysdev/cpm_common.c
+++ b/arch/powerpc/sysdev/cpm_common.c
@@ -147,7 +147,8 @@ unsigned long cpm_muram_alloc(unsigned long size, unsigned long align)
         spin_lock_irqsave(&cpm_muram_lock, flags);
         cpm_muram_info.alignment = align;
         start = rh_alloc(&cpm_muram_info, size, "commproc");
-        memset_io(cpm_muram_addr(start), 0, size);
+        if (!IS_ERR_VALUE(start))
+                memset_io(cpm_muram_addr(start), 0, size);
         spin_unlock_irqrestore(&cpm_muram_lock, flags);
 
         return start;
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 13b9bcf5485e..610f472f91d1 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -179,6 +179,19 @@ static int setup_one_atmu(struct ccsr_pci __iomem *pci,
         return i;
 }
 
+static bool is_kdump(void)
+{
+        struct device_node *node;
+
+        node = of_find_node_by_type(NULL, "memory");
+        if (!node) {
+                WARN_ON_ONCE(1);
+                return false;
+        }
+
+        return of_property_read_bool(node, "linux,usable-memory");
+}
+
 /* atmu setup for fsl pci/pcie controller */
 static void setup_pci_atmu(struct pci_controller *hose)
 {
@@ -192,6 +205,16 @@ static void setup_pci_atmu(struct pci_controller *hose)
         const char *name = hose->dn->full_name;
         const u64 *reg;
         int len;
+        bool setup_inbound;
+
+        /*
+         * If this is kdump, we don't want to trigger a bunch of PCI
+         * errors by closing the window on in-flight DMA.
+         *
+         * We still run most of the function's logic so that things like
+         * hose->dma_window_size still get set.
+         */
+        setup_inbound = !is_kdump();
 
         if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) {
                 if (in_be32(&pci->block_rev1) >= PCIE_IP_REV_2_2) {
@@ -204,8 +227,11 @@ static void setup_pci_atmu(struct pci_controller *hose)
         /* Disable all windows (except powar0 since it's ignored) */
         for(i = 1; i < 5; i++)
                 out_be32(&pci->pow[i].powar, 0);
-        for (i = start_idx; i < end_idx; i++)
-                out_be32(&pci->piw[i].piwar, 0);
+
+        if (setup_inbound) {
+                for (i = start_idx; i < end_idx; i++)
+                        out_be32(&pci->piw[i].piwar, 0);
+        }
 
         /* Setup outbound MEM window */
         for(i = 0, j = 1; i < 3; i++) {
@@ -278,6 +304,7 @@ static void setup_pci_atmu(struct pci_controller *hose)
 
         /* Setup inbound mem window */
         mem = memblock_end_of_DRAM();
+        pr_info("%s: end of DRAM %llx\n", __func__, mem);
 
         /*
          * The msi-address-64 property, if it exists, indicates the physical
@@ -320,12 +347,14 @@ static void setup_pci_atmu(struct pci_controller *hose)
 
                 piwar |= ((mem_log - 1) & PIWAR_SZ_MASK);
 
-                /* Setup inbound memory window */
-                out_be32(&pci->piw[win_idx].pitar,  0x00000000);
-                out_be32(&pci->piw[win_idx].piwbar, 0x00000000);
-                out_be32(&pci->piw[win_idx].piwar,  piwar);
-                win_idx--;
+                if (setup_inbound) {
+                        /* Setup inbound memory window */
+                        out_be32(&pci->piw[win_idx].pitar,  0x00000000);
+                        out_be32(&pci->piw[win_idx].piwbar, 0x00000000);
+                        out_be32(&pci->piw[win_idx].piwar,  piwar);
+                }
 
+                win_idx--;
                 hose->dma_window_base_cur = 0x00000000;
                 hose->dma_window_size = (resource_size_t)sz;
 
@@ -343,13 +372,15 @@ static void setup_pci_atmu(struct pci_controller *hose)
 
                         piwar = (piwar & ~PIWAR_SZ_MASK) | (mem_log - 1);
 
-                        /* Setup inbound memory window */
-                        out_be32(&pci->piw[win_idx].pitar,  0x00000000);
-                        out_be32(&pci->piw[win_idx].piwbear,
-                                        pci64_dma_offset >> 44);
-                        out_be32(&pci->piw[win_idx].piwbar,
-                                        pci64_dma_offset >> 12);
-                        out_be32(&pci->piw[win_idx].piwar,  piwar);
+                        if (setup_inbound) {
+                                /* Setup inbound memory window */
+                                out_be32(&pci->piw[win_idx].pitar,  0x00000000);
+                                out_be32(&pci->piw[win_idx].piwbear,
+                                                pci64_dma_offset >> 44);
+                                out_be32(&pci->piw[win_idx].piwbar,
+                                                pci64_dma_offset >> 12);
+                                out_be32(&pci->piw[win_idx].piwar,  piwar);
+                        }
 
                         /*
                          * install our own dma_set_mask handler to fixup dma_ops
@@ -362,12 +393,15 @@ static void setup_pci_atmu(struct pci_controller *hose)
         } else {
                 u64 paddr = 0;
 
-                /* Setup inbound memory window */
-                out_be32(&pci->piw[win_idx].pitar,  paddr >> 12);
-                out_be32(&pci->piw[win_idx].piwbar, paddr >> 12);
-                out_be32(&pci->piw[win_idx].piwar,  (piwar | (mem_log - 1)));
-                win_idx--;
+                if (setup_inbound) {
+                        /* Setup inbound memory window */
+                        out_be32(&pci->piw[win_idx].pitar,  paddr >> 12);
+                        out_be32(&pci->piw[win_idx].piwbar, paddr >> 12);
+                        out_be32(&pci->piw[win_idx].piwar,
+                                 (piwar | (mem_log - 1)));
+                }
 
+                win_idx--;
                 paddr += 1ull << mem_log;
                 sz -= 1ull << mem_log;
 
@@ -375,11 +409,15 @@ static void setup_pci_atmu(struct pci_controller *hose)
                         mem_log = ilog2(sz);
                         piwar |= (mem_log - 1);
 
-                        out_be32(&pci->piw[win_idx].pitar,  paddr >> 12);
-                        out_be32(&pci->piw[win_idx].piwbar, paddr >> 12);
-                        out_be32(&pci->piw[win_idx].piwar,  piwar);
-                        win_idx--;
+                        if (setup_inbound) {
+                                out_be32(&pci->piw[win_idx].pitar,
+                                         paddr >> 12);
+                                out_be32(&pci->piw[win_idx].piwbar,
+                                         paddr >> 12);
+                                out_be32(&pci->piw[win_idx].piwar, piwar);
+                        }
 
+                        win_idx--;
                         paddr += 1ull << mem_log;
                 }
 
@@ -1002,7 +1040,7 @@ int fsl_pci_mcheck_exception(struct pt_regs *regs)
                         ret = probe_kernel_address((void *)regs->nip, inst);
                 }
 
-                if (mcheck_handle_load(regs, inst)) {
+                if (!ret && mcheck_handle_load(regs, inst)) {
                         regs->nip += 4;
                         return 1;
                 }
diff --git a/arch/powerpc/sysdev/mpc5xxx_clocks.c b/arch/powerpc/sysdev/mpc5xxx_clocks.c
index f4f0301b9a60..573292663cf2 100644
--- a/arch/powerpc/sysdev/mpc5xxx_clocks.c
+++ b/arch/powerpc/sysdev/mpc5xxx_clocks.c
@@ -13,7 +13,6 @@
 
 unsigned long mpc5xxx_get_bus_frequency(struct device_node *node)
 {
-        struct device_node *np;
         const unsigned int *p_bus_freq = NULL;
 
         of_node_get(node);
@@ -22,9 +21,7 @@ unsigned long mpc5xxx_get_bus_frequency(struct device_node *node)
                 if (p_bus_freq)
                         break;
 
-                np = of_get_parent(node);
-                of_node_put(node);
-                node = np;
+                node = of_get_next_parent(node);
         }
         of_node_put(node);
 
diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c
index 9a423975853a..b7cf7abff2eb 100644
--- a/arch/powerpc/sysdev/mpc8xx_pic.c
+++ b/arch/powerpc/sysdev/mpc8xx_pic.c
@@ -61,7 +61,7 @@ static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type)
 }
 
 static struct irq_chip mpc8xx_pic = {
-        .name = "MPC8XX SIU",
+        .name = "8XX SIU",
         .irq_unmask = mpc8xx_unmask_irq,
         .irq_mask = mpc8xx_mask_irq,
         .irq_ack = mpc8xx_ack,
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index cecd1156c185..2a0452e364ba 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -924,22 +924,6 @@ int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type)
         return IRQ_SET_MASK_OK_NOCOPY;
 }
 
-static int mpic_irq_set_wake(struct irq_data *d, unsigned int on)
-{
-        struct irq_desc *desc = container_of(d, struct irq_desc, irq_data);
-        struct mpic *mpic = mpic_from_irq_data(d);
-
-        if (!(mpic->flags & MPIC_FSL))
-                return -ENXIO;
-
-        if (on)
-                desc->action->flags |= IRQF_NO_SUSPEND;
-        else
-                desc->action->flags &= ~IRQF_NO_SUSPEND;
-
-        return 0;
-}
-
 void mpic_set_vector(unsigned int virq, unsigned int vector)
 {
         struct mpic *mpic = mpic_from_irq(virq);
@@ -977,7 +961,6 @@ static struct irq_chip mpic_irq_chip = {
         .irq_unmask     = mpic_unmask_irq,
         .irq_eoi        = mpic_end_irq,
         .irq_set_type   = mpic_set_irq_type,
-        .irq_set_wake   = mpic_irq_set_wake,
 };
 
 #ifdef CONFIG_SMP
@@ -992,7 +975,6 @@ static struct irq_chip mpic_tm_chip = {
         .irq_mask       = mpic_mask_tm,
         .irq_unmask     = mpic_unmask_tm,
         .irq_eoi        = mpic_end_irq,
-        .irq_set_wake   = mpic_irq_set_wake,
 };
 
 #ifdef CONFIG_MPIC_U3_HT_IRQS
@@ -1284,8 +1266,11 @@ struct mpic * __init mpic_alloc(struct device_node *node,
                 flags |= MPIC_NO_RESET;
         if (of_get_property(node, "single-cpu-affinity", NULL))
                 flags |= MPIC_SINGLE_DEST_CPU;
-        if (of_device_is_compatible(node, "fsl,mpic"))
+        if (of_device_is_compatible(node, "fsl,mpic")) {
                 flags |= MPIC_FSL | MPIC_LARGE_VECTORS;
+                mpic_irq_chip.flags |= IRQCHIP_SKIP_SET_WAKE;
+                mpic_tm_chip.flags |= IRQCHIP_SKIP_SET_WAKE;
+        }
 
         mpic = kzalloc(sizeof(struct mpic), GFP_KERNEL);
         if (mpic == NULL)
diff --git a/arch/powerpc/sysdev/msi_bitmap.c b/arch/powerpc/sysdev/msi_bitmap.c
index 73b64c73505b..ed5234ed8d3f 100644
--- a/arch/powerpc/sysdev/msi_bitmap.c
+++ b/arch/powerpc/sysdev/msi_bitmap.c
@@ -11,6 +11,7 @@
 #include <linux/slab.h>
 #include <linux/kernel.h>
 #include <linux/bitmap.h>
+#include <linux/bootmem.h>
 #include <asm/msi_bitmap.h>
 #include <asm/setup.h>
 
@@ -111,7 +112,7 @@ int msi_bitmap_reserve_dt_hwirqs(struct msi_bitmap *bmp)
         return 0;
 }
 
-int msi_bitmap_alloc(struct msi_bitmap *bmp, unsigned int irq_count,
+int __init_refok msi_bitmap_alloc(struct msi_bitmap *bmp, unsigned int irq_count,
                      struct device_node *of_node)
 {
         int size;
@@ -122,7 +123,15 @@ int msi_bitmap_alloc(struct msi_bitmap *bmp, unsigned int irq_count,
         size = BITS_TO_LONGS(irq_count) * sizeof(long);
         pr_debug("msi_bitmap: allocator bitmap size is 0x%x bytes\n", size);
 
-        bmp->bitmap = zalloc_maybe_bootmem(size, GFP_KERNEL);
+        bmp->bitmap_from_slab = slab_is_available();
+        if (bmp->bitmap_from_slab)
+                bmp->bitmap = kzalloc(size, GFP_KERNEL);
+        else {
+                bmp->bitmap = memblock_virt_alloc(size, 0);
+                /* the bitmap won't be freed from memblock allocator */
+                kmemleak_not_leak(bmp->bitmap);
+        }
+
         if (!bmp->bitmap) {
                 pr_debug("msi_bitmap: ENOMEM allocating allocator bitmap!\n");
                 return -ENOMEM;
@@ -138,7 +147,8 @@ int msi_bitmap_alloc(struct msi_bitmap *bmp, unsigned int irq_count,
 
 void msi_bitmap_free(struct msi_bitmap *bmp)
 {
-        /* we can't free the bitmap we don't know if it's bootmem etc. */
+        if (bmp->bitmap_from_slab)
+                kfree(bmp->bitmap);
         of_node_put(bmp->of_node);
         bmp->bitmap = NULL;
 }
@@ -203,8 +213,6 @@ static void __init test_basics(void)
 
         /* Clients may WARN_ON bitmap == NULL for "not-allocated" */
         WARN_ON(bmp.bitmap != NULL);
-
-        kfree(bmp.bitmap);
 }
 
 static void __init test_of_node(void)
diff --git a/arch/powerpc/xmon/nonstdio.c b/arch/powerpc/xmon/nonstdio.c
index c98748617896..d00123421e00 100644
--- a/arch/powerpc/xmon/nonstdio.c
+++ b/arch/powerpc/xmon/nonstdio.c
@@ -11,10 +11,25 @@
 #include <asm/time.h>
 #include "nonstdio.h"
 
+static bool paginating, paginate_skipping;
+static unsigned long paginate_lpp; /* Lines Per Page */
+static unsigned long paginate_pos;
 
-static int xmon_write(const void *ptr, int nb)
+void xmon_start_pagination(void)
 {
-        return udbg_write(ptr, nb);
+        paginating = true;
+        paginate_skipping = false;
+        paginate_pos = 0;
+}
+
+void xmon_end_pagination(void)
+{
+        paginating = false;
+}
+
+void xmon_set_pagination_lpp(unsigned long lpp)
+{
+        paginate_lpp = lpp;
 }
 
 static int xmon_readchar(void)
@@ -24,6 +39,51 @@ static int xmon_readchar(void)
         return -1;
 }
 
+static int xmon_write(const char *ptr, int nb)
+{
+        int rv = 0;
+        const char *p = ptr, *q;
+        const char msg[] = "[Hit a key (a:all, q:truncate, any:next page)]";
+
+        if (nb <= 0)
+                return rv;
+
+        if (paginating && paginate_skipping)
+                return nb;
+
+        if (paginate_lpp) {
+                while (paginating && (q = strchr(p, '\n'))) {
+                        rv += udbg_write(p, q - p + 1);
+                        p = q + 1;
+                        paginate_pos++;
+
+                        if (paginate_pos >= paginate_lpp) {
+                                udbg_write(msg, strlen(msg));
+
+                                switch (xmon_readchar()) {
+                                case 'a':
+                                        paginating = false;
+                                        break;
+                                case 'q':
+                                        paginate_skipping = true;
+                                        break;
+                                default:
+                                        /* nothing */
+                                        break;
+                                }
+
+                                paginate_pos = 0;
+                                udbg_write("\r\n", 2);
+
+                                if (paginate_skipping)
+                                        return nb;
+                        }
+                }
+        }
+
+        return rv + udbg_write(p, nb - (p - ptr));
+}
+
 int xmon_putchar(int c)
 {
         char ch = c;
diff --git a/arch/powerpc/xmon/nonstdio.h b/arch/powerpc/xmon/nonstdio.h
index 18a51ded4ffd..f8653365667e 100644
--- a/arch/powerpc/xmon/nonstdio.h
+++ b/arch/powerpc/xmon/nonstdio.h
@@ -3,6 +3,9 @@
 #define printf  xmon_printf
 #define putchar xmon_putchar
 
+extern void xmon_set_pagination_lpp(unsigned long lpp);
+extern void xmon_start_pagination(void);
+extern void xmon_end_pagination(void);
 extern int xmon_putchar(int c);
 extern void xmon_puts(const char *);
 extern char *xmon_gets(char *, int);
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 6ef1231c6e9c..786bf01691c9 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -242,6 +242,7 @@ Commands:\n\
 "  u    dump TLB\n"
 #endif
 "  ?    help\n"
+"  # n  limit output to n lines per page (for dp, dpa, dl)\n"
 "  zr   reboot\n\
   zh    halt\n"
 ;
@@ -833,6 +834,16 @@ static void remove_cpu_bpts(void)
         write_ciabr(0);
 }
 
+static void set_lpp_cmd(void)
+{
+        unsigned long lpp;
+
+        if (!scanhex(&lpp)) {
+                printf("Invalid number.\n");
+                lpp = 0;
+        }
+        xmon_set_pagination_lpp(lpp);
+}
 /* Command interpreting routine */
 static char *last_cmd;
 
@@ -924,6 +935,9 @@ cmds(struct pt_regs *excp)
                 case '?':
                         xmon_puts(help_string);
                         break;
+                case '#':
+                        set_lpp_cmd();
+                        break;
                 case 'b':
                         bpt_cmds();
                         break;
@@ -2072,6 +2086,9 @@ static void xmon_rawdump (unsigned long adrs, long ndump)
 static void dump_one_paca(int cpu)
 {
         struct paca_struct *p;
+#ifdef CONFIG_PPC_STD_MMU_64
+        int i = 0;
+#endif
 
         if (setjmp(bus_error_jmp) != 0) {
                 printf("*** Error dumping paca for cpu 0x%x!\n", cpu);
@@ -2085,12 +2102,12 @@ static void dump_one_paca(int cpu)
 
         printf("paca for cpu 0x%x @ %p:\n", cpu, p);
 
-        printf(" %-*s = %s\n", 16, "possible", cpu_possible(cpu) ? "yes" : "no");
-        printf(" %-*s = %s\n", 16, "present", cpu_present(cpu) ? "yes" : "no");
-        printf(" %-*s = %s\n", 16, "online", cpu_online(cpu) ? "yes" : "no");
+        printf(" %-*s = %s\n", 20, "possible", cpu_possible(cpu) ? "yes" : "no");
+        printf(" %-*s = %s\n", 20, "present", cpu_present(cpu) ? "yes" : "no");
+        printf(" %-*s = %s\n", 20, "online", cpu_online(cpu) ? "yes" : "no");
 
 #define DUMP(paca, name, format) \
-        printf(" %-*s = %#-*"format"\t(0x%lx)\n", 16, #name, 18, paca->name, \
+        printf(" %-*s = %#-*"format"\t(0x%lx)\n", 20, #name, 18, paca->name, \
                 offsetof(struct paca_struct, name));
 
         DUMP(p, lock_token, "x");
@@ -2102,11 +2119,41 @@ static void dump_one_paca(int cpu)
 #ifdef CONFIG_PPC_BOOK3S_64
         DUMP(p, mc_emergency_sp, "p");
         DUMP(p, in_mce, "x");
+        DUMP(p, hmi_event_available, "x");
 #endif
         DUMP(p, data_offset, "lx");
         DUMP(p, hw_cpu_id, "x");
         DUMP(p, cpu_start, "x");
         DUMP(p, kexec_state, "x");
+#ifdef CONFIG_PPC_STD_MMU_64
+        for (i = 0; i < SLB_NUM_BOLTED; i++) {
+                u64 esid, vsid;
+
+                if (!p->slb_shadow_ptr)
+                        continue;
+
+                esid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].esid);
+                vsid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].vsid);
+
+                if (esid || vsid) {
+                        printf(" slb_shadow[%d]:       = 0x%016lx 0x%016lx\n",
+                                i, esid, vsid);
+                }
+        }
+        DUMP(p, vmalloc_sllp, "x");
+        DUMP(p, slb_cache_ptr, "x");
+        for (i = 0; i < SLB_CACHE_ENTRIES; i++)
+                printf(" slb_cache[%d]:        = 0x%016lx\n", i, p->slb_cache[i]);
+#endif
+        DUMP(p, dscr_default, "llx");
+#ifdef CONFIG_PPC_BOOK3E
+        DUMP(p, pgd, "p");
+        DUMP(p, kernel_pgd, "p");
+        DUMP(p, tcd_ptr, "p");
+        DUMP(p, mc_kstack, "p");
+        DUMP(p, crit_kstack, "p");
+        DUMP(p, dbg_kstack, "p");
+#endif
         DUMP(p, __current, "p");
         DUMP(p, kstack, "lx");
         DUMP(p, stab_rr, "lx");
@@ -2117,7 +2164,27 @@ static void dump_one_paca(int cpu)
         DUMP(p, io_sync, "x");
         DUMP(p, irq_work_pending, "x");
         DUMP(p, nap_state_lost, "x");
+        DUMP(p, sprg_vdso, "llx");
+
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+        DUMP(p, tm_scratch, "llx");
+#endif
+
+#ifdef CONFIG_PPC_POWERNV
+        DUMP(p, core_idle_state_ptr, "p");
+        DUMP(p, thread_idle_state, "x");
+        DUMP(p, thread_mask, "x");
+        DUMP(p, subcore_sibling_mask, "x");
+#endif
 
+        DUMP(p, user_time, "llx");
+        DUMP(p, system_time, "llx");
+        DUMP(p, user_time_scaled, "llx");
+        DUMP(p, starttime, "llx");
+        DUMP(p, starttime_user, "llx");
+        DUMP(p, startspurr, "llx");
+        DUMP(p, utime_sspurr, "llx");
+        DUMP(p, stolen_time, "llx");
 #undef DUMP
 
         catch_memory_errors = 0;
@@ -2166,7 +2233,9 @@ dump(void)
 
 #ifdef CONFIG_PPC64
         if (c == 'p') {
+                xmon_start_pagination();
                 dump_pacas();
+                xmon_end_pagination();
                 return;
         }
 #endif
@@ -2315,10 +2384,12 @@ dump_log_buf(void)
         sync();
 
         kmsg_dump_rewind_nolock(&dumper);
+        xmon_start_pagination();
         while (kmsg_dump_get_line_nolock(&dumper, false, buf, sizeof(buf), &len)) {
                 buf[len] = '\0';
                 printf("%s", buf);
         }
+        xmon_end_pagination();
 
         sync();
         /* wait a little while to see if we get a machine check */
diff --git a/drivers/char/agp/uninorth-agp.c b/drivers/char/agp/uninorth-agp.c
index a56ee9bedd11..05755441250c 100644
--- a/drivers/char/agp/uninorth-agp.c
+++ b/drivers/char/agp/uninorth-agp.c
@@ -361,6 +361,10 @@ static int agp_uninorth_resume(struct pci_dev *pdev)
 }
 #endif /* CONFIG_PM */
 
+static struct {
+        struct page **pages_arr;
+} uninorth_priv;
+
 static int uninorth_create_gatt_table(struct agp_bridge_data *bridge)
 {
         char *table;
@@ -371,7 +375,6 @@ static int uninorth_create_gatt_table(struct agp_bridge_data *bridge)
         int i;
         void *temp;
         struct page *page;
-        struct page **pages;
 
         /* We can't handle 2 level gatt's */
         if (bridge->driver->size_type == LVL2_APER_SIZE)
@@ -400,8 +403,8 @@ static int uninorth_create_gatt_table(struct agp_bridge_data *bridge)
         if (table == NULL)
                 return -ENOMEM;
 
-        pages = kmalloc((1 << page_order) * sizeof(struct page*), GFP_KERNEL);
-        if (pages == NULL)
+        uninorth_priv.pages_arr = kmalloc((1 << page_order) * sizeof(struct page*), GFP_KERNEL);
+        if (uninorth_priv.pages_arr == NULL)
                 goto enomem;
 
         table_end = table + ((PAGE_SIZE * (1 << page_order)) - 1);
@@ -409,14 +412,14 @@ static int uninorth_create_gatt_table(struct agp_bridge_data *bridge)
         for (page = virt_to_page(table), i = 0; page <= virt_to_page(table_end);
              page++, i++) {
                 SetPageReserved(page);
-                pages[i] = page;
+                uninorth_priv.pages_arr[i] = page;
         }
 
         bridge->gatt_table_real = (u32 *) table;
         /* Need to clear out any dirty data still sitting in caches */
         flush_dcache_range((unsigned long)table,
                            (unsigned long)table_end + 1);
-        bridge->gatt_table = vmap(pages, (1 << page_order), 0, PAGE_KERNEL_NCG);
+        bridge->gatt_table = vmap(uninorth_priv.pages_arr, (1 << page_order), 0, PAGE_KERNEL_NCG);
 
         if (bridge->gatt_table == NULL)
                 goto enomem;
@@ -434,7 +437,7 @@ static int uninorth_create_gatt_table(struct agp_bridge_data *bridge)
         return 0;
 
 enomem:
-        kfree(pages);
+        kfree(uninorth_priv.pages_arr);
         if (table)
                 free_pages((unsigned long)table, page_order);
         return -ENOMEM;
@@ -456,6 +459,7 @@ static int uninorth_free_gatt_table(struct agp_bridge_data *bridge)
          */
 
         vunmap(bridge->gatt_table);
+        kfree(uninorth_priv.pages_arr);
         table = (char *) bridge->gatt_table_real;
         table_end = table + ((PAGE_SIZE * (1 << page_order)) - 1);
 
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 57316528e924..7a1ab24052b8 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -132,7 +132,7 @@ config COMMON_CLK_AXI_CLKGEN
 
 config CLK_QORIQ
         bool "Clock driver for Freescale QorIQ platforms"
-        depends on (PPC_E500MC || ARM || COMPILE_TEST) && OF
+        depends on (PPC_E500MC || ARM || ARM64 || COMPILE_TEST) && OF
         ---help---
           This adds the clock driver support for Freescale QorIQ platforms
           using common clock framework.
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index cda90a971e39..1ab0fb81c6a0 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -10,7 +10,9 @@
 
 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 
+#include <linux/clk.h>
 #include <linux/clk-provider.h>
+#include <linux/fsl/guts.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
@@ -19,213 +21,1029 @@
 #include <linux/of.h>
 #include <linux/slab.h>
 
-struct cmux_clk {
+#define PLL_DIV1        0
+#define PLL_DIV2        1
+#define PLL_DIV3        2
+#define PLL_DIV4        3
+
+#define PLATFORM_PLL    0
+#define CGA_PLL1        1
+#define CGA_PLL2        2
+#define CGA_PLL3        3
+#define CGA_PLL4        4       /* only on clockgen-1.0, which lacks CGB */
+#define CGB_PLL1        4
+#define CGB_PLL2        5
+
+struct clockgen_pll_div {
+        struct clk *clk;
+        char name[32];
+};
+
+struct clockgen_pll {
+        struct clockgen_pll_div div[4];
+};
+
+#define CLKSEL_VALID    1
+#define CLKSEL_80PCT    2       /* Only allowed if PLL <= 80% of max cpu freq */
+
+struct clockgen_sourceinfo {
+        u32 flags;      /* CLKSEL_xxx */
+        int pll;        /* CGx_PLLn */
+        int div;        /* PLL_DIVn */
+};
+
+#define NUM_MUX_PARENTS 16
+
+struct clockgen_muxinfo {
+        struct clockgen_sourceinfo clksel[NUM_MUX_PARENTS];
+};
+
+#define NUM_HWACCEL     5
+#define NUM_CMUX        8
+
+struct clockgen;
+
+/*
+ * cmux freq must be >= platform pll.
+ * If not set, cmux freq must be >= platform pll/2
+ */
+#define CG_CMUX_GE_PLAT         1
+
+#define CG_PLL_8BIT             2       /* PLLCnGSR[CFG] is 8 bits, not 6 */
+#define CG_VER3                 4       /* version 3 cg: reg layout different */
+#define CG_LITTLE_ENDIAN        8
+
+struct clockgen_chipinfo {
+        const char *compat, *guts_compat;
+        const struct clockgen_muxinfo *cmux_groups[2];
+        const struct clockgen_muxinfo *hwaccel[NUM_HWACCEL];
+        void (*init_periph)(struct clockgen *cg);
+        int cmux_to_group[NUM_CMUX]; /* -1 terminates if fewer than NUM_CMUX */
+        u32 pll_mask;   /* 1 << n bit set if PLL n is valid */
+        u32 flags;      /* CG_xxx */
+};
+
+struct clockgen {
+        struct device_node *node;
+        void __iomem *regs;
+        struct clockgen_chipinfo info; /* mutable copy */
+        struct clk *sysclk;
+        struct clockgen_pll pll[6];
+        struct clk *cmux[NUM_CMUX];
+        struct clk *hwaccel[NUM_HWACCEL];
+        struct clk *fman[2];
+        struct ccsr_guts __iomem *guts;
+};
+
+static struct clockgen clockgen;
+
+static void cg_out(struct clockgen *cg, u32 val, u32 __iomem *reg)
+{
+        if (cg->info.flags & CG_LITTLE_ENDIAN)
+                iowrite32(val, reg);
+        else
+                iowrite32be(val, reg);
+}
+
+static u32 cg_in(struct clockgen *cg, u32 __iomem *reg)
+{
+        u32 val;
+
+        if (cg->info.flags & CG_LITTLE_ENDIAN)
+                val = ioread32(reg);
+        else
+                val = ioread32be(reg);
+
+        return val;
+}
+
+static const struct clockgen_muxinfo p2041_cmux_grp1 = {
+        {
+                [0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
+                [1] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
+                [4] = { CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
+        }
+};
+
+static const struct clockgen_muxinfo p2041_cmux_grp2 = {
+        {
+                [0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
+                [4] = { CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
+                [5] = { CLKSEL_VALID, CGA_PLL2, PLL_DIV2 },
+        }
+};
+
+static const struct clockgen_muxinfo p5020_cmux_grp1 = {
+        {
+                [0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
+                [1] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
+                [4] = { CLKSEL_VALID | CLKSEL_80PCT, CGA_PLL2, PLL_DIV1 },
+        }
+};
+
+static const struct clockgen_muxinfo p5020_cmux_grp2 = {
+        {
+                [0] = { CLKSEL_VALID | CLKSEL_80PCT, CGA_PLL1, PLL_DIV1 },
+                [4] = { CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
+                [5] = { CLKSEL_VALID, CGA_PLL2, PLL_DIV2 },
+        }
+};
+
+static const struct clockgen_muxinfo p5040_cmux_grp1 = {
+        {
+                [0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
+                [1] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
+                [4] = { CLKSEL_VALID | CLKSEL_80PCT, CGA_PLL2, PLL_DIV1 },
+                [5] = { CLKSEL_VALID | CLKSEL_80PCT, CGA_PLL2, PLL_DIV2 },
+        }
+};
+
+static const struct clockgen_muxinfo p5040_cmux_grp2 = {
+        {
+                [0] = { CLKSEL_VALID | CLKSEL_80PCT, CGA_PLL1, PLL_DIV1 },
+                [1] = { CLKSEL_VALID | CLKSEL_80PCT, CGA_PLL1, PLL_DIV2 },
+                [4] = { CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
+                [5] = { CLKSEL_VALID, CGA_PLL2, PLL_DIV2 },
+        }
+};
+
+static const struct clockgen_muxinfo p4080_cmux_grp1 = {
+        {
+                [0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
+                [1] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
+                [4] = { CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
+                [5] = { CLKSEL_VALID, CGA_PLL2, PLL_DIV2 },
+                [8] = { CLKSEL_VALID | CLKSEL_80PCT, CGA_PLL3, PLL_DIV1 },
+        }
+};
+
+static const struct clockgen_muxinfo p4080_cmux_grp2 = {
+        {
+                [0] = { CLKSEL_VALID | CLKSEL_80PCT, CGA_PLL1, PLL_DIV1 },
+                [8] = { CLKSEL_VALID, CGA_PLL3, PLL_DIV1 },
+                [9] = { CLKSEL_VALID, CGA_PLL3, PLL_DIV2 },
+                [12] = { CLKSEL_VALID, CGA_PLL4, PLL_DIV1 },
+                [13] = { CLKSEL_VALID, CGA_PLL4, PLL_DIV2 },
+        }
+};
+
+static const struct clockgen_muxinfo t1023_cmux = {
+        {
+                [0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
+                [1] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
+        }
+};
+
+static const struct clockgen_muxinfo t1040_cmux = {
+        {
+                [0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
+                [1] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
+                [4] = { CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
+                [5] = { CLKSEL_VALID, CGA_PLL2, PLL_DIV2 },
+        }
+};
+
+
+static const struct clockgen_muxinfo clockgen2_cmux_cga = {
+        {
+                { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
+                { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
+                { CLKSEL_VALID, CGA_PLL1, PLL_DIV4 },
+                {},
+                { CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
+                { CLKSEL_VALID, CGA_PLL2, PLL_DIV2 },
+                { CLKSEL_VALID, CGA_PLL2, PLL_DIV4 },
+                {},
+                { CLKSEL_VALID, CGA_PLL3, PLL_DIV1 },
+                { CLKSEL_VALID, CGA_PLL3, PLL_DIV2 },
+                { CLKSEL_VALID, CGA_PLL3, PLL_DIV4 },
+        },
+};
+
+static const struct clockgen_muxinfo clockgen2_cmux_cga12 = {
+        {
+                { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
+                { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
+                { CLKSEL_VALID, CGA_PLL1, PLL_DIV4 },
+                {},
+                { CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
+                { CLKSEL_VALID, CGA_PLL2, PLL_DIV2 },
+                { CLKSEL_VALID, CGA_PLL2, PLL_DIV4 },
+        },
+};
+
+static const struct clockgen_muxinfo clockgen2_cmux_cgb = {
+        {
+                { CLKSEL_VALID, CGB_PLL1, PLL_DIV1 },
+                { CLKSEL_VALID, CGB_PLL1, PLL_DIV2 },
+                { CLKSEL_VALID, CGB_PLL1, PLL_DIV4 },
+                {},
+                { CLKSEL_VALID, CGB_PLL2, PLL_DIV1 },
+                { CLKSEL_VALID, CGB_PLL2, PLL_DIV2 },
+                { CLKSEL_VALID, CGB_PLL2, PLL_DIV4 },
+        },
+};
+
+static const struct clockgen_muxinfo ls1043a_hwa1 = {
+        {
+                {},
+                {},
+                { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
+                { CLKSEL_VALID, CGA_PLL1, PLL_DIV3 },
+                {},
+                {},
+                { CLKSEL_VALID, CGA_PLL2, PLL_DIV2 },
+                { CLKSEL_VALID, CGA_PLL2, PLL_DIV3 },
+        },
+};
+
+static const struct clockgen_muxinfo ls1043a_hwa2 = {
+        {
+                {},
+                { CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
+                {},
+                { CLKSEL_VALID, CGA_PLL2, PLL_DIV3 },
+        },
+};
+
+static const struct clockgen_muxinfo t1023_hwa1 = {
+        {
+                {},
+                { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
+                { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
+                { CLKSEL_VALID, CGA_PLL1, PLL_DIV3 },
+        },
+};
+
+static const struct clockgen_muxinfo t1023_hwa2 = {
+        {
+                [6] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
+        },
+};
+
+static const struct clockgen_muxinfo t2080_hwa1 = {
+        {
+                {},
+                { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
+                { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
+                { CLKSEL_VALID, CGA_PLL1, PLL_DIV3 },
+                { CLKSEL_VALID, CGA_PLL1, PLL_DIV4 },
+                { CLKSEL_VALID, PLATFORM_PLL, PLL_DIV1 },
+                { CLKSEL_VALID, CGA_PLL2, PLL_DIV2 },
+                { CLKSEL_VALID, CGA_PLL2, PLL_DIV3 },
+        },
+};
+
+static const struct clockgen_muxinfo t2080_hwa2 = {
+        {
+                {},
+                { CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
+                { CLKSEL_VALID, CGA_PLL2, PLL_DIV2 },
+                { CLKSEL_VALID, CGA_PLL2, PLL_DIV3 },
+                { CLKSEL_VALID, CGA_PLL2, PLL_DIV4 },
+                { CLKSEL_VALID, PLATFORM_PLL, PLL_DIV1 },
+                { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
+                { CLKSEL_VALID, CGA_PLL1, PLL_DIV3 },
+        },
+};
+
+static const struct clockgen_muxinfo t4240_hwa1 = {
+        {
+                { CLKSEL_VALID, PLATFORM_PLL, PLL_DIV2 },
+                { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
+                { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
+                { CLKSEL_VALID, CGA_PLL1, PLL_DIV3 },
+                { CLKSEL_VALID, CGA_PLL1, PLL_DIV4 },
+                {},
+                { CLKSEL_VALID, CGA_PLL2, PLL_DIV2 },
+                { CLKSEL_VALID, CGA_PLL2, PLL_DIV3 },
+        },
+};
+
+static const struct clockgen_muxinfo t4240_hwa4 = {
+        {
+                [2] = { CLKSEL_VALID, CGB_PLL1, PLL_DIV2 },
+                [3] = { CLKSEL_VALID, CGB_PLL1, PLL_DIV3 },
+                [4] = { CLKSEL_VALID, CGB_PLL1, PLL_DIV4 },
+                [5] = { CLKSEL_VALID, PLATFORM_PLL, PLL_DIV1 },
+                [6] = { CLKSEL_VALID, CGB_PLL2, PLL_DIV2 },
+        },
+};
+
+static const struct clockgen_muxinfo t4240_hwa5 = {
+        {
+                [2] = { CLKSEL_VALID, CGB_PLL2, PLL_DIV2 },
+                [3] = { CLKSEL_VALID, CGB_PLL2, PLL_DIV3 },
+                [4] = { CLKSEL_VALID, CGB_PLL2, PLL_DIV4 },
+                [5] = { CLKSEL_VALID, PLATFORM_PLL, PLL_DIV1 },
+                [6] = { CLKSEL_VALID, CGB_PLL1, PLL_DIV2 },
+                [7] = { CLKSEL_VALID, CGB_PLL1, PLL_DIV3 },
+        },
+};
+
+#define RCWSR7_FM1_CLK_SEL      0x40000000
+#define RCWSR7_FM2_CLK_SEL      0x20000000
+#define RCWSR7_HWA_ASYNC_DIV    0x04000000
+
+static void __init p2041_init_periph(struct clockgen *cg)
+{
+        u32 reg;
+
+        reg = ioread32be(&cg->guts->rcwsr[7]);
+
+        if (reg & RCWSR7_FM1_CLK_SEL)
+                cg->fman[0] = cg->pll[CGA_PLL2].div[PLL_DIV2].clk;
+        else
+                cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk;
+}
+
+static void __init p4080_init_periph(struct clockgen *cg)
+{
+        u32 reg;
+
+        reg = ioread32be(&cg->guts->rcwsr[7]);
+
+        if (reg & RCWSR7_FM1_CLK_SEL)
+                cg->fman[0] = cg->pll[CGA_PLL3].div[PLL_DIV2].clk;
+        else
+                cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk;
+
+        if (reg & RCWSR7_FM2_CLK_SEL)
+                cg->fman[1] = cg->pll[CGA_PLL3].div[PLL_DIV2].clk;
+        else
+                cg->fman[1] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk;
+}
+
+static void __init p5020_init_periph(struct clockgen *cg)
+{
+        u32 reg;
+        int div = PLL_DIV2;
+
+        reg = ioread32be(&cg->guts->rcwsr[7]);
+        if (reg & RCWSR7_HWA_ASYNC_DIV)
+                div = PLL_DIV4;
+
+        if (reg & RCWSR7_FM1_CLK_SEL)
+                cg->fman[0] = cg->pll[CGA_PLL2].div[div].clk;
+        else
+                cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk;
+}
+
+static void __init p5040_init_periph(struct clockgen *cg)
+{
+        u32 reg;
+        int div = PLL_DIV2;
+
+        reg = ioread32be(&cg->guts->rcwsr[7]);
+        if (reg & RCWSR7_HWA_ASYNC_DIV)
+                div = PLL_DIV4;
+
+        if (reg & RCWSR7_FM1_CLK_SEL)
+                cg->fman[0] = cg->pll[CGA_PLL3].div[div].clk;
+        else
+                cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk;
+
+        if (reg & RCWSR7_FM2_CLK_SEL)
+                cg->fman[1] = cg->pll[CGA_PLL3].div[div].clk;
+        else
+                cg->fman[1] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk;
+}
+
+static void __init t1023_init_periph(struct clockgen *cg)
+{
+        cg->fman[0] = cg->hwaccel[1];
+}
+
+static void __init t1040_init_periph(struct clockgen *cg)
+{
+        cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV1].clk;
+}
+
+static void __init t2080_init_periph(struct clockgen *cg)
+{
+        cg->fman[0] = cg->hwaccel[0];
+}
+
+static void __init t4240_init_periph(struct clockgen *cg)
+{
+        cg->fman[0] = cg->hwaccel[3];
+        cg->fman[1] = cg->hwaccel[4];
+}
+
+static const struct clockgen_chipinfo chipinfo[] = {
+        {
+                .compat = "fsl,b4420-clockgen",
+                .guts_compat = "fsl,b4860-device-config",
+                .init_periph = t2080_init_periph,
+                .cmux_groups = {
+                        &clockgen2_cmux_cga12, &clockgen2_cmux_cgb
+                },
+                .hwaccel = {
+                        &t2080_hwa1
+                },
+                .cmux_to_group = {
+                        0, 1, 1, 1, -1
+                },
+                .pll_mask = 0x3f,
+                .flags = CG_PLL_8BIT,
+        },
+        {
+                .compat = "fsl,b4860-clockgen",
+                .guts_compat = "fsl,b4860-device-config",
+                .init_periph = t2080_init_periph,
+                .cmux_groups = {
+                        &clockgen2_cmux_cga12, &clockgen2_cmux_cgb
+                },
+                .hwaccel = {
+                        &t2080_hwa1
+                },
+                .cmux_to_group = {
+                        0, 1, 1, 1, -1
+                },
+                .pll_mask = 0x3f,
+                .flags = CG_PLL_8BIT,
+        },
+        {
+                .compat = "fsl,ls1021a-clockgen",
+                .cmux_groups = {
+                        &t1023_cmux
+                },
+                .cmux_to_group = {
+                        0, -1
+                },
+                .pll_mask = 0x03,
+        },
+        {
+                .compat = "fsl,ls1043a-clockgen",
+                .init_periph = t2080_init_periph,
+                .cmux_groups = {
+                        &t1040_cmux
+                },
+                .hwaccel = {
+                        &ls1043a_hwa1, &ls1043a_hwa2
+                },
+                .cmux_to_group = {
+                        0, -1
+                },
+                .pll_mask = 0x07,
+                .flags = CG_PLL_8BIT,
+        },
+        {
+                .compat = "fsl,ls2080a-clockgen",
+                .cmux_groups = {
+                        &clockgen2_cmux_cga12, &clockgen2_cmux_cgb
+                },
+                .cmux_to_group = {
+                        0, 0, 1, 1, -1
+                },
+                .pll_mask = 0x37,
+                .flags = CG_VER3 | CG_LITTLE_ENDIAN,
+        },
+        {
+                .compat = "fsl,p2041-clockgen",
+                .guts_compat = "fsl,qoriq-device-config-1.0",
+                .init_periph = p2041_init_periph,
+                .cmux_groups = {
+                        &p2041_cmux_grp1, &p2041_cmux_grp2
+                },
+                .cmux_to_group = {
+                        0, 0, 1, 1, -1
+                },
+                .pll_mask = 0x07,
+        },
+        {
+                .compat = "fsl,p3041-clockgen",
+                .guts_compat = "fsl,qoriq-device-config-1.0",
+                .init_periph = p2041_init_periph,
+                .cmux_groups = {
+                        &p2041_cmux_grp1, &p2041_cmux_grp2
+                },
+                .cmux_to_group = {
+                        0, 0, 1, 1, -1
+                },
+                .pll_mask = 0x07,
+        },
+        {
+                .compat = "fsl,p4080-clockgen",
+                .guts_compat = "fsl,qoriq-device-config-1.0",
+                .init_periph = p4080_init_periph,
+                .cmux_groups = {
+                        &p4080_cmux_grp1, &p4080_cmux_grp2
+                },
+                .cmux_to_group = {
+                        0, 0, 0, 0, 1, 1, 1, 1
+                },
+                .pll_mask = 0x1f,
+        },
+        {
+                .compat = "fsl,p5020-clockgen",
+                .guts_compat = "fsl,qoriq-device-config-1.0",
+                .init_periph = p5020_init_periph,
+                .cmux_groups = {
+                        &p2041_cmux_grp1, &p2041_cmux_grp2
+                },
+                .cmux_to_group = {
+                        0, 1, -1
+                },
+                .pll_mask = 0x07,
+        },
+        {
+                .compat = "fsl,p5040-clockgen",
+                .guts_compat = "fsl,p5040-device-config",
+                .init_periph = p5040_init_periph,
+                .cmux_groups = {
+                        &p5040_cmux_grp1, &p5040_cmux_grp2
+                },
+                .cmux_to_group = {
+                        0, 0, 1, 1, -1
+                },
+                .pll_mask = 0x0f,
+        },
+        {
+                .compat = "fsl,t1023-clockgen",
+                .guts_compat = "fsl,t1023-device-config",
+                .init_periph = t1023_init_periph,
+                .cmux_groups = {
+                        &t1023_cmux
+                },
+                .hwaccel = {
+                        &t1023_hwa1, &t1023_hwa2
+                },
+                .cmux_to_group = {
+                        0, 0, -1
+                },
+                .pll_mask = 0x03,
+                .flags = CG_PLL_8BIT,
+        },
+        {
+                .compat = "fsl,t1040-clockgen",
+                .guts_compat = "fsl,t1040-device-config",
+                .init_periph = t1040_init_periph,
+                .cmux_groups = {
+                        &t1040_cmux
+                },
+                .cmux_to_group = {
+                        0, 0, 0, 0, -1
+                },
+                .pll_mask = 0x07,
+                .flags = CG_PLL_8BIT,
+        },
+        {
+                .compat = "fsl,t2080-clockgen",
+                .guts_compat = "fsl,t2080-device-config",
+                .init_periph = t2080_init_periph,
+                .cmux_groups = {
+                        &clockgen2_cmux_cga12
+                },
+                .hwaccel = {
+                        &t2080_hwa1, &t2080_hwa2
+                },
+                .cmux_to_group = {
+                        0, -1
+                },
+                .pll_mask = 0x07,
+                .flags = CG_PLL_8BIT,
+        },
+        {
+                .compat = "fsl,t4240-clockgen",
+                .guts_compat = "fsl,t4240-device-config",
+                .init_periph = t4240_init_periph,
+                .cmux_groups = {
+                        &clockgen2_cmux_cga, &clockgen2_cmux_cgb
+                },
+                .hwaccel = {
+                        &t4240_hwa1, NULL, NULL, &t4240_hwa4, &t4240_hwa5
+                },
+                .cmux_to_group = {
+                        0, 0, 1, -1
+                },
+                .pll_mask = 0x3f,
+                .flags = CG_PLL_8BIT,
+        },
+        {},
+};
+
+struct mux_hwclock {
         struct clk_hw hw;
-        void __iomem *reg;
-        unsigned int clk_per_pll;
-        u32 flags;
+        struct clockgen *cg;
+        const struct clockgen_muxinfo *info;
+        u32 __iomem *reg;
+        u8 parent_to_clksel[NUM_MUX_PARENTS];
+        s8 clksel_to_parent[NUM_MUX_PARENTS];
+        int num_parents;
 };
 
-#define PLL_KILL                        BIT(31)
+#define to_mux_hwclock(p)       container_of(p, struct mux_hwclock, hw)
+#define CLKSEL_MASK             0x78000000
 #define CLKSEL_SHIFT            27
-#define CLKSEL_ADJUST           BIT(0)
-#define to_cmux_clk(p)          container_of(p, struct cmux_clk, hw)
 
-static int cmux_set_parent(struct clk_hw *hw, u8 idx)
+static int mux_set_parent(struct clk_hw *hw, u8 idx)
 {
-        struct cmux_clk *clk = to_cmux_clk(hw);
+        struct mux_hwclock *hwc = to_mux_hwclock(hw);
         u32 clksel;
 
-        clksel = ((idx / clk->clk_per_pll) << 2) + idx % clk->clk_per_pll;
-        if (clk->flags & CLKSEL_ADJUST)
-                clksel += 8;
-        clksel = (clksel & 0xf) << CLKSEL_SHIFT;
-        iowrite32be(clksel, clk->reg);
+        if (idx >= hwc->num_parents)
+                return -EINVAL;
+
+        clksel = hwc->parent_to_clksel[idx];
+        cg_out(hwc->cg, (clksel << CLKSEL_SHIFT) & CLKSEL_MASK, hwc->reg);
 
         return 0;
 }
 
-static u8 cmux_get_parent(struct clk_hw *hw)
+static u8 mux_get_parent(struct clk_hw *hw)
 {
-        struct cmux_clk *clk = to_cmux_clk(hw);
+        struct mux_hwclock *hwc = to_mux_hwclock(hw);
         u32 clksel;
+        s8 ret;
 
-        clksel = ioread32be(clk->reg);
-        clksel = (clksel >> CLKSEL_SHIFT) & 0xf;
-        if (clk->flags & CLKSEL_ADJUST)
-                clksel -= 8;
-        clksel = (clksel >> 2) * clk->clk_per_pll + clksel % 4;
+        clksel = (cg_in(hwc->cg, hwc->reg) & CLKSEL_MASK) >> CLKSEL_SHIFT;
 
-        return clksel;
+        ret = hwc->clksel_to_parent[clksel];
+        if (ret < 0) {
+                pr_err("%s: mux at %p has bad clksel\n", __func__, hwc->reg);
+                return 0;
+        }
+
+        return ret;
 }
 
 static const struct clk_ops cmux_ops = {
-        .get_parent = cmux_get_parent,
-        .set_parent = cmux_set_parent,
+        .get_parent = mux_get_parent,
+        .set_parent = mux_set_parent,
 };
 
-static void __init core_mux_init(struct device_node *np)
+/*
+ * Don't allow setting for now, as the clock options haven't been
+ * sanitized for additional restrictions.
+ */
+static const struct clk_ops hwaccel_ops = {
+        .get_parent = mux_get_parent,
+};
+
+static const struct clockgen_pll_div *get_pll_div(struct clockgen *cg,
+                                                  struct mux_hwclock *hwc,
+                                                  int idx)
 {
-        struct clk *clk;
-        struct clk_init_data init;
-        struct cmux_clk *cmux_clk;
-        struct device_node *node;
-        int rc, count, i;
-        u32     offset;
-        const char *clk_name;
-        const char **parent_names;
-        struct of_phandle_args clkspec;
+        int pll, div;
 
-        rc = of_property_read_u32(np, "reg", &offset);
-        if (rc) {
-                pr_err("%s: could not get reg property\n", np->name);
-                return;
-        }
+        if (!(hwc->info->clksel[idx].flags & CLKSEL_VALID))
+                return NULL;
 
-        /* get the input clock source count */
-        count = of_property_count_strings(np, "clock-names");
-        if (count < 0) {
-                pr_err("%s: get clock count error\n", np->name);
-                return;
-        }
-        parent_names = kcalloc(count, sizeof(char *), GFP_KERNEL);
-        if (!parent_names)
-                return;
+        pll = hwc->info->clksel[idx].pll;
+        div = hwc->info->clksel[idx].div;
 
-        for (i = 0; i < count; i++)
-                parent_names[i] = of_clk_get_parent_name(np, i);
+        return &cg->pll[pll].div[div];
+}
 
-        cmux_clk = kzalloc(sizeof(*cmux_clk), GFP_KERNEL);
-        if (!cmux_clk)
-                goto err_name;
+static struct clk * __init create_mux_common(struct clockgen *cg,
+                                             struct mux_hwclock *hwc,
+                                             const struct clk_ops *ops,
+                                             unsigned long min_rate,
+                                             unsigned long pct80_rate,
+                                             const char *fmt, int idx)
+{
+        struct clk_init_data init = {};
+        struct clk *clk;
+        const struct clockgen_pll_div *div;
+        const char *parent_names[NUM_MUX_PARENTS];
+        char name[32];
+        int i, j;
 
-        cmux_clk->reg = of_iomap(np, 0);
-        if (!cmux_clk->reg) {
-                pr_err("%s: could not map register\n", __func__);
-                goto err_clk;
-        }
+        snprintf(name, sizeof(name), fmt, idx);
 
-        rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", 0,
-                                        &clkspec);
-        if (rc) {
-                pr_err("%s: parse clock node error\n", __func__);
-                goto err_clk;
-        }
+        for (i = 0, j = 0; i < NUM_MUX_PARENTS; i++) {
+                unsigned long rate;
 
-        cmux_clk->clk_per_pll = of_property_count_strings(clkspec.np,
-                        "clock-output-names");
-        of_node_put(clkspec.np);
+                hwc->clksel_to_parent[i] = -1;
 
-        node = of_find_compatible_node(NULL, NULL, "fsl,p4080-clockgen");
-        if (node && (offset >= 0x80))
-                cmux_clk->flags = CLKSEL_ADJUST;
+                div = get_pll_div(cg, hwc, i);
+                if (!div)
+                        continue;
 
-        rc = of_property_read_string_index(np, "clock-output-names",
-                                           0, &clk_name);
-        if (rc) {
-                pr_err("%s: read clock names error\n", np->name);
-                goto err_clk;
+                rate = clk_get_rate(div->clk);
+
+                if (hwc->info->clksel[i].flags & CLKSEL_80PCT &&
+                    rate > pct80_rate)
+                        continue;
+                if (rate < min_rate)
+                        continue;
+
+                parent_names[j] = div->name;
+                hwc->parent_to_clksel[j] = i;
+                hwc->clksel_to_parent[i] = j;
+                j++;
         }
 
-        init.name = clk_name;
-        init.ops = &cmux_ops;
+        init.name = name;
+        init.ops = ops;
         init.parent_names = parent_names;
-        init.num_parents = count;
+        init.num_parents = hwc->num_parents = j;
         init.flags = 0;
-        cmux_clk->hw.init = &init;
+        hwc->hw.init = &init;
+        hwc->cg = cg;
 
-        clk = clk_register(NULL, &cmux_clk->hw);
+        clk = clk_register(NULL, &hwc->hw);
         if (IS_ERR(clk)) {
-                pr_err("%s: could not register clock\n", clk_name);
-                goto err_clk;
+                pr_err("%s: Couldn't register %s: %ld\n", __func__, name,
+                       PTR_ERR(clk));
+                kfree(hwc);
+                return NULL;
+        }
+
+        return clk;
+}
+
+static struct clk * __init create_one_cmux(struct clockgen *cg, int idx)
+{
+        struct mux_hwclock *hwc;
+        const struct clockgen_pll_div *div;
+        unsigned long plat_rate, min_rate;
+        u64 pct80_rate;
+        u32 clksel;
+
+        hwc = kzalloc(sizeof(*hwc), GFP_KERNEL);
+        if (!hwc)
+                return NULL;
+
+        hwc->reg = cg->regs + 0x20 * idx;
+        hwc->info = cg->info.cmux_groups[cg->info.cmux_to_group[idx]];
+
+        /*
+         * Find the rate for the default clksel, and treat it as the
+         * maximum rated core frequency.  If this is an incorrect
+         * assumption, certain clock options (possibly including the
+         * default clksel) may be inappropriately excluded on certain
+         * chips.
+         */
+        clksel = (cg_in(cg, hwc->reg) & CLKSEL_MASK) >> CLKSEL_SHIFT;
+        div = get_pll_div(cg, hwc, clksel);
+        if (!div)
+                return NULL;
+
+        pct80_rate = clk_get_rate(div->clk);
+        pct80_rate *= 8;
+        do_div(pct80_rate, 10);
+
+        plat_rate = clk_get_rate(cg->pll[PLATFORM_PLL].div[PLL_DIV1].clk);
+
+        if (cg->info.flags & CG_CMUX_GE_PLAT)
+                min_rate = plat_rate;
+        else
+                min_rate = plat_rate / 2;
+
+        return create_mux_common(cg, hwc, &cmux_ops, min_rate,
+                                 pct80_rate, "cg-cmux%d", idx);
+}
+
+static struct clk * __init create_one_hwaccel(struct clockgen *cg, int idx)
+{
+        struct mux_hwclock *hwc;
+
+        hwc = kzalloc(sizeof(*hwc), GFP_KERNEL);
+        if (!hwc)
+                return NULL;
+
+        hwc->reg = cg->regs + 0x20 * idx + 0x10;
+        hwc->info = cg->info.hwaccel[idx];
+
+        return create_mux_common(cg, hwc, &hwaccel_ops, 0, 0,
+                                 "cg-hwaccel%d", idx);
+}
+
+static void __init create_muxes(struct clockgen *cg)
+{
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(cg->cmux); i++) {
+                if (cg->info.cmux_to_group[i] < 0)
+                        break;
+                if (cg->info.cmux_to_group[i] >=
+                    ARRAY_SIZE(cg->info.cmux_groups)) {
+                        WARN_ON_ONCE(1);
+                        continue;
+                }
+
+                cg->cmux[i] = create_one_cmux(cg, i);
+        }
+
+        for (i = 0; i < ARRAY_SIZE(cg->hwaccel); i++) {
+                if (!cg->info.hwaccel[i])
+                        continue;
+
+                cg->hwaccel[i] = create_one_hwaccel(cg, i);
         }
+}
+
+static void __init clockgen_init(struct device_node *np);
+
+/* Legacy nodes may get probed before the parent clockgen node */
+static void __init legacy_init_clockgen(struct device_node *np)
+{
+        if (!clockgen.node)
+                clockgen_init(of_get_parent(np));
+}
+
+/* Legacy node */
+static void __init core_mux_init(struct device_node *np)
+{
+        struct clk *clk;
+        struct resource res;
+        int idx, rc;
+
+        legacy_init_clockgen(np);
+
+        if (of_address_to_resource(np, 0, &res))
+                return;
+
+        idx = (res.start & 0xf0) >> 5;
+        clk = clockgen.cmux[idx];
 
         rc = of_clk_add_provider(np, of_clk_src_simple_get, clk);
         if (rc) {
-                pr_err("Could not register clock provider for node:%s\n",
-                       np->name);
-                goto err_clk;
+                pr_err("%s: Couldn't register clk provider for node %s: %d\n",
+                       __func__, np->name, rc);
+                return;
         }
-        goto err_name;
+}
+
+static struct clk *sysclk_from_fixed(struct device_node *node, const char *name)
+{
+        u32 rate;
+
+        if (of_property_read_u32(node, "clock-frequency", &rate))
+                return ERR_PTR(-ENODEV);
 
-err_clk:
-        kfree(cmux_clk);
-err_name:
-        /* free *_names because they are reallocated when registered */
-        kfree(parent_names);
+        return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
 }
 
-static void __init core_pll_init(struct device_node *np)
+static struct clk *sysclk_from_parent(const char *name)
+{
+        struct clk *clk;
+        const char *parent_name;
+
+        clk = of_clk_get(clockgen.node, 0);
+        if (IS_ERR(clk))
+                return clk;
+
+        /* Register the input clock under the desired name. */
+        parent_name = __clk_get_name(clk);
+        clk = clk_register_fixed_factor(NULL, name, parent_name,
+                                        0, 1, 1);
+        if (IS_ERR(clk))
+                pr_err("%s: Couldn't register %s: %ld\n", __func__, name,
+                       PTR_ERR(clk));
+
+        return clk;
+}
+
+static struct clk * __init create_sysclk(const char *name)
+{
+        struct device_node *sysclk;
+        struct clk *clk;
+
+        clk = sysclk_from_fixed(clockgen.node, name);
+        if (!IS_ERR(clk))
+                return clk;
+
+        clk = sysclk_from_parent(name);
+        if (!IS_ERR(clk))
+                return clk;
+
+        sysclk = of_get_child_by_name(clockgen.node, "sysclk");
+        if (sysclk) {
+                clk = sysclk_from_fixed(sysclk, name);
+                if (!IS_ERR(clk))
+                        return clk;
+        }
+
+        pr_err("%s: No input clock\n", __func__);
+        return NULL;
+}
+
+/* Legacy node */
+static void __init sysclk_init(struct device_node *node)
 {
+        struct clk *clk;
+
+        legacy_init_clockgen(node);
+
+        clk = clockgen.sysclk;
+        if (clk)
+                of_clk_add_provider(node, of_clk_src_simple_get, clk);
+}
+
+#define PLL_KILL BIT(31)
+
+static void __init create_one_pll(struct clockgen *cg, int idx)
+{
+        u32 __iomem *reg;
         u32 mult;
-        int i, rc, count;
-        const char *clk_name, *parent_name;
-        struct clk_onecell_data *onecell_data;
-        struct clk      **subclks;
-        void __iomem *base;
+        struct clockgen_pll *pll = &cg->pll[idx];
+        int i;
 
-        base = of_iomap(np, 0);
-        if (!base) {
-                pr_err("iomap error\n");
+        if (!(cg->info.pll_mask & (1 << idx)))
                 return;
+
+        if (cg->info.flags & CG_VER3) {
+                switch (idx) {
+                case PLATFORM_PLL:
+                        reg = cg->regs + 0x60080;
+                        break;
+                case CGA_PLL1:
+                        reg = cg->regs + 0x80;
+                        break;
+                case CGA_PLL2:
+                        reg = cg->regs + 0xa0;
+                        break;
+                case CGB_PLL1:
+                        reg = cg->regs + 0x10080;
+                        break;
+                case CGB_PLL2:
+                        reg = cg->regs + 0x100a0;
+                        break;
+                default:
+                        WARN_ONCE(1, "index %d\n", idx);
+                        return;
+                }
+        } else {
+                if (idx == PLATFORM_PLL)
+                        reg = cg->regs + 0xc00;
+                else
+                        reg = cg->regs + 0x800 + 0x20 * (idx - 1);
         }
 
-        /* get the multiple of PLL */
-        mult = ioread32be(base);
+        /* Get the multiple of PLL */
+        mult = cg_in(cg, reg);
 
-        /* check if this PLL is disabled */
+        /* Check if this PLL is disabled */
         if (mult & PLL_KILL) {
-                pr_debug("PLL:%s is disabled\n", np->name);
-                goto err_map;
+                pr_debug("%s(): pll %p disabled\n", __func__, reg);
+                return;
         }
-        mult = (mult >> 1) & 0x3f;
 
-        parent_name = of_clk_get_parent_name(np, 0);
-        if (!parent_name) {
-                pr_err("PLL: %s must have a parent\n", np->name);
-                goto err_map;
+        if ((cg->info.flags & CG_VER3) ||
+            ((cg->info.flags & CG_PLL_8BIT) && idx != PLATFORM_PLL))
+                mult = (mult & GENMASK(8, 1)) >> 1;
+        else
+                mult = (mult & GENMASK(6, 1)) >> 1;
+
+        for (i = 0; i < ARRAY_SIZE(pll->div); i++) {
+                struct clk *clk;
+
+                snprintf(pll->div[i].name, sizeof(pll->div[i].name),
+                         "cg-pll%d-div%d", idx, i + 1);
+
+                clk = clk_register_fixed_factor(NULL,
+                                pll->div[i].name, "cg-sysclk", 0, mult, i + 1);
+                if (IS_ERR(clk)) {
+                        pr_err("%s: %s: register failed %ld\n",
+                               __func__, pll->div[i].name, PTR_ERR(clk));
+                        continue;
+                }
+
+                pll->div[i].clk = clk;
         }
+}
 
+static void __init create_plls(struct clockgen *cg)
+{
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(cg->pll); i++)
+                create_one_pll(cg, i);
+}
+
+static void __init legacy_pll_init(struct device_node *np, int idx)
+{
+        struct clockgen_pll *pll;
+        struct clk_onecell_data *onecell_data;
+        struct clk **subclks;
+        int count, rc;
+
+        legacy_init_clockgen(np);
+
+        pll = &clockgen.pll[idx];
         count = of_property_count_strings(np, "clock-output-names");
-        if (count < 0 || count > 4) {
-                pr_err("%s: clock is not supported\n", np->name);
-                goto err_map;
-        }
 
-        subclks = kcalloc(count, sizeof(struct clk *), GFP_KERNEL);
+        BUILD_BUG_ON(ARRAY_SIZE(pll->div) < 4);
+        subclks = kcalloc(4, sizeof(struct clk *), GFP_KERNEL);
         if (!subclks)
-                goto err_map;
+                return;
 
         onecell_data = kmalloc(sizeof(*onecell_data), GFP_KERNEL);
         if (!onecell_data)
                 goto err_clks;
 
-        for (i = 0; i < count; i++) {
-                rc = of_property_read_string_index(np, "clock-output-names",
-                                                   i, &clk_name);
-                if (rc) {
-                        pr_err("%s: could not get clock names\n", np->name);
-                        goto err_cell;
-                }
-
-                /*
-                 * when count == 4, there are 4 output clocks:
-                 * /1, /2, /3, /4 respectively
-                 * when count < 4, there are at least 2 output clocks:
-                 * /1, /2, (/4, if count == 3) respectively.
-                 */
-                if (count == 4)
-                        subclks[i] = clk_register_fixed_factor(NULL, clk_name,
-                                        parent_name, 0, mult, 1 + i);
-                else
-
-                        subclks[i] = clk_register_fixed_factor(NULL, clk_name,
-                                        parent_name, 0, mult, 1 << i);
-
-                if (IS_ERR(subclks[i])) {
-                        pr_err("%s: could not register clock\n", clk_name);
-                        goto err_cell;
-                }
+        if (count <= 3) {
+                subclks[0] = pll->div[0].clk;
+                subclks[1] = pll->div[1].clk;
+                subclks[2] = pll->div[3].clk;
+        } else {
+                subclks[0] = pll->div[0].clk;
+                subclks[1] = pll->div[1].clk;
+                subclks[2] = pll->div[2].clk;
+                subclks[3] = pll->div[3].clk;
         }
 
         onecell_data->clks = subclks;
@@ -233,125 +1051,223 @@ static void __init core_pll_init(struct device_node *np)
 
         rc = of_clk_add_provider(np, of_clk_src_onecell_get, onecell_data);
         if (rc) {
-                pr_err("Could not register clk provider for node:%s\n",
-                       np->name);
+                pr_err("%s: Couldn't register clk provider for node %s: %d\n",
+                       __func__, np->name, rc);
                 goto err_cell;
         }
 
-        iounmap(base);
         return;
 err_cell:
         kfree(onecell_data);
 err_clks:
         kfree(subclks);
-err_map:
-        iounmap(base);
 }
 
-static void __init sysclk_init(struct device_node *node)
+/* Legacy node */
+static void __init pltfrm_pll_init(struct device_node *np)
 {
-        struct clk *clk;
-        const char *clk_name = node->name;
-        struct device_node *np = of_get_parent(node);
-        u32 rate;
+        legacy_pll_init(np, PLATFORM_PLL);
+}
 
-        if (!np) {
-                pr_err("could not get parent node\n");
+/* Legacy node */
+static void __init core_pll_init(struct device_node *np)
+{
+        struct resource res;
+        int idx;
+
+        if (of_address_to_resource(np, 0, &res))
                 return;
+
+        if ((res.start & 0xfff) == 0xc00) {
+                /*
+                 * ls1021a devtree labels the platform PLL
+                 * with the core PLL compatible
+                 */
+                pltfrm_pll_init(np);
+        } else {
+                idx = (res.start & 0xf0) >> 5;
+                legacy_pll_init(np, CGA_PLL1 + idx);
         }
+}
 
-        if (of_property_read_u32(np, "clock-frequency", &rate)) {
-                of_node_put(node);
-                return;
+static struct clk *clockgen_clk_get(struct of_phandle_args *clkspec, void *data)
+{
+        struct clockgen *cg = data;
+        struct clk *clk;
+        struct clockgen_pll *pll;
+        u32 type, idx;
+
+        if (clkspec->args_count < 2) {
+                pr_err("%s: insufficient phandle args\n", __func__);
+                return ERR_PTR(-EINVAL);
         }
 
-        of_property_read_string(np, "clock-output-names", &clk_name);
+        type = clkspec->args[0];
+        idx = clkspec->args[1];
 
-        clk = clk_register_fixed_rate(NULL, clk_name, NULL, CLK_IS_ROOT, rate);
-        if (!IS_ERR(clk))
-                of_clk_add_provider(np, of_clk_src_simple_get, clk);
+        switch (type) {
+        case 0:
+                if (idx != 0)
+                        goto bad_args;
+                clk = cg->sysclk;
+                break;
+        case 1:
+                if (idx >= ARRAY_SIZE(cg->cmux))
+                        goto bad_args;
+                clk = cg->cmux[idx];
+                break;
+        case 2:
+                if (idx >= ARRAY_SIZE(cg->hwaccel))
+                        goto bad_args;
+                clk = cg->hwaccel[idx];
+                break;
+        case 3:
+                if (idx >= ARRAY_SIZE(cg->fman))
+                        goto bad_args;
+                clk = cg->fman[idx];
+                break;
+        case 4:
+                pll = &cg->pll[PLATFORM_PLL];
+                if (idx >= ARRAY_SIZE(pll->div))
+                        goto bad_args;
+                clk = pll->div[idx].clk;
+                break;
+        default:
+                goto bad_args;
+        }
+
+        if (!clk)
+                return ERR_PTR(-ENOENT);
+        return clk;
+
+bad_args:
+        pr_err("%s: Bad phandle args %u %u\n", __func__, type, idx);
+        return ERR_PTR(-EINVAL);
 }
 
-static void __init pltfrm_pll_init(struct device_node *np)
+#ifdef CONFIG_PPC
+#include <asm/mpc85xx.h>
+
+static const u32 a4510_svrs[] __initconst = {
+        (SVR_P2040 << 8) | 0x10,        /* P2040 1.0 */
+        (SVR_P2040 << 8) | 0x11,        /* P2040 1.1 */
+        (SVR_P2041 << 8) | 0x10,        /* P2041 1.0 */
+        (SVR_P2041 << 8) | 0x11,        /* P2041 1.1 */
+        (SVR_P3041 << 8) | 0x10,        /* P3041 1.0 */
+        (SVR_P3041 << 8) | 0x11,        /* P3041 1.1 */
+        (SVR_P4040 << 8) | 0x20,        /* P4040 2.0 */
+        (SVR_P4080 << 8) | 0x20,        /* P4080 2.0 */
+        (SVR_P5010 << 8) | 0x10,        /* P5010 1.0 */
+        (SVR_P5010 << 8) | 0x20,        /* P5010 2.0 */
+        (SVR_P5020 << 8) | 0x10,        /* P5020 1.0 */
+        (SVR_P5021 << 8) | 0x10,        /* P5021 1.0 */
+        (SVR_P5040 << 8) | 0x10,        /* P5040 1.0 */
+};
+
+#define SVR_SECURITY    0x80000 /* The Security (E) bit */
+
+static bool __init has_erratum_a4510(void)
 {
-        void __iomem *base;
-        uint32_t mult;
-        const char *parent_name, *clk_name;
-        int i, _errno;
-        struct clk_onecell_data *cod;
+        u32 svr = mfspr(SPRN_SVR);
+        int i;
 
-        base = of_iomap(np, 0);
-        if (!base) {
-                pr_err("%s(): %s: of_iomap() failed\n", __func__, np->name);
-                return;
+        svr &= ~SVR_SECURITY;
+
+        for (i = 0; i < ARRAY_SIZE(a4510_svrs); i++) {
+                if (svr == a4510_svrs[i])
+                        return true;
         }
 
-        /* Get the multiple of PLL */
-        mult = ioread32be(base);
+        return false;
+}
+#else
+static bool __init has_erratum_a4510(void)
+{
+        return false;
+}
+#endif
 
-        iounmap(base);
+static void __init clockgen_init(struct device_node *np)
+{
+        int i, ret;
+        bool is_old_ls1021a = false;
 
-        /* Check if this PLL is disabled */
-        if (mult & PLL_KILL) {
-                pr_debug("%s(): %s: Disabled\n", __func__, np->name);
+        /* May have already been called by a legacy probe */
+        if (clockgen.node)
                 return;
-        }
-        mult = (mult & GENMASK(6, 1)) >> 1;
 
-        parent_name = of_clk_get_parent_name(np, 0);
-        if (!parent_name) {
-                pr_err("%s(): %s: of_clk_get_parent_name() failed\n",
-                       __func__, np->name);
+        clockgen.node = np;
+        clockgen.regs = of_iomap(np, 0);
+        if (!clockgen.regs &&
+            of_device_is_compatible(of_root, "fsl,ls1021a")) {
+                /* Compatibility hack for old, broken device trees */
+                clockgen.regs = ioremap(0x1ee1000, 0x1000);
+                is_old_ls1021a = true;
+        }
+        if (!clockgen.regs) {
+                pr_err("%s(): %s: of_iomap() failed\n", __func__, np->name);
                 return;
         }
 
-        i = of_property_count_strings(np, "clock-output-names");
-        if (i < 0) {
-                pr_err("%s(): %s: of_property_count_strings(clock-output-names) = %d\n",
-                       __func__, np->name, i);
-                return;
+        for (i = 0; i < ARRAY_SIZE(chipinfo); i++) {
+                if (of_device_is_compatible(np, chipinfo[i].compat))
+                        break;
+                if (is_old_ls1021a &&
+                    !strcmp(chipinfo[i].compat, "fsl,ls1021a-clockgen"))
+                        break;
         }
 
-        cod = kmalloc(sizeof(*cod) + i * sizeof(struct clk *), GFP_KERNEL);
-        if (!cod)
-                return;
-        cod->clks = (struct clk **)(cod + 1);
-        cod->clk_num = i;
-
-        for (i = 0; i < cod->clk_num; i++) {
-                _errno = of_property_read_string_index(np, "clock-output-names",
-                                                       i, &clk_name);
-                if (_errno < 0) {
-                        pr_err("%s(): %s: of_property_read_string_index(clock-output-names) = %d\n",
-                               __func__, np->name, _errno);
-                        goto return_clk_unregister;
-                }
+        if (i == ARRAY_SIZE(chipinfo)) {
+                pr_err("%s: unknown clockgen node %s\n", __func__,
+                       np->full_name);
+                goto err;
+        }
+        clockgen.info = chipinfo[i];
+
+        if (clockgen.info.guts_compat) {
+                struct device_node *guts;
 
-                cod->clks[i] = clk_register_fixed_factor(NULL, clk_name,
-                                               parent_name, 0, mult, 1 + i);
-                if (IS_ERR(cod->clks[i])) {
-                        pr_err("%s(): %s: clk_register_fixed_factor(%s) = %ld\n",
-                               __func__, np->name,
-                               clk_name, PTR_ERR(cod->clks[i]));
-                        goto return_clk_unregister;
+                guts = of_find_compatible_node(NULL, NULL,
+                                               clockgen.info.guts_compat);
+                if (guts) {
+                        clockgen.guts = of_iomap(guts, 0);
+                        if (!clockgen.guts) {
+                                pr_err("%s: Couldn't map %s regs\n", __func__,
+                                       guts->full_name);
+                        }
                 }
+
         }
 
-        _errno = of_clk_add_provider(np, of_clk_src_onecell_get, cod);
-        if (_errno < 0) {
-                pr_err("%s(): %s: of_clk_add_provider() = %d\n",
-                       __func__, np->name, _errno);
-                goto return_clk_unregister;
+        if (has_erratum_a4510())
+                clockgen.info.flags |= CG_CMUX_GE_PLAT;
+
+        clockgen.sysclk = create_sysclk("cg-sysclk");
+        create_plls(&clockgen);
+        create_muxes(&clockgen);
+
+        if (clockgen.info.init_periph)
+                clockgen.info.init_periph(&clockgen);
+
+        ret = of_clk_add_provider(np, clockgen_clk_get, &clockgen);
+        if (ret) {
+                pr_err("%s: Couldn't register clk provider for node %s: %d\n",
+                       __func__, np->name, ret);
         }
 
         return;
-
-return_clk_unregister:
-        while (--i >= 0)
-                clk_unregister(cod->clks[i]);
-        kfree(cod);
+err:
+        iounmap(clockgen.regs);
+        clockgen.regs = NULL;
 }
 
+CLK_OF_DECLARE(qoriq_clockgen_1, "fsl,qoriq-clockgen-1.0", clockgen_init);
+CLK_OF_DECLARE(qoriq_clockgen_2, "fsl,qoriq-clockgen-2.0", clockgen_init);
+CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen", clockgen_init);
+CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen", clockgen_init);
+CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init);
+
+/* Legacy nodes */
 CLK_OF_DECLARE(qoriq_sysclk_1, "fsl,qoriq-sysclk-1.0", sysclk_init);
 CLK_OF_DECLARE(qoriq_sysclk_2, "fsl,qoriq-sysclk-2.0", sysclk_init);
 CLK_OF_DECLARE(qoriq_core_pll_1, "fsl,qoriq-core-pll-1.0", core_pll_init);
diff --git a/drivers/iommu/fsl_pamu.c b/drivers/iommu/fsl_pamu.c
index 2570f2a25dc4..a34355fca37a 100644
--- a/drivers/iommu/fsl_pamu.c
+++ b/drivers/iommu/fsl_pamu.c
@@ -20,11 +20,11 @@
 
 #include "fsl_pamu.h"
 
+#include <linux/fsl/guts.h>
 #include <linux/interrupt.h>
 #include <linux/genalloc.h>
 
 #include <asm/mpc85xx.h>
-#include <asm/fsl_guts.h>
 
 /* define indexes for each operation mapping scenario */
 #define OMI_QMAN        0x00
diff --git a/drivers/macintosh/Kconfig b/drivers/macintosh/Kconfig
index 5844b80bd90e..3e8b29e41420 100644
--- a/drivers/macintosh/Kconfig
+++ b/drivers/macintosh/Kconfig
@@ -166,9 +166,8 @@ config INPUT_ADBHID
           Say Y here if you want to have ADB (Apple Desktop Bus) HID devices
           such as keyboards, mice, joysticks, trackpads  or graphic tablets
           handled by the input layer.  If you say Y here, make sure to say Y to
-          the corresponding drivers "Keyboard support" (CONFIG_INPUT_KEYBDEV),
-          "Mouse Support" (CONFIG_INPUT_MOUSEDEV) and "Event interface
-          support" (CONFIG_INPUT_EVDEV) as well.
+          the corresponding drivers "Mouse Support" (CONFIG_INPUT_MOUSEDEV) and
+          "Event interface support" (CONFIG_INPUT_EVDEV) as well.
 
           If unsure, say Y.
 
diff --git a/drivers/misc/cxl/vphb.c b/drivers/misc/cxl/vphb.c
index 94b520896b18..c241e15cacb1 100644
--- a/drivers/misc/cxl/vphb.c
+++ b/drivers/misc/cxl/vphb.c
@@ -290,8 +290,10 @@ void cxl_pci_vphb_remove(struct cxl_afu *afu)
                 return;
 
         phb = afu->phb;
+        afu->phb = NULL;
 
         pci_remove_root_bus(phb->bus);
+        pcibios_free_controller(phb);
 }
 
 struct cxl_afu *cxl_pci_to_afu(struct pci_dev *dev)
diff --git a/drivers/ps3/ps3-lpm.c b/drivers/ps3/ps3-lpm.c
index cb7d3a67380d..e34de9a7d517 100644
--- a/drivers/ps3/ps3-lpm.c
+++ b/drivers/ps3/ps3-lpm.c
@@ -901,7 +901,7 @@ void ps3_disable_pm(u32 cpu)
         result = lv1_stop_lpm(lpm_priv->lpm_id, &tmp);
 
         if (result) {
-                if(result != LV1_WRONG_STATE)
+                if (result != LV1_WRONG_STATE)
                         dev_err(sbd_core(), "%s:%u: lv1_stop_lpm failed: %s\n",
                                 __func__, __LINE__, ps3_result(result));
                 return;
diff --git a/drivers/ps3/ps3-vuart.c b/drivers/ps3/ps3-vuart.c
index d6db822bef84..632701a1d993 100644
--- a/drivers/ps3/ps3-vuart.c
+++ b/drivers/ps3/ps3-vuart.c
@@ -1000,12 +1000,11 @@ static int ps3_vuart_probe(struct ps3_system_bus_device *dev)
         dev_dbg(&dev->core, "%s:%d\n", __func__, __LINE__);
 
         drv = ps3_system_bus_dev_to_vuart_drv(dev);
+        BUG_ON(!drv);
 
         dev_dbg(&dev->core, "%s:%d: (%s)\n", __func__, __LINE__,
                 drv->core.core.name);
 
-        BUG_ON(!drv);
-
         if (dev->port_number >= PORT_COUNT) {
                 BUG();
                 return -EINVAL;
diff --git a/arch/powerpc/include/asm/fsl_guts.h b/include/linux/fsl/guts.h
index 43b6bb1a4a9c..84d971ff3fba 100644
--- a/arch/powerpc/include/asm/fsl_guts.h
+++ b/include/linux/fsl/guts.h
@@ -12,9 +12,10 @@
  * option) any later version.
  */
 
-#ifndef __ASM_POWERPC_FSL_GUTS_H__
-#define __ASM_POWERPC_FSL_GUTS_H__
-#ifdef __KERNEL__
+#ifndef __FSL_GUTS_H__
+#define __FSL_GUTS_H__
+
+#include <linux/types.h>
 
 /**
  * Global Utility Registers.
@@ -189,4 +190,3 @@ static inline void guts_set_pmuxcr_dma(struct ccsr_guts __iomem *guts,
 #endif
 
 #endif
-#endif
diff --git a/scripts/kconfig/Makefile b/scripts/kconfig/Makefile
index aceaaed09811..3043d6b0b51d 100644
--- a/scripts/kconfig/Makefile
+++ b/scripts/kconfig/Makefile
@@ -96,9 +96,12 @@ savedefconfig: $(obj)/conf
 defconfig: $(obj)/conf
 ifeq ($(KBUILD_DEFCONFIG),)
         $< $(silent) --defconfig $(Kconfig)
-else
+else ifneq ($(wildcard $(srctree)/arch/$(SRCARCH)/configs/$(KBUILD_DEFCONFIG)),)
         @$(kecho) "*** Default configuration is based on '$(KBUILD_DEFCONFIG)'"
         $(Q)$< $(silent) --defconfig=arch/$(SRCARCH)/configs/$(KBUILD_DEFCONFIG) $(Kconfig)
+else
+        @$(kecho) "*** Default configuration is based on target '$(KBUILD_DEFCONFIG)'"
+        $(Q)$(MAKE) -f $(srctree)/Makefile $(KBUILD_DEFCONFIG)
 endif
 
 %_defconfig: $(obj)/conf
diff --git a/sound/soc/fsl/mpc8610_hpcd.c b/sound/soc/fsl/mpc8610_hpcd.c
index 9621b9140df6..6f236f170cf5 100644
--- a/sound/soc/fsl/mpc8610_hpcd.c
+++ b/sound/soc/fsl/mpc8610_hpcd.c
@@ -12,11 +12,11 @@
 
 #include <linux/module.h>
 #include <linux/interrupt.h>
+#include <linux/fsl/guts.h>
 #include <linux/of_address.h>
 #include <linux/of_device.h>
 #include <linux/slab.h>
 #include <sound/soc.h>
-#include <asm/fsl_guts.h>
 
 #include "fsl_dma.h"
 #include "fsl_ssi.h"
diff --git a/sound/soc/fsl/p1022_ds.c b/sound/soc/fsl/p1022_ds.c
index 71c1a7dc3aeb..747aab0602bd 100644
--- a/sound/soc/fsl/p1022_ds.c
+++ b/sound/soc/fsl/p1022_ds.c
@@ -11,12 +11,12 @@
  */
 
 #include <linux/module.h>
+#include <linux/fsl/guts.h>
 #include <linux/interrupt.h>
 #include <linux/of_address.h>
 #include <linux/of_device.h>
 #include <linux/slab.h>
 #include <sound/soc.h>
-#include <asm/fsl_guts.h>
 
 #include "fsl_dma.h"
 #include "fsl_ssi.h"
diff --git a/sound/soc/fsl/p1022_rdk.c b/sound/soc/fsl/p1022_rdk.c
index ee29048424be..1dd49e5f9675 100644
--- a/sound/soc/fsl/p1022_rdk.c
+++ b/sound/soc/fsl/p1022_rdk.c
@@ -18,12 +18,12 @@
  */
 
 #include <linux/module.h>
+#include <linux/fsl/guts.h>
 #include <linux/interrupt.h>
 #include <linux/of_address.h>
 #include <linux/of_device.h>
 #include <linux/slab.h>
 #include <sound/soc.h>
-#include <asm/fsl_guts.h>
 
 #include "fsl_dma.h"
 #include "fsl_ssi.h"
diff --git a/tools/testing/selftests/powerpc/Makefile b/tools/testing/selftests/powerpc/Makefile
index 03ca2e64b3fc..0c2706bda330 100644
--- a/tools/testing/selftests/powerpc/Makefile
+++ b/tools/testing/selftests/powerpc/Makefile
@@ -12,7 +12,17 @@ CFLAGS := -Wall -O2 -flto -Wall -Werror -DGIT_VERSION='"$(GIT_VERSION)"' -I$(CUR
 
 export CFLAGS
 
-SUB_DIRS = pmu copyloops mm tm primitives stringloops vphn switch_endian dscr
+SUB_DIRS = benchmarks           \
+           copyloops            \
+           dscr                 \
+           mm                   \
+           pmu                  \
+           primitives           \
+           stringloops          \
+           switch_endian        \
+           syscalls             \
+           tm                   \
+           vphn
 
 endif
 
diff --git a/tools/testing/selftests/powerpc/benchmarks/.gitignore b/tools/testing/selftests/powerpc/benchmarks/.gitignore
new file mode 100644
index 000000000000..b4709ea588c1
--- /dev/null
+++ b/tools/testing/selftests/powerpc/benchmarks/.gitignore
@@ -0,0 +1 @@
+gettimeofday
diff --git a/tools/testing/selftests/powerpc/benchmarks/Makefile b/tools/testing/selftests/powerpc/benchmarks/Makefile
new file mode 100644
index 000000000000..5fa48702070d
--- /dev/null
+++ b/tools/testing/selftests/powerpc/benchmarks/Makefile
@@ -0,0 +1,12 @@
+TEST_PROGS := gettimeofday
+
+CFLAGS += -O2
+
+all: $(TEST_PROGS)
+
+$(TEST_PROGS): ../harness.c
+
+include ../../lib.mk
+
+clean:
+        rm -f $(TEST_PROGS) *.o
diff --git a/tools/testing/selftests/powerpc/benchmarks/gettimeofday.c b/tools/testing/selftests/powerpc/benchmarks/gettimeofday.c
new file mode 100644
index 000000000000..3af3c21e8036
--- /dev/null
+++ b/tools/testing/selftests/powerpc/benchmarks/gettimeofday.c
@@ -0,0 +1,31 @@
+/*
+ * Copyright 2015, Anton Blanchard, IBM Corp.
+ * Licensed under GPLv2.
+ */
+
+#include <sys/time.h>
+#include <stdio.h>
+
+#include "utils.h"
+
+static int test_gettimeofday(void)
+{
+        int i;
+
+        struct timeval tv_start, tv_end;
+
+        gettimeofday(&tv_start, NULL);
+
+        for(i = 0; i < 100000000; i++) {
+                gettimeofday(&tv_end, NULL);
+        }
+
+        printf("time = %.6f\n", tv_end.tv_sec - tv_start.tv_sec + (tv_end.tv_usec - tv_start.tv_usec) * 1e-6);
+
+        return 0;
+}
+
+int main(void)
+{
+        return test_harness(test_gettimeofday, "gettimeofday");
+}
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/back_to_back_ebbs_test.c b/tools/testing/selftests/powerpc/pmu/ebb/back_to_back_ebbs_test.c
index 66ea765c0e72..94110b1dcd3d 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/back_to_back_ebbs_test.c
+++ b/tools/testing/selftests/powerpc/pmu/ebb/back_to_back_ebbs_test.c
@@ -63,6 +63,8 @@ int back_to_back_ebbs(void)
 {
         struct event event;
 
+        SKIP_IF(!ebb_is_supported());
+
         event_init_named(&event, 0x1001e, "cycles");
         event_leader_ebb_init(&event);
 
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/close_clears_pmcc_test.c b/tools/testing/selftests/powerpc/pmu/ebb/close_clears_pmcc_test.c
index 0f0423dba18b..ac18cf617dd6 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/close_clears_pmcc_test.c
+++ b/tools/testing/selftests/powerpc/pmu/ebb/close_clears_pmcc_test.c
@@ -20,6 +20,8 @@ int close_clears_pmcc(void)
 {
         struct event event;
 
+        SKIP_IF(!ebb_is_supported());
+
         event_init_named(&event, 0x1001e, "cycles");
         event_leader_ebb_init(&event);
 
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/cpu_event_pinned_vs_ebb_test.c b/tools/testing/selftests/powerpc/pmu/ebb/cpu_event_pinned_vs_ebb_test.c
index d3ed64d5d6c0..f0632e7fdf29 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/cpu_event_pinned_vs_ebb_test.c
+++ b/tools/testing/selftests/powerpc/pmu/ebb/cpu_event_pinned_vs_ebb_test.c
@@ -43,6 +43,8 @@ int cpu_event_pinned_vs_ebb(void)
         int cpu, rc;
         pid_t pid;
 
+        SKIP_IF(!ebb_is_supported());
+
         cpu = pick_online_cpu();
         FAIL_IF(cpu < 0);
         FAIL_IF(bind_to_cpu(cpu));
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/cpu_event_vs_ebb_test.c b/tools/testing/selftests/powerpc/pmu/ebb/cpu_event_vs_ebb_test.c
index 8b972c2aa392..33e56a2342e5 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/cpu_event_vs_ebb_test.c
+++ b/tools/testing/selftests/powerpc/pmu/ebb/cpu_event_vs_ebb_test.c
@@ -41,6 +41,8 @@ int cpu_event_vs_ebb(void)
         int cpu, rc;
         pid_t pid;
 
+        SKIP_IF(!ebb_is_supported());
+
         cpu = pick_online_cpu();
         FAIL_IF(cpu < 0);
         FAIL_IF(bind_to_cpu(cpu));
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/cycles_test.c b/tools/testing/selftests/powerpc/pmu/ebb/cycles_test.c
index 8590fc1bfc0d..7c57a8d79535 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/cycles_test.c
+++ b/tools/testing/selftests/powerpc/pmu/ebb/cycles_test.c
@@ -16,6 +16,8 @@ int cycles(void)
 {
         struct event event;
 
+        SKIP_IF(!ebb_is_supported());
+
         event_init_named(&event, 0x1001e, "cycles");
         event_leader_ebb_init(&event);
 
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/cycles_with_freeze_test.c b/tools/testing/selftests/powerpc/pmu/ebb/cycles_with_freeze_test.c
index 754b3f2008d3..ecf5ee3283a3 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/cycles_with_freeze_test.c
+++ b/tools/testing/selftests/powerpc/pmu/ebb/cycles_with_freeze_test.c
@@ -56,6 +56,8 @@ int cycles_with_freeze(void)
         uint64_t val;
         bool fc_cleared;
 
+        SKIP_IF(!ebb_is_supported());
+
         event_init_named(&event, 0x1001e, "cycles");
         event_leader_ebb_init(&event);
 
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/cycles_with_mmcr2_test.c b/tools/testing/selftests/powerpc/pmu/ebb/cycles_with_mmcr2_test.c
index d43029b0800c..c0faba520b35 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/cycles_with_mmcr2_test.c
+++ b/tools/testing/selftests/powerpc/pmu/ebb/cycles_with_mmcr2_test.c
@@ -26,6 +26,8 @@ int cycles_with_mmcr2(void)
         int i;
         bool bad_mmcr2;
 
+        SKIP_IF(!ebb_is_supported());
+
         event_init_named(&event, 0x1001e, "cycles");
         event_leader_ebb_init(&event);
 
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/ebb.c b/tools/testing/selftests/powerpc/pmu/ebb/ebb.c
index d7a72ce696b5..9729d9f90218 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/ebb.c
+++ b/tools/testing/selftests/powerpc/pmu/ebb/ebb.c
@@ -13,6 +13,7 @@
 #include <stdlib.h>
 #include <string.h>
 #include <sys/ioctl.h>
+#include <linux/auxvec.h>
 
 #include "trace.h"
 #include "reg.h"
@@ -319,6 +320,16 @@ void ebb_global_disable(void)
         mb();
 }
 
+bool ebb_is_supported(void)
+{
+#ifdef PPC_FEATURE2_EBB
+        /* EBB requires at least POWER8 */
+        return ((long)get_auxv_entry(AT_HWCAP2) & PPC_FEATURE2_EBB);
+#else
+        return false;
+#endif
+}
+
 void event_ebb_init(struct event *e)
 {
         e->attr.config |= (1ull << 63);
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/ebb.h b/tools/testing/selftests/powerpc/pmu/ebb/ebb.h
index e44eee5d97ca..f87e761f82d0 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/ebb.h
+++ b/tools/testing/selftests/powerpc/pmu/ebb/ebb.h
@@ -52,6 +52,7 @@ void standard_ebb_callee(void);
 int ebb_event_enable(struct event *e);
 void ebb_global_enable(void);
 void ebb_global_disable(void);
+bool ebb_is_supported(void);
 void ebb_freeze_pmcs(void);
 void ebb_unfreeze_pmcs(void);
 void event_ebb_init(struct event *e);
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/ebb_on_child_test.c b/tools/testing/selftests/powerpc/pmu/ebb/ebb_on_child_test.c
index c45f948148e1..1e7b7fe2396b 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/ebb_on_child_test.c
+++ b/tools/testing/selftests/powerpc/pmu/ebb/ebb_on_child_test.c
@@ -47,6 +47,8 @@ int ebb_on_child(void)
         struct event event;
         pid_t pid;
 
+        SKIP_IF(!ebb_is_supported());
+
         FAIL_IF(pipe(read_pipe.fds) == -1);
         FAIL_IF(pipe(write_pipe.fds) == -1);
 
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/ebb_on_willing_child_test.c b/tools/testing/selftests/powerpc/pmu/ebb/ebb_on_willing_child_test.c
index 11acf1d55f8d..a991d2ea8d0a 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/ebb_on_willing_child_test.c
+++ b/tools/testing/selftests/powerpc/pmu/ebb/ebb_on_willing_child_test.c
@@ -54,6 +54,8 @@ int ebb_on_willing_child(void)
         struct event event;
         pid_t pid;
 
+        SKIP_IF(!ebb_is_supported());
+
         FAIL_IF(pipe(read_pipe.fds) == -1);
         FAIL_IF(pipe(write_pipe.fds) == -1);
 
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/ebb_vs_cpu_event_test.c b/tools/testing/selftests/powerpc/pmu/ebb/ebb_vs_cpu_event_test.c
index be4dd5a4e98e..af20a2b363aa 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/ebb_vs_cpu_event_test.c
+++ b/tools/testing/selftests/powerpc/pmu/ebb/ebb_vs_cpu_event_test.c
@@ -41,6 +41,8 @@ int ebb_vs_cpu_event(void)
         int cpu, rc;
         pid_t pid;
 
+        SKIP_IF(!ebb_is_supported());
+
         cpu = pick_online_cpu();
         FAIL_IF(cpu < 0);
         FAIL_IF(bind_to_cpu(cpu));
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/event_attributes_test.c b/tools/testing/selftests/powerpc/pmu/ebb/event_attributes_test.c
index 7e78153f08eb..7762ab26e5ac 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/event_attributes_test.c
+++ b/tools/testing/selftests/powerpc/pmu/ebb/event_attributes_test.c
@@ -16,6 +16,8 @@ int event_attributes(void)
 {
         struct event event, leader;
 
+        SKIP_IF(!ebb_is_supported());
+
         event_init(&event, 0x1001e);
         event_leader_ebb_init(&event);
         /* Expected to succeed */
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/fork_cleanup_test.c b/tools/testing/selftests/powerpc/pmu/ebb/fork_cleanup_test.c
index 9e7af6e76622..167135bd92a8 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/fork_cleanup_test.c
+++ b/tools/testing/selftests/powerpc/pmu/ebb/fork_cleanup_test.c
@@ -44,6 +44,8 @@ int fork_cleanup(void)
 {
         pid_t pid;
 
+        SKIP_IF(!ebb_is_supported());
+
         event_init_named(&event, 0x1001e, "cycles");
         event_leader_ebb_init(&event);
 
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/instruction_count_test.c b/tools/testing/selftests/powerpc/pmu/ebb/instruction_count_test.c
index f8190fa29592..5da355135df2 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/instruction_count_test.c
+++ b/tools/testing/selftests/powerpc/pmu/ebb/instruction_count_test.c
@@ -111,6 +111,8 @@ int instruction_count(void)
         struct event event;
         uint64_t overhead;
 
+        SKIP_IF(!ebb_is_supported());
+
         event_init_named(&event, 0x400FA, "PM_RUN_INST_CMPL");
         event_leader_ebb_init(&event);
         event.attr.exclude_kernel = 1;
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/lost_exception_test.c b/tools/testing/selftests/powerpc/pmu/ebb/lost_exception_test.c
index 0c9dd9b2e39d..eb8acb78bc6c 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/lost_exception_test.c
+++ b/tools/testing/selftests/powerpc/pmu/ebb/lost_exception_test.c
@@ -23,6 +23,8 @@ static int test_body(void)
         int i, orig_period, max_period;
         struct event event;
 
+        SKIP_IF(!ebb_is_supported());
+
         /* We use PMC4 to make sure the kernel switches all counters correctly */
         event_init_named(&event, 0x40002, "instructions");
         event_leader_ebb_init(&event);
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/multi_counter_test.c b/tools/testing/selftests/powerpc/pmu/ebb/multi_counter_test.c
index 67d78af3284c..6ff8c8ff27d6 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/multi_counter_test.c
+++ b/tools/testing/selftests/powerpc/pmu/ebb/multi_counter_test.c
@@ -18,6 +18,8 @@ int multi_counter(void)
         struct event events[6];
         int i, group_fd;
 
+        SKIP_IF(!ebb_is_supported());
+
         event_init_named(&events[0], 0x1001C, "PM_CMPLU_STALL_THRD");
         event_init_named(&events[1], 0x2D016, "PM_CMPLU_STALL_FXU");
         event_init_named(&events[2], 0x30006, "PM_CMPLU_STALL_OTHER_CMPL");
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/multi_ebb_procs_test.c b/tools/testing/selftests/powerpc/pmu/ebb/multi_ebb_procs_test.c
index b8dc371f9338..037cb6154f36 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/multi_ebb_procs_test.c
+++ b/tools/testing/selftests/powerpc/pmu/ebb/multi_ebb_procs_test.c
@@ -79,6 +79,8 @@ int multi_ebb_procs(void)
         pid_t pids[NR_CHILDREN];
         int cpu, rc, i;
 
+        SKIP_IF(!ebb_is_supported());
+
         cpu = pick_online_cpu();
         FAIL_IF(cpu < 0);
         FAIL_IF(bind_to_cpu(cpu));
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/no_handler_test.c b/tools/testing/selftests/powerpc/pmu/ebb/no_handler_test.c
index 2f9bf8edfa60..8341d7778d5e 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/no_handler_test.c
+++ b/tools/testing/selftests/powerpc/pmu/ebb/no_handler_test.c
@@ -19,6 +19,8 @@ static int no_handler_test(void)
         u64 val;
         int i;
 
+        SKIP_IF(!ebb_is_supported());
+
         event_init_named(&event, 0x1001e, "cycles");
         event_leader_ebb_init(&event);
 
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/pmae_handling_test.c b/tools/testing/selftests/powerpc/pmu/ebb/pmae_handling_test.c
index 986500fd2131..c5fa64790c22 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/pmae_handling_test.c
+++ b/tools/testing/selftests/powerpc/pmu/ebb/pmae_handling_test.c
@@ -58,6 +58,8 @@ static int test_body(void)
 {
         struct event event;
 
+        SKIP_IF(!ebb_is_supported());
+
         event_init_named(&event, 0x1001e, "cycles");
         event_leader_ebb_init(&event);
 
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/pmc56_overflow_test.c b/tools/testing/selftests/powerpc/pmu/ebb/pmc56_overflow_test.c
index a503fa70c950..c22860ab9733 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/pmc56_overflow_test.c
+++ b/tools/testing/selftests/powerpc/pmu/ebb/pmc56_overflow_test.c
@@ -49,6 +49,8 @@ int pmc56_overflow(void)
 {
         struct event event;
 
+        SKIP_IF(!ebb_is_supported());
+
         /* Use PMC2 so we set PMCjCE, which enables PMC5/6 */
         event_init(&event, 0x2001e);
         event_leader_ebb_init(&event);
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/reg_access_test.c b/tools/testing/selftests/powerpc/pmu/ebb/reg_access_test.c
index 0cae66f659a3..5b1188f10c15 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/reg_access_test.c
+++ b/tools/testing/selftests/powerpc/pmu/ebb/reg_access_test.c
@@ -18,6 +18,8 @@ int reg_access(void)
 {
         uint64_t val, expected;
 
+        SKIP_IF(!ebb_is_supported());
+
         expected = 0x8000000100000000ull;
         mtspr(SPRN_BESCR, expected);
         val = mfspr(SPRN_BESCR);
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/task_event_pinned_vs_ebb_test.c b/tools/testing/selftests/powerpc/pmu/ebb/task_event_pinned_vs_ebb_test.c
index d56607e4ffab..1846f4e84635 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/task_event_pinned_vs_ebb_test.c
+++ b/tools/testing/selftests/powerpc/pmu/ebb/task_event_pinned_vs_ebb_test.c
@@ -42,6 +42,8 @@ int task_event_pinned_vs_ebb(void)
         pid_t pid;
         int rc;
 
+        SKIP_IF(!ebb_is_supported());
+
         FAIL_IF(pipe(read_pipe.fds) == -1);
         FAIL_IF(pipe(write_pipe.fds) == -1);
 
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/task_event_vs_ebb_test.c b/tools/testing/selftests/powerpc/pmu/ebb/task_event_vs_ebb_test.c
index eba32196dbbf..e3bc6e92a6a5 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/task_event_vs_ebb_test.c
+++ b/tools/testing/selftests/powerpc/pmu/ebb/task_event_vs_ebb_test.c
@@ -40,6 +40,8 @@ int task_event_vs_ebb(void)
         pid_t pid;
         int rc;
 
+        SKIP_IF(!ebb_is_supported());
+
         FAIL_IF(pipe(read_pipe.fds) == -1);
         FAIL_IF(pipe(write_pipe.fds) == -1);
 
diff --git a/tools/testing/selftests/powerpc/syscalls/.gitignore b/tools/testing/selftests/powerpc/syscalls/.gitignore
new file mode 100644
index 000000000000..f0f3fcc9d802
--- /dev/null
+++ b/tools/testing/selftests/powerpc/syscalls/.gitignore
@@ -0,0 +1 @@
+ipc_unmuxed
diff --git a/tools/testing/selftests/powerpc/syscalls/Makefile b/tools/testing/selftests/powerpc/syscalls/Makefile
new file mode 100644
index 000000000000..b35c7945bec5
--- /dev/null
+++ b/tools/testing/selftests/powerpc/syscalls/Makefile
@@ -0,0 +1,12 @@
+TEST_PROGS := ipc_unmuxed
+
+CFLAGS += -I../../../../../usr/include
+
+all: $(TEST_PROGS)
+
+$(TEST_PROGS): ../harness.c
+
+include ../../lib.mk
+
+clean:
+        rm -f $(TEST_PROGS) *.o
diff --git a/tools/testing/selftests/powerpc/syscalls/ipc.h b/tools/testing/selftests/powerpc/syscalls/ipc.h
new file mode 100644
index 000000000000..fbebc022edf6
--- /dev/null
+++ b/tools/testing/selftests/powerpc/syscalls/ipc.h
@@ -0,0 +1,47 @@
+#ifdef __NR_semop
+DO_TEST(semop, __NR_semop)
+#endif
+
+#ifdef __NR_semget
+DO_TEST(semget, __NR_semget)
+#endif
+
+#ifdef __NR_semctl
+DO_TEST(semctl, __NR_semctl)
+#endif
+
+#ifdef __NR_semtimedop
+DO_TEST(semtimedop, __NR_semtimedop)
+#endif
+
+#ifdef __NR_msgsnd
+DO_TEST(msgsnd, __NR_msgsnd)
+#endif
+
+#ifdef __NR_msgrcv
+DO_TEST(msgrcv, __NR_msgrcv)
+#endif
+
+#ifdef __NR_msgget
+DO_TEST(msgget, __NR_msgget)
+#endif
+
+#ifdef __NR_msgctl
+DO_TEST(msgctl, __NR_msgctl)
+#endif
+
+#ifdef __NR_shmat
+DO_TEST(shmat, __NR_shmat)
+#endif
+
+#ifdef __NR_shmdt
+DO_TEST(shmdt, __NR_shmdt)
+#endif
+
+#ifdef __NR_shmget
+DO_TEST(shmget, __NR_shmget)
+#endif
+
+#ifdef __NR_shmctl
+DO_TEST(shmctl, __NR_shmctl)
+#endif
diff --git a/tools/testing/selftests/powerpc/syscalls/ipc_unmuxed.c b/tools/testing/selftests/powerpc/syscalls/ipc_unmuxed.c
new file mode 100644
index 000000000000..2ac02706f8c8
--- /dev/null
+++ b/tools/testing/selftests/powerpc/syscalls/ipc_unmuxed.c
@@ -0,0 +1,61 @@
+/*
+ * Copyright 2015, Michael Ellerman, IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * This test simply tests that certain syscalls are implemented. It doesn't
+ * actually exercise their logic in any way.
+ */
+
+#define _GNU_SOURCE
+#include <errno.h>
+#include <stdio.h>
+#include <unistd.h>
+#include <sys/syscall.h>
+
+#include "utils.h"
+
+
+#define DO_TEST(_name, _num)    \
+static int test_##_name(void)                   \
+{                                               \
+        int rc;                                 \
+        printf("Testing " #_name);              \
+        errno = 0;                              \
+        rc = syscall(_num, -1, 0, 0, 0, 0, 0);  \
+        printf("\treturned %d, errno %d\n", rc, errno); \
+        return errno == ENOSYS;                 \
+}
+
+#include "ipc.h"
+#undef DO_TEST
+
+static int ipc_unmuxed(void)
+{
+        int tests_done = 0;
+
+#define DO_TEST(_name, _num)            \
+        FAIL_IF(test_##_name());        \
+        tests_done++;
+
+#include "ipc.h"
+#undef DO_TEST
+
+        /*
+         * If we ran no tests then it means none of the syscall numbers were
+         * defined, possibly because we were built against old headers. But it
+         * means we didn't really test anything, so instead of passing mark it
+         * as a skip to give the user a clue.
+         */
+        SKIP_IF(tests_done == 0);
+
+        return 0;
+}
+
+int main(void)
+{
+        return test_harness(ipc_unmuxed, "ipc_unmuxed");
+}
diff --git a/tools/testing/selftests/powerpc/tm/tm-syscall.c b/tools/testing/selftests/powerpc/tm/tm-syscall.c
index 1276e23da63b..e835bf7ec7ae 100644
--- a/tools/testing/selftests/powerpc/tm/tm-syscall.c
+++ b/tools/testing/selftests/powerpc/tm/tm-syscall.c
@@ -77,13 +77,23 @@ pid_t getppid_tm(bool suspend)
         exit(-1);
 }
 
+static inline bool have_htm_nosc(void)
+{
+#ifdef PPC_FEATURE2_HTM_NOSC
+        return ((long)get_auxv_entry(AT_HWCAP2) & PPC_FEATURE2_HTM_NOSC);
+#else
+        printf("PPC_FEATURE2_HTM_NOSC not defined, can't check AT_HWCAP2\n");
+        return false;
+#endif
+}
+
 int tm_syscall(void)
 {
         unsigned count = 0;
         struct timeval end, now;
 
-        SKIP_IF(!((long)get_auxv_entry(AT_HWCAP2)
-                  & PPC_FEATURE2_HTM_NOSC));
+        SKIP_IF(!have_htm_nosc());
+
         setbuf(stdout, NULL);
 
         printf("Testing transactional syscalls for %d seconds...\n", TEST_DURATION);