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authorThierry Reding <treding@nvidia.com>2015-05-04 07:30:50 -0400
committerThierry Reding <treding@nvidia.com>2015-07-16 04:38:28 -0400
commit297c4f3dcbffe11ce899a7d068ea18079094403b (patch)
tree052f44ef71b7117d75fb4af0848f05264d41032f
parentc2fe4694d8ac0f997f6d7088437b710fc4e4a185 (diff)
soc/tegra: fuse: Restrict legacy code to 32-bit ARM
For backwards-compatibility with old device trees, if no APBMISC node exists this driver hard-codes the I/O memory region. All 64-bit ARM device tree files are recent enough that they can be required to have this node, and therefore the legacy code path is not required. Based on work done by Paul Walmsley <pwalmsley@nvidia.com>. Cc: Paul Walmsley <pwalmsley@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
-rw-r--r--drivers/soc/tegra/fuse/tegra-apbmisc.c67
1 files changed, 58 insertions, 9 deletions
diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c
index 73fad05d8f2c..29d7714515b7 100644
--- a/drivers/soc/tegra/fuse/tegra-apbmisc.c
+++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c
@@ -21,11 +21,10 @@
21#include <linux/io.h> 21#include <linux/io.h>
22 22
23#include <soc/tegra/fuse.h> 23#include <soc/tegra/fuse.h>
24#include <soc/tegra/common.h>
24 25
25#include "fuse.h" 26#include "fuse.h"
26 27
27#define APBMISC_BASE 0x70000800
28#define APBMISC_SIZE 0x64
29#define FUSE_SKU_INFO 0x10 28#define FUSE_SKU_INFO 0x10
30 29
31#define PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT 4 30#define PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT 4
@@ -118,19 +117,69 @@ void __init tegra_init_revision(void)
118 117
119void __init tegra_init_apbmisc(void) 118void __init tegra_init_apbmisc(void)
120{ 119{
120 struct resource apbmisc, straps;
121 struct device_node *np; 121 struct device_node *np;
122 122
123 np = of_find_matching_node(NULL, apbmisc_match); 123 np = of_find_matching_node(NULL, apbmisc_match);
124 apbmisc_base = of_iomap(np, 0); 124 if (!np) {
125 if (!apbmisc_base) { 125 /*
126 pr_warn("ioremap tegra apbmisc failed. using %08x instead\n", 126 * Fall back to legacy initialization for 32-bit ARM only. All
127 APBMISC_BASE); 127 * 64-bit ARM device tree files for Tegra are required to have
128 apbmisc_base = ioremap(APBMISC_BASE, APBMISC_SIZE); 128 * an APBMISC node.
129 *
130 * This is for backwards-compatibility with old device trees
131 * that didn't contain an APBMISC node.
132 */
133 if (IS_ENABLED(CONFIG_ARM) && soc_is_tegra()) {
134 /* APBMISC registers (chip revision, ...) */
135 apbmisc.start = 0x70000800;
136 apbmisc.end = 0x70000863;
137 apbmisc.flags = IORESOURCE_MEM;
138
139 /* strapping options */
140 if (tegra_get_chip_id() == TEGRA124) {
141 straps.start = 0x7000e864;
142 straps.end = 0x7000e867;
143 } else {
144 straps.start = 0x70000008;
145 straps.end = 0x7000000b;
146 }
147
148 straps.flags = IORESOURCE_MEM;
149
150 pr_warn("Using APBMISC region %pR\n", &apbmisc);
151 pr_warn("Using strapping options registers %pR\n",
152 &straps);
153 } else {
154 /*
155 * At this point we're not running on Tegra, so play
156 * nice with multi-platform kernels.
157 */
158 return;
159 }
160 } else {
161 /*
162 * Extract information from the device tree if we've found a
163 * matching node.
164 */
165 if (of_address_to_resource(np, 0, &apbmisc) < 0) {
166 pr_err("failed to get APBMISC registers\n");
167 return;
168 }
169
170 if (of_address_to_resource(np, 1, &straps) < 0) {
171 pr_err("failed to get strapping options registers\n");
172 return;
173 }
129 } 174 }
130 175
131 strapping_base = of_iomap(np, 1); 176 apbmisc_base = ioremap_nocache(apbmisc.start, resource_size(&apbmisc));
177 if (!apbmisc_base)
178 pr_err("failed to map APBMISC registers\n");
179
180 strapping_base = ioremap_nocache(straps.start, resource_size(&straps));
132 if (!strapping_base) 181 if (!strapping_base)
133 pr_err("ioremap tegra strapping_base failed\n"); 182 pr_err("failed to map strapping options registers\n");
134 183
135 long_ram_code = of_property_read_bool(np, "nvidia,long-ram-code"); 184 long_ram_code = of_property_read_bool(np, "nvidia,long-ram-code");
136} 185}