diff options
author | Eric Anholt <eric@anholt.net> | 2016-04-13 16:05:02 -0400 |
---|---|---|
committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-04-19 21:56:16 -0400 |
commit | 286259ef4b30bff092b223c530c7fa4dc5fd792d (patch) | |
tree | 9c3d775a9ec6b0577150a7119adebb7e2d6fbfa9 | |
parent | 3432a2e39742ebbd8b01890a742bd45b219d5d8f (diff) |
clk: bcm2835: Fix compiler warnings on 64-bit builds
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-rw-r--r-- | drivers/clk/bcm/clk-bcm2835.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c index 4c0f1b504e2f..87616ded5bbe 100644 --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c | |||
@@ -400,17 +400,17 @@ struct bcm2835_pll_ana_bits { | |||
400 | static const struct bcm2835_pll_ana_bits bcm2835_ana_default = { | 400 | static const struct bcm2835_pll_ana_bits bcm2835_ana_default = { |
401 | .mask0 = 0, | 401 | .mask0 = 0, |
402 | .set0 = 0, | 402 | .set0 = 0, |
403 | .mask1 = ~(A2W_PLL_KI_MASK | A2W_PLL_KP_MASK), | 403 | .mask1 = (u32)~(A2W_PLL_KI_MASK | A2W_PLL_KP_MASK), |
404 | .set1 = (2 << A2W_PLL_KI_SHIFT) | (8 << A2W_PLL_KP_SHIFT), | 404 | .set1 = (2 << A2W_PLL_KI_SHIFT) | (8 << A2W_PLL_KP_SHIFT), |
405 | .mask3 = ~A2W_PLL_KA_MASK, | 405 | .mask3 = (u32)~A2W_PLL_KA_MASK, |
406 | .set3 = (2 << A2W_PLL_KA_SHIFT), | 406 | .set3 = (2 << A2W_PLL_KA_SHIFT), |
407 | .fb_prediv_mask = BIT(14), | 407 | .fb_prediv_mask = BIT(14), |
408 | }; | 408 | }; |
409 | 409 | ||
410 | static const struct bcm2835_pll_ana_bits bcm2835_ana_pllh = { | 410 | static const struct bcm2835_pll_ana_bits bcm2835_ana_pllh = { |
411 | .mask0 = ~(A2W_PLLH_KA_MASK | A2W_PLLH_KI_LOW_MASK), | 411 | .mask0 = (u32)~(A2W_PLLH_KA_MASK | A2W_PLLH_KI_LOW_MASK), |
412 | .set0 = (2 << A2W_PLLH_KA_SHIFT) | (2 << A2W_PLLH_KI_LOW_SHIFT), | 412 | .set0 = (2 << A2W_PLLH_KA_SHIFT) | (2 << A2W_PLLH_KI_LOW_SHIFT), |
413 | .mask1 = ~(A2W_PLLH_KI_HIGH_MASK | A2W_PLLH_KP_MASK), | 413 | .mask1 = (u32)~(A2W_PLLH_KI_HIGH_MASK | A2W_PLLH_KP_MASK), |
414 | .set1 = (6 << A2W_PLLH_KP_SHIFT), | 414 | .set1 = (6 << A2W_PLLH_KP_SHIFT), |
415 | .mask3 = 0, | 415 | .mask3 = 0, |
416 | .set3 = 0, | 416 | .set3 = 0, |