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authorNaveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>2016-06-22 12:25:04 -0400
committerMichael Ellerman <mpe@ellerman.id.au>2016-06-24 01:15:14 -0400
commit277285b854c666308cf6cb92a696748f976d6f64 (patch)
tree204f154863f4a716cc79e0195ffaaa4d45685ea9
parentb1a057879af03f6e3b1700c909a6d089e83d1254 (diff)
powerpc/bpf/jit: Introduce rotate immediate instructions
Since we will be using the rotate immediate instructions for extended BPF JIT, let's introduce macros for the same. And since the shift immediate operations use the rotate immediate instructions, let's redo those macros to use the newly introduced instructions. Acked-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
-rw-r--r--arch/powerpc/include/asm/ppc-opcode.h2
-rw-r--r--arch/powerpc/net/bpf_jit.h20
2 files changed, 13 insertions, 9 deletions
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index 1d035c1cc889..fd8d640a8e28 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -272,6 +272,8 @@
272#define __PPC_SH(s) __PPC_WS(s) 272#define __PPC_SH(s) __PPC_WS(s)
273#define __PPC_MB(s) (((s) & 0x1f) << 6) 273#define __PPC_MB(s) (((s) & 0x1f) << 6)
274#define __PPC_ME(s) (((s) & 0x1f) << 1) 274#define __PPC_ME(s) (((s) & 0x1f) << 1)
275#define __PPC_MB64(s) (__PPC_MB(s) | ((s) & 0x20))
276#define __PPC_ME64(s) __PPC_MB64(s)
275#define __PPC_BI(s) (((s) & 0x1f) << 16) 277#define __PPC_BI(s) (((s) & 0x1f) << 16)
276#define __PPC_CT(t) (((t) & 0x0f) << 21) 278#define __PPC_CT(t) (((t) & 0x0f) << 21)
277 279
diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h
index 4c1e055ecd01..95d0e3809c9e 100644
--- a/arch/powerpc/net/bpf_jit.h
+++ b/arch/powerpc/net/bpf_jit.h
@@ -210,18 +210,20 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh);
210 ___PPC_RS(a) | ___PPC_RB(s)) 210 ___PPC_RS(a) | ___PPC_RB(s))
211#define PPC_SRW(d, a, s) EMIT(PPC_INST_SRW | ___PPC_RA(d) | \ 211#define PPC_SRW(d, a, s) EMIT(PPC_INST_SRW | ___PPC_RA(d) | \
212 ___PPC_RS(a) | ___PPC_RB(s)) 212 ___PPC_RS(a) | ___PPC_RB(s))
213#define PPC_RLWINM(d, a, i, mb, me) EMIT(PPC_INST_RLWINM | ___PPC_RA(d) | \
214 ___PPC_RS(a) | __PPC_SH(i) | \
215 __PPC_MB(mb) | __PPC_ME(me))
216#define PPC_RLDICR(d, a, i, me) EMIT(PPC_INST_RLDICR | ___PPC_RA(d) | \
217 ___PPC_RS(a) | __PPC_SH(i) | \
218 __PPC_ME64(me) | (((i) & 0x20) >> 4))
219
213/* slwi = rlwinm Rx, Ry, n, 0, 31-n */ 220/* slwi = rlwinm Rx, Ry, n, 0, 31-n */
214#define PPC_SLWI(d, a, i) EMIT(PPC_INST_RLWINM | ___PPC_RA(d) | \ 221#define PPC_SLWI(d, a, i) PPC_RLWINM(d, a, i, 0, 31-(i))
215 ___PPC_RS(a) | __PPC_SH(i) | \
216 __PPC_MB(0) | __PPC_ME(31-(i)))
217/* srwi = rlwinm Rx, Ry, 32-n, n, 31 */ 222/* srwi = rlwinm Rx, Ry, 32-n, n, 31 */
218#define PPC_SRWI(d, a, i) EMIT(PPC_INST_RLWINM | ___PPC_RA(d) | \ 223#define PPC_SRWI(d, a, i) PPC_RLWINM(d, a, 32-(i), i, 31)
219 ___PPC_RS(a) | __PPC_SH(32-(i)) | \
220 __PPC_MB(i) | __PPC_ME(31))
221/* sldi = rldicr Rx, Ry, n, 63-n */ 224/* sldi = rldicr Rx, Ry, n, 63-n */
222#define PPC_SLDI(d, a, i) EMIT(PPC_INST_RLDICR | ___PPC_RA(d) | \ 225#define PPC_SLDI(d, a, i) PPC_RLDICR(d, a, i, 63-(i))
223 ___PPC_RS(a) | __PPC_SH(i) | \ 226
224 __PPC_MB(63-(i)) | (((i) & 0x20) >> 4))
225#define PPC_NEG(d, a) EMIT(PPC_INST_NEG | ___PPC_RT(d) | ___PPC_RA(a)) 227#define PPC_NEG(d, a) EMIT(PPC_INST_NEG | ___PPC_RT(d) | ___PPC_RA(a))
226 228
227/* Long jump; (unconditional 'branch') */ 229/* Long jump; (unconditional 'branch') */