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authorChen, Gong <gong.chen@linux.intel.com>2014-06-11 16:57:27 -0400
committerTony Luck <tony.luck@intel.com>2014-06-23 13:12:29 -0400
commit0a2409aad38e97b1db55e6515b990be7b17060f6 (patch)
tree1536e63eff76d6c074547d00423b33fa6fdcc5fc
parent76ac8275f296b49c58f684825543bf4eb85d43d0 (diff)
trace, AER: Move trace into unified interface
AER uses a separate trace interface by now. To make it consistent, move it into unified RAS trace interface. Signed-off-by: Chen, Gong <gong.chen@linux.intel.com> Acked-by: Borislav Petkov <bp@suse.de> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat
-rw-r--r--drivers/pci/pcie/aer/Kconfig1
-rw-r--r--drivers/pci/pcie/aer/aerdrv_errprint.c4
-rw-r--r--include/ras/ras_event.h64
-rw-r--r--include/trace/events/ras.h77
4 files changed, 66 insertions, 80 deletions
diff --git a/drivers/pci/pcie/aer/Kconfig b/drivers/pci/pcie/aer/Kconfig
index 50e94e02378a..389440228c1d 100644
--- a/drivers/pci/pcie/aer/Kconfig
+++ b/drivers/pci/pcie/aer/Kconfig
@@ -5,6 +5,7 @@
5config PCIEAER 5config PCIEAER
6 boolean "Root Port Advanced Error Reporting support" 6 boolean "Root Port Advanced Error Reporting support"
7 depends on PCIEPORTBUS 7 depends on PCIEPORTBUS
8 select RAS
8 default y 9 default y
9 help 10 help
10 This enables PCI Express Root Port Advanced Error Reporting 11 This enables PCI Express Root Port Advanced Error Reporting
diff --git a/drivers/pci/pcie/aer/aerdrv_errprint.c b/drivers/pci/pcie/aer/aerdrv_errprint.c
index 36ed31b52198..35d06e177917 100644
--- a/drivers/pci/pcie/aer/aerdrv_errprint.c
+++ b/drivers/pci/pcie/aer/aerdrv_errprint.c
@@ -22,9 +22,7 @@
22#include <linux/cper.h> 22#include <linux/cper.h>
23 23
24#include "aerdrv.h" 24#include "aerdrv.h"
25 25#include <ras/ras_event.h>
26#define CREATE_TRACE_POINTS
27#include <trace/events/ras.h>
28 26
29#define AER_AGENT_RECEIVER 0 27#define AER_AGENT_RECEIVER 0
30#define AER_AGENT_REQUESTER 1 28#define AER_AGENT_REQUESTER 1
diff --git a/include/ras/ras_event.h b/include/ras/ras_event.h
index 21cdb0b7b0fb..acbcbb88eaaa 100644
--- a/include/ras/ras_event.h
+++ b/include/ras/ras_event.h
@@ -8,6 +8,7 @@
8#include <linux/tracepoint.h> 8#include <linux/tracepoint.h>
9#include <linux/edac.h> 9#include <linux/edac.h>
10#include <linux/ktime.h> 10#include <linux/ktime.h>
11#include <linux/aer.h>
11 12
12/* 13/*
13 * Hardware Events Report 14 * Hardware Events Report
@@ -94,6 +95,69 @@ TRACE_EVENT(mc_event,
94 __get_str(driver_detail)) 95 __get_str(driver_detail))
95); 96);
96 97
98/*
99 * PCIe AER Trace event
100 *
101 * These events are generated when hardware detects a corrected or
102 * uncorrected event on a PCIe device. The event report has
103 * the following structure:
104 *
105 * char * dev_name - The name of the slot where the device resides
106 * ([domain:]bus:device.function).
107 * u32 status - Either the correctable or uncorrectable register
108 * indicating what error or errors have been seen
109 * u8 severity - error severity 0:NONFATAL 1:FATAL 2:CORRECTED
110 */
111
112#define aer_correctable_errors \
113 {BIT(0), "Receiver Error"}, \
114 {BIT(6), "Bad TLP"}, \
115 {BIT(7), "Bad DLLP"}, \
116 {BIT(8), "RELAY_NUM Rollover"}, \
117 {BIT(12), "Replay Timer Timeout"}, \
118 {BIT(13), "Advisory Non-Fatal"}
119
120#define aer_uncorrectable_errors \
121 {BIT(4), "Data Link Protocol"}, \
122 {BIT(12), "Poisoned TLP"}, \
123 {BIT(13), "Flow Control Protocol"}, \
124 {BIT(14), "Completion Timeout"}, \
125 {BIT(15), "Completer Abort"}, \
126 {BIT(16), "Unexpected Completion"}, \
127 {BIT(17), "Receiver Overflow"}, \
128 {BIT(18), "Malformed TLP"}, \
129 {BIT(19), "ECRC"}, \
130 {BIT(20), "Unsupported Request"}
131
132TRACE_EVENT(aer_event,
133 TP_PROTO(const char *dev_name,
134 const u32 status,
135 const u8 severity),
136
137 TP_ARGS(dev_name, status, severity),
138
139 TP_STRUCT__entry(
140 __string( dev_name, dev_name )
141 __field( u32, status )
142 __field( u8, severity )
143 ),
144
145 TP_fast_assign(
146 __assign_str(dev_name, dev_name);
147 __entry->status = status;
148 __entry->severity = severity;
149 ),
150
151 TP_printk("%s PCIe Bus Error: severity=%s, %s\n",
152 __get_str(dev_name),
153 __entry->severity == AER_CORRECTABLE ? "Corrected" :
154 __entry->severity == AER_FATAL ?
155 "Fatal" : "Uncorrected, non-fatal",
156 __entry->severity == AER_CORRECTABLE ?
157 __print_flags(__entry->status, "|", aer_correctable_errors) :
158 __print_flags(__entry->status, "|", aer_uncorrectable_errors))
159);
160
97#endif /* _TRACE_HW_EVENT_MC_H */ 161#endif /* _TRACE_HW_EVENT_MC_H */
98 162
99/* This part must be outside protection */ 163/* This part must be outside protection */
diff --git a/include/trace/events/ras.h b/include/trace/events/ras.h
deleted file mode 100644
index 1c875ad1ee5f..000000000000
--- a/include/trace/events/ras.h
+++ /dev/null
@@ -1,77 +0,0 @@
1#undef TRACE_SYSTEM
2#define TRACE_SYSTEM ras
3
4#if !defined(_TRACE_AER_H) || defined(TRACE_HEADER_MULTI_READ)
5#define _TRACE_AER_H
6
7#include <linux/tracepoint.h>
8#include <linux/aer.h>
9
10
11/*
12 * PCIe AER Trace event
13 *
14 * These events are generated when hardware detects a corrected or
15 * uncorrected event on a PCIe device. The event report has
16 * the following structure:
17 *
18 * char * dev_name - The name of the slot where the device resides
19 * ([domain:]bus:device.function).
20 * u32 status - Either the correctable or uncorrectable register
21 * indicating what error or errors have been seen
22 * u8 severity - error severity 0:NONFATAL 1:FATAL 2:CORRECTED
23 */
24
25#define aer_correctable_errors \
26 {BIT(0), "Receiver Error"}, \
27 {BIT(6), "Bad TLP"}, \
28 {BIT(7), "Bad DLLP"}, \
29 {BIT(8), "RELAY_NUM Rollover"}, \
30 {BIT(12), "Replay Timer Timeout"}, \
31 {BIT(13), "Advisory Non-Fatal"}
32
33#define aer_uncorrectable_errors \
34 {BIT(4), "Data Link Protocol"}, \
35 {BIT(12), "Poisoned TLP"}, \
36 {BIT(13), "Flow Control Protocol"}, \
37 {BIT(14), "Completion Timeout"}, \
38 {BIT(15), "Completer Abort"}, \
39 {BIT(16), "Unexpected Completion"}, \
40 {BIT(17), "Receiver Overflow"}, \
41 {BIT(18), "Malformed TLP"}, \
42 {BIT(19), "ECRC"}, \
43 {BIT(20), "Unsupported Request"}
44
45TRACE_EVENT(aer_event,
46 TP_PROTO(const char *dev_name,
47 const u32 status,
48 const u8 severity),
49
50 TP_ARGS(dev_name, status, severity),
51
52 TP_STRUCT__entry(
53 __string( dev_name, dev_name )
54 __field( u32, status )
55 __field( u8, severity )
56 ),
57
58 TP_fast_assign(
59 __assign_str(dev_name, dev_name);
60 __entry->status = status;
61 __entry->severity = severity;
62 ),
63
64 TP_printk("%s PCIe Bus Error: severity=%s, %s\n",
65 __get_str(dev_name),
66 __entry->severity == AER_CORRECTABLE ? "Corrected" :
67 __entry->severity == AER_FATAL ?
68 "Fatal" : "Uncorrected, non-fatal",
69 __entry->severity == AER_CORRECTABLE ?
70 __print_flags(__entry->status, "|", aer_correctable_errors) :
71 __print_flags(__entry->status, "|", aer_uncorrectable_errors))
72);
73
74#endif /* _TRACE_AER_H */
75
76/* This part must be outside protection */
77#include <trace/define_trace.h>
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-28 01:39:05 -0400