diff options
author | Gregory Fong <gregory.0xf0@gmail.com> | 2014-07-22 19:34:23 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-07-24 09:40:26 -0400 |
commit | 04fcab32d3fa1d3f6afe97e0ab431c5572e07a2c (patch) | |
tree | 5f911a6b843c1b1bdb6539ffcb606259bde52afa | |
parent | c51e78ed58e4e4e772bdd7897470ab2e7142f9c2 (diff) |
ARM: 8111/1: Enable erratum 798181 for Broadcom Brahma-B15
Broadcom Brahma-B15 (r0p0..r0p2) is also affected by Cortex-A15
erratum 798181, so enable the workaround for Brahma-B15.
Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com>
Acked-by: Marc Carino <marc.ceeeee@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r-- | arch/arm/kernel/smp_tlb.c | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/arch/arm/kernel/smp_tlb.c b/arch/arm/kernel/smp_tlb.c index 95d063620b76..2e72be4f623e 100644 --- a/arch/arm/kernel/smp_tlb.c +++ b/arch/arm/kernel/smp_tlb.c | |||
@@ -92,15 +92,19 @@ void erratum_a15_798181_init(void) | |||
92 | unsigned int midr = read_cpuid_id(); | 92 | unsigned int midr = read_cpuid_id(); |
93 | unsigned int revidr = read_cpuid(CPUID_REVIDR); | 93 | unsigned int revidr = read_cpuid(CPUID_REVIDR); |
94 | 94 | ||
95 | /* Cortex-A15 r0p0..r3p2 w/o ECO fix affected */ | 95 | /* Brahma-B15 r0p0..r0p2 affected |
96 | if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2 || | 96 | * Cortex-A15 r0p0..r3p2 w/o ECO fix affected */ |
97 | (revidr & 0x210) == 0x210) { | 97 | if ((midr & 0xff0ffff0) == 0x420f00f0 && midr <= 0x420f00f2) |
98 | return; | ||
99 | } | ||
100 | if (revidr & 0x10) | ||
101 | erratum_a15_798181_handler = erratum_a15_798181_partial; | ||
102 | else | ||
103 | erratum_a15_798181_handler = erratum_a15_798181_broadcast; | 98 | erratum_a15_798181_handler = erratum_a15_798181_broadcast; |
99 | else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr <= 0x413fc0f2 && | ||
100 | (revidr & 0x210) != 0x210) { | ||
101 | if (revidr & 0x10) | ||
102 | erratum_a15_798181_handler = | ||
103 | erratum_a15_798181_partial; | ||
104 | else | ||
105 | erratum_a15_798181_handler = | ||
106 | erratum_a15_798181_broadcast; | ||
107 | } | ||
104 | } | 108 | } |
105 | #endif | 109 | #endif |
106 | 110 | ||