diff options
author | Thierry Reding <treding@nvidia.com> | 2015-03-23 09:44:08 -0400 |
---|---|---|
committer | Thierry Reding <treding@nvidia.com> | 2015-07-16 04:38:29 -0400 |
commit | 03b3f4c8b76180ba5bd800c57a7efdb142c2341d (patch) | |
tree | 75c2f5eee4c37fc2f1a86cd22961b75b707cec2e | |
parent | 0dc5a0d836751099f2e08deec28f56ec881925dd (diff) |
soc/tegra: fuse: Rename core_* to soc_*
There's a mixture of core_* and soc_* prefixes for variables storing
information related to the VDD_CORE rail. Choose one (soc_*) and use it
more consistently.
Signed-off-by: Thierry Reding <treding@nvidia.com>
-rw-r--r-- | drivers/soc/tegra/fuse/fuse-tegra.c | 8 | ||||
-rw-r--r-- | drivers/soc/tegra/fuse/fuse-tegra20.c | 2 | ||||
-rw-r--r-- | drivers/soc/tegra/fuse/fuse-tegra30.c | 2 | ||||
-rw-r--r-- | drivers/soc/tegra/fuse/speedo-tegra114.c | 16 | ||||
-rw-r--r-- | drivers/soc/tegra/fuse/speedo-tegra124.c | 12 | ||||
-rw-r--r-- | drivers/soc/tegra/fuse/speedo-tegra20.c | 22 | ||||
-rw-r--r-- | drivers/soc/tegra/fuse/speedo-tegra30.c | 26 | ||||
-rw-r--r-- | include/soc/tegra/fuse.h | 2 |
8 files changed, 45 insertions, 45 deletions
diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c index 5a0846474cb4..de2c1bfe28b5 100644 --- a/drivers/soc/tegra/fuse/fuse-tegra.c +++ b/drivers/soc/tegra/fuse/fuse-tegra.c | |||
@@ -304,12 +304,12 @@ static int __init tegra_init_fuse(void) | |||
304 | 304 | ||
305 | fuse->soc->init(fuse); | 305 | fuse->soc->init(fuse); |
306 | 306 | ||
307 | pr_info("Tegra Revision: %s SKU: %d CPU Process: %d Core Process: %d\n", | 307 | pr_info("Tegra Revision: %s SKU: %d CPU Process: %d SoC Process: %d\n", |
308 | tegra_revision_name[tegra_sku_info.revision], | 308 | tegra_revision_name[tegra_sku_info.revision], |
309 | tegra_sku_info.sku_id, tegra_sku_info.cpu_process_id, | 309 | tegra_sku_info.sku_id, tegra_sku_info.cpu_process_id, |
310 | tegra_sku_info.core_process_id); | 310 | tegra_sku_info.soc_process_id); |
311 | pr_debug("Tegra CPU Speedo ID %d, Soc Speedo ID %d\n", | 311 | pr_debug("Tegra CPU Speedo ID %d, SoC Speedo ID %d\n", |
312 | tegra_sku_info.cpu_speedo_id, tegra_sku_info.soc_speedo_id); | 312 | tegra_sku_info.cpu_speedo_id, tegra_sku_info.soc_speedo_id); |
313 | 313 | ||
314 | return 0; | 314 | return 0; |
315 | } | 315 | } |
diff --git a/drivers/soc/tegra/fuse/fuse-tegra20.c b/drivers/soc/tegra/fuse/fuse-tegra20.c index b2f2aaad5627..294413a969a0 100644 --- a/drivers/soc/tegra/fuse/fuse-tegra20.c +++ b/drivers/soc/tegra/fuse/fuse-tegra20.c | |||
@@ -143,7 +143,7 @@ static void __init tegra20_fuse_add_randomness(void) | |||
143 | randomness[1] = tegra_read_straps(); | 143 | randomness[1] = tegra_read_straps(); |
144 | randomness[2] = tegra_read_chipid(); | 144 | randomness[2] = tegra_read_chipid(); |
145 | randomness[3] = tegra_sku_info.cpu_process_id << 16; | 145 | randomness[3] = tegra_sku_info.cpu_process_id << 16; |
146 | randomness[3] |= tegra_sku_info.core_process_id; | 146 | randomness[3] |= tegra_sku_info.soc_process_id; |
147 | randomness[4] = tegra_sku_info.cpu_speedo_id << 16; | 147 | randomness[4] = tegra_sku_info.cpu_speedo_id << 16; |
148 | randomness[4] |= tegra_sku_info.soc_speedo_id; | 148 | randomness[4] |= tegra_sku_info.soc_speedo_id; |
149 | randomness[5] = tegra_fuse_read_early(FUSE_UID_LOW); | 149 | randomness[5] = tegra_fuse_read_early(FUSE_UID_LOW); |
diff --git a/drivers/soc/tegra/fuse/fuse-tegra30.c b/drivers/soc/tegra/fuse/fuse-tegra30.c index 60820baf4364..1e184f5dc31b 100644 --- a/drivers/soc/tegra/fuse/fuse-tegra30.c +++ b/drivers/soc/tegra/fuse/fuse-tegra30.c | |||
@@ -78,7 +78,7 @@ static void __init tegra30_fuse_add_randomness(void) | |||
78 | randomness[1] = tegra_read_straps(); | 78 | randomness[1] = tegra_read_straps(); |
79 | randomness[2] = tegra_read_chipid(); | 79 | randomness[2] = tegra_read_chipid(); |
80 | randomness[3] = tegra_sku_info.cpu_process_id << 16; | 80 | randomness[3] = tegra_sku_info.cpu_process_id << 16; |
81 | randomness[3] |= tegra_sku_info.core_process_id; | 81 | randomness[3] |= tegra_sku_info.soc_process_id; |
82 | randomness[4] = tegra_sku_info.cpu_speedo_id << 16; | 82 | randomness[4] = tegra_sku_info.cpu_speedo_id << 16; |
83 | randomness[4] |= tegra_sku_info.soc_speedo_id; | 83 | randomness[4] |= tegra_sku_info.soc_speedo_id; |
84 | randomness[5] = tegra_fuse_read_early(FUSE_VENDOR_CODE); | 84 | randomness[5] = tegra_fuse_read_early(FUSE_VENDOR_CODE); |
diff --git a/drivers/soc/tegra/fuse/speedo-tegra114.c b/drivers/soc/tegra/fuse/speedo-tegra114.c index 554c54b98b0c..1ba41ebbb23d 100644 --- a/drivers/soc/tegra/fuse/speedo-tegra114.c +++ b/drivers/soc/tegra/fuse/speedo-tegra114.c | |||
@@ -22,7 +22,7 @@ | |||
22 | 22 | ||
23 | #include "fuse.h" | 23 | #include "fuse.h" |
24 | 24 | ||
25 | #define CORE_PROCESS_CORNERS 2 | 25 | #define SOC_PROCESS_CORNERS 2 |
26 | #define CPU_PROCESS_CORNERS 2 | 26 | #define CPU_PROCESS_CORNERS 2 |
27 | 27 | ||
28 | enum { | 28 | enum { |
@@ -31,7 +31,7 @@ enum { | |||
31 | THRESHOLD_INDEX_COUNT, | 31 | THRESHOLD_INDEX_COUNT, |
32 | }; | 32 | }; |
33 | 33 | ||
34 | static const u32 __initconst core_process_speedos[][CORE_PROCESS_CORNERS] = { | 34 | static const u32 __initconst soc_process_speedos[][SOC_PROCESS_CORNERS] = { |
35 | {1123, UINT_MAX}, | 35 | {1123, UINT_MAX}, |
36 | {0, UINT_MAX}, | 36 | {0, UINT_MAX}, |
37 | }; | 37 | }; |
@@ -84,27 +84,27 @@ static void __init rev_sku_to_speedo_ids(struct tegra_sku_info *sku_info, | |||
84 | void __init tegra114_init_speedo_data(struct tegra_sku_info *sku_info) | 84 | void __init tegra114_init_speedo_data(struct tegra_sku_info *sku_info) |
85 | { | 85 | { |
86 | u32 cpu_speedo_val; | 86 | u32 cpu_speedo_val; |
87 | u32 core_speedo_val; | 87 | u32 soc_speedo_val; |
88 | int threshold; | 88 | int threshold; |
89 | int i; | 89 | int i; |
90 | 90 | ||
91 | BUILD_BUG_ON(ARRAY_SIZE(cpu_process_speedos) != | 91 | BUILD_BUG_ON(ARRAY_SIZE(cpu_process_speedos) != |
92 | THRESHOLD_INDEX_COUNT); | 92 | THRESHOLD_INDEX_COUNT); |
93 | BUILD_BUG_ON(ARRAY_SIZE(core_process_speedos) != | 93 | BUILD_BUG_ON(ARRAY_SIZE(soc_process_speedos) != |
94 | THRESHOLD_INDEX_COUNT); | 94 | THRESHOLD_INDEX_COUNT); |
95 | 95 | ||
96 | rev_sku_to_speedo_ids(sku_info, &threshold); | 96 | rev_sku_to_speedo_ids(sku_info, &threshold); |
97 | 97 | ||
98 | cpu_speedo_val = tegra_fuse_read_early(0x12c) + 1024; | 98 | cpu_speedo_val = tegra_fuse_read_early(0x12c) + 1024; |
99 | core_speedo_val = tegra_fuse_read_early(0x134); | 99 | soc_speedo_val = tegra_fuse_read_early(0x134); |
100 | 100 | ||
101 | for (i = 0; i < CPU_PROCESS_CORNERS; i++) | 101 | for (i = 0; i < CPU_PROCESS_CORNERS; i++) |
102 | if (cpu_speedo_val < cpu_process_speedos[threshold][i]) | 102 | if (cpu_speedo_val < cpu_process_speedos[threshold][i]) |
103 | break; | 103 | break; |
104 | sku_info->cpu_process_id = i; | 104 | sku_info->cpu_process_id = i; |
105 | 105 | ||
106 | for (i = 0; i < CORE_PROCESS_CORNERS; i++) | 106 | for (i = 0; i < SOC_PROCESS_CORNERS; i++) |
107 | if (core_speedo_val < core_process_speedos[threshold][i]) | 107 | if (soc_speedo_val < soc_process_speedos[threshold][i]) |
108 | break; | 108 | break; |
109 | sku_info->core_process_id = i; | 109 | sku_info->soc_process_id = i; |
110 | } | 110 | } |
diff --git a/drivers/soc/tegra/fuse/speedo-tegra124.c b/drivers/soc/tegra/fuse/speedo-tegra124.c index d1e896d8d8a2..a63a134101ab 100644 --- a/drivers/soc/tegra/fuse/speedo-tegra124.c +++ b/drivers/soc/tegra/fuse/speedo-tegra124.c | |||
@@ -24,7 +24,7 @@ | |||
24 | 24 | ||
25 | #define CPU_PROCESS_CORNERS 2 | 25 | #define CPU_PROCESS_CORNERS 2 |
26 | #define GPU_PROCESS_CORNERS 2 | 26 | #define GPU_PROCESS_CORNERS 2 |
27 | #define CORE_PROCESS_CORNERS 2 | 27 | #define SOC_PROCESS_CORNERS 2 |
28 | 28 | ||
29 | #define FUSE_CPU_SPEEDO_0 0x14 | 29 | #define FUSE_CPU_SPEEDO_0 0x14 |
30 | #define FUSE_CPU_SPEEDO_1 0x2c | 30 | #define FUSE_CPU_SPEEDO_1 0x2c |
@@ -53,7 +53,7 @@ static const u32 __initconst gpu_process_speedos[][GPU_PROCESS_CORNERS] = { | |||
53 | {0, UINT_MAX}, | 53 | {0, UINT_MAX}, |
54 | }; | 54 | }; |
55 | 55 | ||
56 | static const u32 __initconst core_process_speedos[][CORE_PROCESS_CORNERS] = { | 56 | static const u32 __initconst soc_process_speedos[][SOC_PROCESS_CORNERS] = { |
57 | {2101, UINT_MAX}, | 57 | {2101, UINT_MAX}, |
58 | {0, UINT_MAX}, | 58 | {0, UINT_MAX}, |
59 | }; | 59 | }; |
@@ -119,7 +119,7 @@ void __init tegra124_init_speedo_data(struct tegra_sku_info *sku_info) | |||
119 | THRESHOLD_INDEX_COUNT); | 119 | THRESHOLD_INDEX_COUNT); |
120 | BUILD_BUG_ON(ARRAY_SIZE(gpu_process_speedos) != | 120 | BUILD_BUG_ON(ARRAY_SIZE(gpu_process_speedos) != |
121 | THRESHOLD_INDEX_COUNT); | 121 | THRESHOLD_INDEX_COUNT); |
122 | BUILD_BUG_ON(ARRAY_SIZE(core_process_speedos) != | 122 | BUILD_BUG_ON(ARRAY_SIZE(soc_process_speedos) != |
123 | THRESHOLD_INDEX_COUNT); | 123 | THRESHOLD_INDEX_COUNT); |
124 | 124 | ||
125 | cpu_speedo_0_value = tegra_fuse_read_early(FUSE_CPU_SPEEDO_0); | 125 | cpu_speedo_0_value = tegra_fuse_read_early(FUSE_CPU_SPEEDO_0); |
@@ -157,11 +157,11 @@ void __init tegra124_init_speedo_data(struct tegra_sku_info *sku_info) | |||
157 | break; | 157 | break; |
158 | sku_info->cpu_process_id = i; | 158 | sku_info->cpu_process_id = i; |
159 | 159 | ||
160 | for (i = 0; i < CORE_PROCESS_CORNERS; i++) | 160 | for (i = 0; i < SOC_PROCESS_CORNERS; i++) |
161 | if (soc_speedo_0_value < | 161 | if (soc_speedo_0_value < |
162 | core_process_speedos[threshold][i]) | 162 | soc_process_speedos[threshold][i]) |
163 | break; | 163 | break; |
164 | sku_info->core_process_id = i; | 164 | sku_info->soc_process_id = i; |
165 | 165 | ||
166 | pr_debug("Tegra GPU Speedo ID=%d, Speedo Value=%d\n", | 166 | pr_debug("Tegra GPU Speedo ID=%d, Speedo Value=%d\n", |
167 | sku_info->gpu_speedo_id, sku_info->gpu_speedo_value); | 167 | sku_info->gpu_speedo_id, sku_info->gpu_speedo_value); |
diff --git a/drivers/soc/tegra/fuse/speedo-tegra20.c b/drivers/soc/tegra/fuse/speedo-tegra20.c index ed5180b01e17..5f7818bf6072 100644 --- a/drivers/soc/tegra/fuse/speedo-tegra20.c +++ b/drivers/soc/tegra/fuse/speedo-tegra20.c | |||
@@ -28,11 +28,11 @@ | |||
28 | #define CPU_SPEEDO_REDUND_MSBIT 39 | 28 | #define CPU_SPEEDO_REDUND_MSBIT 39 |
29 | #define CPU_SPEEDO_REDUND_OFFS (CPU_SPEEDO_REDUND_MSBIT - CPU_SPEEDO_MSBIT) | 29 | #define CPU_SPEEDO_REDUND_OFFS (CPU_SPEEDO_REDUND_MSBIT - CPU_SPEEDO_MSBIT) |
30 | 30 | ||
31 | #define CORE_SPEEDO_LSBIT 40 | 31 | #define SOC_SPEEDO_LSBIT 40 |
32 | #define CORE_SPEEDO_MSBIT 47 | 32 | #define SOC_SPEEDO_MSBIT 47 |
33 | #define CORE_SPEEDO_REDUND_LSBIT 48 | 33 | #define SOC_SPEEDO_REDUND_LSBIT 48 |
34 | #define CORE_SPEEDO_REDUND_MSBIT 55 | 34 | #define SOC_SPEEDO_REDUND_MSBIT 55 |
35 | #define CORE_SPEEDO_REDUND_OFFS (CORE_SPEEDO_REDUND_MSBIT - CORE_SPEEDO_MSBIT) | 35 | #define SOC_SPEEDO_REDUND_OFFS (SOC_SPEEDO_REDUND_MSBIT - SOC_SPEEDO_MSBIT) |
36 | 36 | ||
37 | #define SPEEDO_MULT 4 | 37 | #define SPEEDO_MULT 4 |
38 | 38 | ||
@@ -56,7 +56,7 @@ static const u32 __initconst cpu_process_speedos[][PROCESS_CORNERS_NUM] = { | |||
56 | {316, 331, 383, UINT_MAX}, | 56 | {316, 331, 383, UINT_MAX}, |
57 | }; | 57 | }; |
58 | 58 | ||
59 | static const u32 __initconst core_process_speedos[][PROCESS_CORNERS_NUM] = { | 59 | static const u32 __initconst soc_process_speedos[][PROCESS_CORNERS_NUM] = { |
60 | {165, 195, 224, UINT_MAX}, | 60 | {165, 195, 224, UINT_MAX}, |
61 | {165, 195, 224, UINT_MAX}, | 61 | {165, 195, 224, UINT_MAX}, |
62 | {165, 195, 224, UINT_MAX}, | 62 | {165, 195, 224, UINT_MAX}, |
@@ -69,7 +69,7 @@ void __init tegra20_init_speedo_data(struct tegra_sku_info *sku_info) | |||
69 | int i; | 69 | int i; |
70 | 70 | ||
71 | BUILD_BUG_ON(ARRAY_SIZE(cpu_process_speedos) != SPEEDO_ID_COUNT); | 71 | BUILD_BUG_ON(ARRAY_SIZE(cpu_process_speedos) != SPEEDO_ID_COUNT); |
72 | BUILD_BUG_ON(ARRAY_SIZE(core_process_speedos) != SPEEDO_ID_COUNT); | 72 | BUILD_BUG_ON(ARRAY_SIZE(soc_process_speedos) != SPEEDO_ID_COUNT); |
73 | 73 | ||
74 | if (SPEEDO_ID_SELECT_0(sku_info->revision)) | 74 | if (SPEEDO_ID_SELECT_0(sku_info->revision)) |
75 | sku_info->soc_speedo_id = SPEEDO_ID_0; | 75 | sku_info->soc_speedo_id = SPEEDO_ID_0; |
@@ -94,17 +94,17 @@ void __init tegra20_init_speedo_data(struct tegra_sku_info *sku_info) | |||
94 | sku_info->cpu_process_id = i; | 94 | sku_info->cpu_process_id = i; |
95 | 95 | ||
96 | val = 0; | 96 | val = 0; |
97 | for (i = CORE_SPEEDO_MSBIT; i >= CORE_SPEEDO_LSBIT; i--) { | 97 | for (i = SOC_SPEEDO_MSBIT; i >= SOC_SPEEDO_LSBIT; i--) { |
98 | reg = tegra_fuse_read_spare(i) | | 98 | reg = tegra_fuse_read_spare(i) | |
99 | tegra_fuse_read_spare(i + CORE_SPEEDO_REDUND_OFFS); | 99 | tegra_fuse_read_spare(i + SOC_SPEEDO_REDUND_OFFS); |
100 | val = (val << 1) | (reg & 0x1); | 100 | val = (val << 1) | (reg & 0x1); |
101 | } | 101 | } |
102 | val = val * SPEEDO_MULT; | 102 | val = val * SPEEDO_MULT; |
103 | pr_debug("Core speedo value %u\n", val); | 103 | pr_debug("Core speedo value %u\n", val); |
104 | 104 | ||
105 | for (i = 0; i < (PROCESS_CORNERS_NUM - 1); i++) { | 105 | for (i = 0; i < (PROCESS_CORNERS_NUM - 1); i++) { |
106 | if (val <= core_process_speedos[sku_info->soc_speedo_id][i]) | 106 | if (val <= soc_process_speedos[sku_info->soc_speedo_id][i]) |
107 | break; | 107 | break; |
108 | } | 108 | } |
109 | sku_info->core_process_id = i; | 109 | sku_info->soc_process_id = i; |
110 | } | 110 | } |
diff --git a/drivers/soc/tegra/fuse/speedo-tegra30.c b/drivers/soc/tegra/fuse/speedo-tegra30.c index fd0cefae54ef..9b010b3ef009 100644 --- a/drivers/soc/tegra/fuse/speedo-tegra30.c +++ b/drivers/soc/tegra/fuse/speedo-tegra30.c | |||
@@ -22,7 +22,7 @@ | |||
22 | 22 | ||
23 | #include "fuse.h" | 23 | #include "fuse.h" |
24 | 24 | ||
25 | #define CORE_PROCESS_CORNERS 1 | 25 | #define SOC_PROCESS_CORNERS 1 |
26 | #define CPU_PROCESS_CORNERS 6 | 26 | #define CPU_PROCESS_CORNERS 6 |
27 | 27 | ||
28 | #define FUSE_SPEEDO_CALIB_0 0x14 | 28 | #define FUSE_SPEEDO_CALIB_0 0x14 |
@@ -54,7 +54,7 @@ enum { | |||
54 | THRESHOLD_INDEX_COUNT, | 54 | THRESHOLD_INDEX_COUNT, |
55 | }; | 55 | }; |
56 | 56 | ||
57 | static const u32 __initconst core_process_speedos[][CORE_PROCESS_CORNERS] = { | 57 | static const u32 __initconst soc_process_speedos[][SOC_PROCESS_CORNERS] = { |
58 | {180}, | 58 | {180}, |
59 | {170}, | 59 | {170}, |
60 | {195}, | 60 | {195}, |
@@ -246,19 +246,19 @@ static void __init rev_sku_to_speedo_ids(struct tegra_sku_info *sku_info) | |||
246 | void __init tegra30_init_speedo_data(struct tegra_sku_info *sku_info) | 246 | void __init tegra30_init_speedo_data(struct tegra_sku_info *sku_info) |
247 | { | 247 | { |
248 | u32 cpu_speedo_val; | 248 | u32 cpu_speedo_val; |
249 | u32 core_speedo_val; | 249 | u32 soc_speedo_val; |
250 | int i; | 250 | int i; |
251 | 251 | ||
252 | BUILD_BUG_ON(ARRAY_SIZE(cpu_process_speedos) != | 252 | BUILD_BUG_ON(ARRAY_SIZE(cpu_process_speedos) != |
253 | THRESHOLD_INDEX_COUNT); | 253 | THRESHOLD_INDEX_COUNT); |
254 | BUILD_BUG_ON(ARRAY_SIZE(core_process_speedos) != | 254 | BUILD_BUG_ON(ARRAY_SIZE(soc_process_speedos) != |
255 | THRESHOLD_INDEX_COUNT); | 255 | THRESHOLD_INDEX_COUNT); |
256 | 256 | ||
257 | 257 | ||
258 | rev_sku_to_speedo_ids(sku_info); | 258 | rev_sku_to_speedo_ids(sku_info); |
259 | fuse_speedo_calib(&cpu_speedo_val, &core_speedo_val); | 259 | fuse_speedo_calib(&cpu_speedo_val, &soc_speedo_val); |
260 | pr_debug("Tegra CPU speedo value %u\n", cpu_speedo_val); | 260 | pr_debug("Tegra CPU speedo value %u\n", cpu_speedo_val); |
261 | pr_debug("Tegra Core speedo value %u\n", core_speedo_val); | 261 | pr_debug("Tegra Core speedo value %u\n", soc_speedo_val); |
262 | 262 | ||
263 | for (i = 0; i < CPU_PROCESS_CORNERS; i++) { | 263 | for (i = 0; i < CPU_PROCESS_CORNERS; i++) { |
264 | if (cpu_speedo_val < cpu_process_speedos[threshold_index][i]) | 264 | if (cpu_speedo_val < cpu_process_speedos[threshold_index][i]) |
@@ -273,16 +273,16 @@ void __init tegra30_init_speedo_data(struct tegra_sku_info *sku_info) | |||
273 | sku_info->cpu_speedo_id = 1; | 273 | sku_info->cpu_speedo_id = 1; |
274 | } | 274 | } |
275 | 275 | ||
276 | for (i = 0; i < CORE_PROCESS_CORNERS; i++) { | 276 | for (i = 0; i < SOC_PROCESS_CORNERS; i++) { |
277 | if (core_speedo_val < core_process_speedos[threshold_index][i]) | 277 | if (soc_speedo_val < soc_process_speedos[threshold_index][i]) |
278 | break; | 278 | break; |
279 | } | 279 | } |
280 | sku_info->core_process_id = i - 1; | 280 | sku_info->soc_process_id = i - 1; |
281 | 281 | ||
282 | if (sku_info->core_process_id == -1) { | 282 | if (sku_info->soc_process_id == -1) { |
283 | pr_warn("Tegra CORE speedo value %3d out of range", | 283 | pr_warn("Tegra SoC speedo value %3d out of range", |
284 | core_speedo_val); | 284 | soc_speedo_val); |
285 | sku_info->core_process_id = 0; | 285 | sku_info->soc_process_id = 0; |
286 | sku_info->soc_speedo_id = 1; | 286 | sku_info->soc_speedo_id = 1; |
287 | } | 287 | } |
288 | } | 288 | } |
diff --git a/include/soc/tegra/fuse.h b/include/soc/tegra/fuse.h index 4a0eb02d2cba..961b821b6a46 100644 --- a/include/soc/tegra/fuse.h +++ b/include/soc/tegra/fuse.h | |||
@@ -48,7 +48,7 @@ struct tegra_sku_info { | |||
48 | int cpu_speedo_id; | 48 | int cpu_speedo_id; |
49 | int cpu_speedo_value; | 49 | int cpu_speedo_value; |
50 | int cpu_iddq_value; | 50 | int cpu_iddq_value; |
51 | int core_process_id; | 51 | int soc_process_id; |
52 | int soc_speedo_id; | 52 | int soc_speedo_id; |
53 | int soc_speedo_value; | 53 | int soc_speedo_value; |
54 | int gpu_process_id; | 54 | int gpu_process_id; |