diff options
| author | Joel Stanley <joel@jms.id.au> | 2016-04-17 02:20:56 -0400 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2016-05-09 04:11:58 -0400 |
| commit | 02440622656d26a0d68308db9e4ce1d2510f6530 (patch) | |
| tree | d450ad7460a0b74243cbcb1e56310d91d5671fc4 | |
| parent | d44a1138cd829d232899ef4fe5cd59e861ed3984 (diff) | |
arm/dst: Add Aspeed ast2500 device tree
This adds a common device tree for all fifth generation Aspeed systems,
and a board specific device tree for the ast2500 evaluation board.
Signed-off-by: Joel Stanley <joel@jms.id.au>
| -rw-r--r-- | arch/arm/boot/dts/Makefile | 3 | ||||
| -rw-r--r-- | arch/arm/boot/dts/aspeed-ast2500-evb.dts | 25 | ||||
| -rw-r--r-- | arch/arm/boot/dts/aspeed-g5.dtsi | 170 |
3 files changed, 197 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index dee3a92cbd3c..98251828883f 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile | |||
| @@ -839,7 +839,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ | |||
| 839 | mt8127-moose.dtb \ | 839 | mt8127-moose.dtb \ |
| 840 | mt8135-evbp1.dtb | 840 | mt8135-evbp1.dtb |
| 841 | dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb | 841 | dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb |
| 842 | dtb-$(CONFIG_ARCH_ASPEED) += aspeed-bmc-opp-palmetto.dtb | 842 | dtb-$(CONFIG_ARCH_ASPEED) += aspeed-bmc-opp-palmetto.dtb \ |
| 843 | aspeed-ast2500-evb.dtb | ||
| 843 | endif | 844 | endif |
| 844 | 845 | ||
| 845 | dtstree := $(srctree)/$(src) | 846 | dtstree := $(srctree)/$(src) |
diff --git a/arch/arm/boot/dts/aspeed-ast2500-evb.dts b/arch/arm/boot/dts/aspeed-ast2500-evb.dts new file mode 100644 index 000000000000..1b7a5ff0e533 --- /dev/null +++ b/arch/arm/boot/dts/aspeed-ast2500-evb.dts | |||
| @@ -0,0 +1,25 @@ | |||
| 1 | /dts-v1/; | ||
| 2 | |||
| 3 | #include "aspeed-g5.dtsi" | ||
| 4 | |||
| 5 | / { | ||
| 6 | model = "AST2500 EVB"; | ||
| 7 | compatible = "aspeed,ast2500"; | ||
| 8 | |||
| 9 | aliases { | ||
| 10 | serial4 = &uart5; | ||
| 11 | }; | ||
| 12 | |||
| 13 | chosen { | ||
| 14 | stdout-path = &uart5; | ||
| 15 | bootargs = "console=ttyS4,115200 earlyprintk"; | ||
| 16 | }; | ||
| 17 | |||
| 18 | memory { | ||
| 19 | reg = <0x80000000 0x20000000>; | ||
| 20 | }; | ||
| 21 | }; | ||
| 22 | |||
| 23 | &uart5 { | ||
| 24 | status = "okay"; | ||
| 25 | }; | ||
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi new file mode 100644 index 000000000000..dd94d9361fda --- /dev/null +++ b/arch/arm/boot/dts/aspeed-g5.dtsi | |||
| @@ -0,0 +1,170 @@ | |||
| 1 | #include "skeleton.dtsi" | ||
| 2 | |||
| 3 | / { | ||
| 4 | model = "Aspeed BMC"; | ||
| 5 | compatible = "aspeed,ast2500"; | ||
| 6 | #address-cells = <1>; | ||
| 7 | #size-cells = <1>; | ||
| 8 | interrupt-parent = <&vic>; | ||
| 9 | |||
| 10 | cpus { | ||
| 11 | #address-cells = <1>; | ||
| 12 | #size-cells = <0>; | ||
| 13 | |||
| 14 | cpu@0 { | ||
| 15 | compatible = "arm,arm1176jzf-s"; | ||
| 16 | device_type = "cpu"; | ||
| 17 | reg = <0>; | ||
| 18 | }; | ||
| 19 | }; | ||
| 20 | |||
| 21 | ahb { | ||
| 22 | compatible = "simple-bus"; | ||
| 23 | #address-cells = <1>; | ||
| 24 | #size-cells = <1>; | ||
| 25 | ranges; | ||
| 26 | |||
| 27 | vic: interrupt-controller@1e6c0080 { | ||
| 28 | compatible = "aspeed,ast2400-vic"; | ||
| 29 | interrupt-controller; | ||
| 30 | #interrupt-cells = <1>; | ||
| 31 | valid-sources = <0xfefff7ff 0x0807ffff>; | ||
| 32 | reg = <0x1e6c0080 0x80>; | ||
| 33 | }; | ||
| 34 | |||
| 35 | apb { | ||
| 36 | compatible = "simple-bus"; | ||
| 37 | #address-cells = <1>; | ||
| 38 | #size-cells = <1>; | ||
| 39 | ranges; | ||
| 40 | |||
| 41 | clk_clkin: clk_clkin@1e6e2070 { | ||
| 42 | #clock-cells = <0>; | ||
| 43 | compatible = "aspeed,g5-clkin-clock"; | ||
| 44 | reg = <0x1e6e2070 0x04>; | ||
| 45 | }; | ||
| 46 | |||
| 47 | clk_hpll: clk_hpll@1e6e2024 { | ||
| 48 | #clock-cells = <0>; | ||
| 49 | compatible = "aspeed,g5-hpll-clock"; | ||
| 50 | reg = <0x1e6e2024 0x4>; | ||
| 51 | clocks = <&clk_clkin>; | ||
| 52 | }; | ||
| 53 | |||
| 54 | clk_ahb: clk_ahb@1e6e2070 { | ||
| 55 | #clock-cells = <0>; | ||
| 56 | compatible = "aspeed,g5-ahb-clock"; | ||
| 57 | reg = <0x1e6e2070 0x4>; | ||
| 58 | clocks = <&clk_hpll>; | ||
| 59 | }; | ||
| 60 | |||
| 61 | clk_apb: clk_apb@1e6e2008 { | ||
| 62 | #clock-cells = <0>; | ||
| 63 | compatible = "aspeed,g5-apb-clock"; | ||
| 64 | reg = <0x1e6e2008 0x4>; | ||
| 65 | clocks = <&clk_hpll>; | ||
| 66 | }; | ||
| 67 | |||
| 68 | clk_uart: clk_uart@1e6e2008 { | ||
| 69 | #clock-cells = <0>; | ||
| 70 | compatible = "aspeed,uart-clock"; | ||
| 71 | reg = <0x1e6e202c 0x4>; | ||
| 72 | }; | ||
| 73 | |||
| 74 | sram@1e720000 { | ||
| 75 | compatible = "mmio-sram"; | ||
| 76 | reg = <0x1e720000 0x9000>; // 36K | ||
| 77 | }; | ||
| 78 | |||
| 79 | timer: timer@1e782000 { | ||
| 80 | compatible = "aspeed,ast2400-timer"; | ||
| 81 | reg = <0x1e782000 0x90>; | ||
| 82 | // The moxart_timer driver registers only one | ||
| 83 | // interrupt and assumes it's for timer 1 | ||
| 84 | //interrupts = <16 17 18 35 36 37 38 39>; | ||
| 85 | interrupts = <16>; | ||
| 86 | clocks = <&clk_apb>; | ||
| 87 | }; | ||
| 88 | |||
| 89 | wdt1: wdt@1e785000 { | ||
| 90 | compatible = "aspeed,wdt"; | ||
| 91 | reg = <0x1e785000 0x1c>; | ||
| 92 | interrupts = <27>; | ||
| 93 | }; | ||
| 94 | |||
| 95 | wdt2: wdt@1e785020 { | ||
| 96 | compatible = "aspeed,wdt"; | ||
| 97 | reg = <0x1e785020 0x1c>; | ||
| 98 | interrupts = <27>; | ||
| 99 | status = "disabled"; | ||
| 100 | }; | ||
| 101 | |||
| 102 | wdt3: wdt@1e785040 { | ||
| 103 | compatible = "aspeed,wdt"; | ||
| 104 | reg = <0x1e785074 0x1c>; | ||
| 105 | status = "disabled"; | ||
| 106 | }; | ||
| 107 | |||
| 108 | uart1: serial@1e783000 { | ||
| 109 | compatible = "ns16550a"; | ||
| 110 | reg = <0x1e783000 0x1000>; | ||
| 111 | reg-shift = <2>; | ||
| 112 | interrupts = <9>; | ||
| 113 | clocks = <&clk_uart>; | ||
| 114 | no-loopback-test; | ||
| 115 | status = "disabled"; | ||
| 116 | }; | ||
| 117 | |||
| 118 | uart2: serial@1e78d000 { | ||
| 119 | compatible = "ns16550a"; | ||
| 120 | reg = <0x1e78d000 0x1000>; | ||
| 121 | reg-shift = <2>; | ||
| 122 | interrupts = <32>; | ||
| 123 | clocks = <&clk_uart>; | ||
| 124 | no-loopback-test; | ||
| 125 | status = "disabled"; | ||
| 126 | }; | ||
| 127 | |||
| 128 | uart3: serial@1e78e000 { | ||
| 129 | compatible = "ns16550a"; | ||
| 130 | reg = <0x1e78e000 0x1000>; | ||
| 131 | reg-shift = <2>; | ||
| 132 | interrupts = <33>; | ||
| 133 | clocks = <&clk_uart>; | ||
| 134 | no-loopback-test; | ||
| 135 | status = "disabled"; | ||
| 136 | }; | ||
| 137 | |||
| 138 | uart4: serial@1e78f000 { | ||
| 139 | compatible = "ns16550a"; | ||
| 140 | reg = <0x1e78f000 0x1000>; | ||
| 141 | reg-shift = <2>; | ||
| 142 | interrupts = <34>; | ||
| 143 | clocks = <&clk_uart>; | ||
| 144 | no-loopback-test; | ||
| 145 | status = "disabled"; | ||
| 146 | }; | ||
| 147 | |||
| 148 | uart5: serial@1e784000 { | ||
| 149 | compatible = "ns16550a"; | ||
| 150 | reg = <0x1e784000 0x1000>; | ||
| 151 | reg-shift = <2>; | ||
| 152 | interrupts = <10>; | ||
| 153 | clocks = <&clk_uart>; | ||
| 154 | current-speed = <38400>; | ||
| 155 | no-loopback-test; | ||
| 156 | status = "disabled"; | ||
| 157 | }; | ||
| 158 | |||
| 159 | uart6: serial@1e787000 { | ||
| 160 | compatible = "ns16550a"; | ||
| 161 | reg = <0x1e787000 0x1000>; | ||
