diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2015-11-29 20:24:35 -0500 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-11-29 20:24:35 -0500 |
| commit | 00fd6a7194d2f3be3ecc4fde0af02b39823afdcc (patch) | |
| tree | 9c720cbb271a42014ca6c256da5741f4b04feff2 | |
| parent | d72aee78e9bb956265480a118bdba2fc99dbf4bf (diff) | |
| parent | c861519fcf95b2d46cb4275903423b43ae150a40 (diff) | |
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS fix from Ralf Baechle:
"Just a fix for empty loops that may be removed by non-antique GCC"
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
MIPS: Fix delay loops which may be removed by GCC.
| -rw-r--r-- | arch/mips/pci/pci-rt2880.c | 4 | ||||
| -rw-r--r-- | arch/mips/pmcs-msp71xx/msp_setup.c | 4 | ||||
| -rw-r--r-- | arch/mips/sni/reset.c | 6 |
3 files changed, 9 insertions, 5 deletions
diff --git a/arch/mips/pci/pci-rt2880.c b/arch/mips/pci/pci-rt2880.c index 8a978022630b..dbbeccc3d714 100644 --- a/arch/mips/pci/pci-rt2880.c +++ b/arch/mips/pci/pci-rt2880.c | |||
| @@ -11,6 +11,7 @@ | |||
| 11 | * by the Free Software Foundation. | 11 | * by the Free Software Foundation. |
| 12 | */ | 12 | */ |
| 13 | 13 | ||
| 14 | #include <linux/delay.h> | ||
| 14 | #include <linux/types.h> | 15 | #include <linux/types.h> |
| 15 | #include <linux/pci.h> | 16 | #include <linux/pci.h> |
| 16 | #include <linux/io.h> | 17 | #include <linux/io.h> |
| @@ -232,8 +233,7 @@ static int rt288x_pci_probe(struct platform_device *pdev) | |||
| 232 | ioport_resource.end = RT2880_PCI_IO_BASE + RT2880_PCI_IO_SIZE - 1; | 233 | ioport_resource.end = RT2880_PCI_IO_BASE + RT2880_PCI_IO_SIZE - 1; |
| 233 | 234 | ||
| 234 | rt2880_pci_reg_write(0, RT2880_PCI_REG_PCICFG_ADDR); | 235 | rt2880_pci_reg_write(0, RT2880_PCI_REG_PCICFG_ADDR); |
| 235 | for (i = 0; i < 0xfffff; i++) | 236 | udelay(1); |
| 236 | ; | ||
| 237 | 237 | ||
| 238 | rt2880_pci_reg_write(0x79, RT2880_PCI_REG_ARBCTL); | 238 | rt2880_pci_reg_write(0x79, RT2880_PCI_REG_ARBCTL); |
| 239 | rt2880_pci_reg_write(0x07FF0001, RT2880_PCI_REG_BAR0SETUP_ADDR); | 239 | rt2880_pci_reg_write(0x07FF0001, RT2880_PCI_REG_BAR0SETUP_ADDR); |
diff --git a/arch/mips/pmcs-msp71xx/msp_setup.c b/arch/mips/pmcs-msp71xx/msp_setup.c index 4f925e06c414..78b2ef49dbc7 100644 --- a/arch/mips/pmcs-msp71xx/msp_setup.c +++ b/arch/mips/pmcs-msp71xx/msp_setup.c | |||
| @@ -10,6 +10,8 @@ | |||
| 10 | * option) any later version. | 10 | * option) any later version. |
| 11 | */ | 11 | */ |
| 12 | 12 | ||
| 13 | #include <linux/delay.h> | ||
| 14 | |||
| 13 | #include <asm/bootinfo.h> | 15 | #include <asm/bootinfo.h> |
| 14 | #include <asm/cacheflush.h> | 16 | #include <asm/cacheflush.h> |
| 15 | #include <asm/idle.h> | 17 | #include <asm/idle.h> |
| @@ -77,7 +79,7 @@ void msp7120_reset(void) | |||
| 77 | */ | 79 | */ |
| 78 | 80 | ||
| 79 | /* Wait a bit for the DDRC to settle */ | 81 | /* Wait a bit for the DDRC to settle */ |
| 80 | for (i = 0; i < 100000000; i++); | 82 | mdelay(125); |
| 81 | 83 | ||
| 82 | #if defined(CONFIG_PMC_MSP7120_GW) | 84 | #if defined(CONFIG_PMC_MSP7120_GW) |
| 83 | /* | 85 | /* |
diff --git a/arch/mips/sni/reset.c b/arch/mips/sni/reset.c index 244f9427625b..db8f88b6a3af 100644 --- a/arch/mips/sni/reset.c +++ b/arch/mips/sni/reset.c | |||
| @@ -3,6 +3,8 @@ | |||
| 3 | * | 3 | * |
| 4 | * Reset a SNI machine. | 4 | * Reset a SNI machine. |
| 5 | */ | 5 | */ |
| 6 | #include <linux/delay.h> | ||
| 7 | |||
| 6 | #include <asm/io.h> | 8 | #include <asm/io.h> |
| 7 | #include <asm/reboot.h> | 9 | #include <asm/reboot.h> |
| 8 | #include <asm/sni.h> | 10 | #include <asm/sni.h> |
| @@ -32,9 +34,9 @@ void sni_machine_restart(char *command) | |||
| 32 | for (;;) { | 34 | for (;;) { |
| 33 | for (i = 0; i < 100; i++) { | 35 | for (i = 0; i < 100; i++) { |
| 34 | kb_wait(); | 36 | kb_wait(); |
| 35 | for (j = 0; j < 100000 ; j++) | 37 | udelay(50); |
| 36 | /* nothing */; | ||
| 37 | outb_p(0xfe, 0x64); /* pulse reset low */ | 38 | outb_p(0xfe, 0x64); /* pulse reset low */ |
| 39 | udelay(50); | ||
| 38 | } | 40 | } |
| 39 | } | 41 | } |
| 40 | } | 42 | } |
