summaryrefslogtreecommitdiffstats
path: root/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
Commit message (Expand)AuthorAge
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2019-07-17
|\
| * clk: sunxi-ng: h3: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai2019-06-18
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282Thomas Gleixner2019-06-05
|/
* clk: Remove io.h from clk-provider.hStephen Boyd2019-05-15
* clk: sunxi-ng: h3: Allow parent change for ve clockJernej Skrabec2018-12-04
* clk: sunxi-ng: h3/h5: Fix CSI_MCLK parentChen-Yu Tsai2018-12-03
* clk: sunxi-ng: h3/h5: Add max. rate constraint to pll-videoJernej Skrabec2018-08-27
* clk: sunxi-ng: h3: h5: Allow some clocks to set parent rateJernej Skrabec2018-03-02
* clk: sunxi-ng: h3: h5: Add minimal rate for video PLLJernej Skrabec2018-03-02
* clk: sunxi-ng: sun8i: h3: Use sigma-delta modulation for audio PLLChen-Yu Tsai2017-10-13
* clk: sunxi-ng: add CLK_SET_RATE_PARENT flag to H3 GPU clockIcenowy Zheng2017-09-17
* clk: sunxi-ng: add CLK_SET_RATE_UNGATE to all H3 PLLsIcenowy Zheng2017-09-17
* Merge tag 'sunxi-clk-for-4.14-2' of https://git.kernel.org/pub/scm/linux/kern...Stephen Boyd2017-08-23
|\
| * clk: sunxi-ng: allow set parent clock (PLL_CPUX) for CPUX clock on H3Icenowy Zheng2017-08-04
| * clk: sunxi-ng: h3: gate then ungate PLL CPU clk after rate changeChen-Yu Tsai2017-08-04
* | clk: Convert to using %pOF instead of full_nameRob Herring2017-07-21
|/
* clk: sunxi-ng: Support multiple variable pre-dividersChen-Yu Tsai2017-06-07
* clk: sunxi-ng: add Allwinner H5 CCU support for H3 CCU driverIcenowy Zheng2017-03-06
* clk: sunxi-ng: fix PLL_CPUX adjusting on H3Ondrej Jirman2017-01-02
* clk: sunxi-ng: sun8i-h3: Set CLK_SET_RATE_PARENT for audio module clocksChen-Yu Tsai2016-11-11
* Merge tag 'sunxi-clk-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/...Stephen Boyd2016-09-14
|\
| * clk: sunxi-ng: mux: support fixed pre-dividers on multiple parentsChen-Yu Tsai2016-08-25
* | clk: sunxi-ng: Fix wrong reset register offsetsJorik Jonker2016-08-29
|/
* clk: sunxi-ng: h3: Fix audio clock divider offsetMaxime Ripard2016-07-11
* clk: sunxi-ng: Add H3 clocksMaxime Ripard2016-07-08
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-15 13:50:18 -0400