diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/cache_common.h | 140 | ||||
| -rw-r--r-- | include/litmus.h | 20 |
2 files changed, 160 insertions, 0 deletions
diff --git a/include/cache_common.h b/include/cache_common.h new file mode 100644 index 0000000..8239233 --- /dev/null +++ b/include/cache_common.h | |||
| @@ -0,0 +1,140 @@ | |||
| 1 | #ifndef __CACHE_COMMON_H__ | ||
| 2 | #define __CACHE_COMMON_H__ | ||
| 3 | |||
| 4 | #include <stdio.h> | ||
| 5 | #include <stdlib.h> | ||
| 6 | #include <time.h> | ||
| 7 | #include <string.h> | ||
| 8 | #include <assert.h> | ||
| 9 | |||
| 10 | #include <signal.h> | ||
| 11 | #include <sys/mman.h> | ||
| 12 | #include <sys/types.h> | ||
| 13 | #include <sys/stat.h> | ||
| 14 | #include <fcntl.h> | ||
| 15 | #include <unistd.h> | ||
| 16 | |||
| 17 | #include <sys/io.h> | ||
| 18 | #include <sys/utsname.h> | ||
| 19 | |||
| 20 | #include <sched.h> | ||
| 21 | #include <sys/time.h> | ||
| 22 | #include <sys/resource.h> | ||
| 23 | |||
| 24 | #include "litmus.h" | ||
| 25 | #include "asm/cycles.h" | ||
| 26 | |||
| 27 | #if defined(__i386__) || defined(__x86_64__) | ||
| 28 | #include "asm/irq.h" | ||
| 29 | #endif | ||
| 30 | |||
| 31 | |||
| 32 | #define UNCACHE_DEV "/dev/litmus/uncache" | ||
| 33 | |||
| 34 | static void die(char *error) | ||
| 35 | { | ||
| 36 | fprintf(stderr, "Error: %s (errno: %m)\n", | ||
| 37 | error); | ||
| 38 | exit(1); | ||
| 39 | } | ||
| 40 | |||
| 41 | static int lock_memory(void) | ||
| 42 | { | ||
| 43 | return mlockall(MCL_CURRENT | MCL_FUTURE); | ||
| 44 | } | ||
| 45 | |||
| 46 | /* define CACHELINE_SIZE if not provided by compiler args */ | ||
| 47 | #ifndef CACHELINE_SIZE | ||
| 48 | #if defined(__i386__) || defined(__x86_64__) | ||
| 49 | /* recent intel cpus */ | ||
| 50 | #define CACHELINE_SIZE 64 | ||
| 51 | #elif defined(__arm__) | ||
| 52 | /* at least with Cortex-A9 cpus ("8 words") */ | ||
| 53 | #define CACHELINE_SIZE 32 | ||
| 54 | #else | ||
| 55 | #error "Could not determine cacheline size!" | ||
| 56 | #endif | ||
| 57 | #endif | ||
| 58 | |||
| 59 | #define INTS_IN_CACHELINE (CACHELINE_SIZE/sizeof(int)) | ||
| 60 | typedef struct cacheline | ||
| 61 | { | ||
| 62 | int line[INTS_IN_CACHELINE]; | ||
| 63 | } __attribute__((aligned(CACHELINE_SIZE))) cacheline_t; | ||
| 64 | |||
| 65 | #define CACHELINES_IN_1KB (1024 / sizeof(cacheline_t)) | ||
| 66 | |||
| 67 | |||
| 68 | static cacheline_t* alloc_arena(size_t size, int use_huge_pages, int use_uncache_pages) | ||
| 69 | { | ||
| 70 | int flags = MAP_PRIVATE | MAP_POPULATE; | ||
| 71 | cacheline_t* arena = NULL; | ||
| 72 | int fd; | ||
| 73 | |||
| 74 | if(use_huge_pages) | ||
| 75 | flags |= MAP_HUGETLB; | ||
| 76 | |||
| 77 | if(use_uncache_pages) { | ||
| 78 | fd = open(UNCACHE_DEV, O_RDWR); | ||
| 79 | if (fd == -1) | ||
| 80 | die("Failed to open uncache device. Are you running the LITMUS^RT kernel?"); | ||
| 81 | } | ||
| 82 | else { | ||
| 83 | fd = -1; | ||
| 84 | flags |= MAP_ANONYMOUS; | ||
| 85 | } | ||
| 86 | |||
| 87 | arena = mmap(0, size, PROT_READ | PROT_WRITE, flags, fd, 0); | ||
| 88 | |||
| 89 | if(use_uncache_pages) | ||
| 90 | close(fd); | ||
| 91 | |||
| 92 | assert(arena); | ||
| 93 | |||
| 94 | return arena; | ||
| 95 | } | ||
| 96 | |||
| 97 | static void dealloc_arena(cacheline_t* arena, size_t size) | ||
| 98 | { | ||
| 99 | int ret = munmap((void*)arena, size); | ||
| 100 | if(ret != 0) | ||
| 101 | die("munmap() error"); | ||
| 102 | } | ||
| 103 | |||
| 104 | static int randrange(int min, int max) | ||
| 105 | { | ||
| 106 | /* generate a random number on the range [min, max) w/o skew */ | ||
| 107 | int limit = max - min; | ||
| 108 | int devisor = RAND_MAX/limit; | ||
| 109 | int retval; | ||
| 110 | |||
| 111 | do { | ||
| 112 | retval = rand() / devisor; | ||
| 113 | } while(retval == limit); | ||
| 114 | retval += min; | ||
| 115 | |||
| 116 | return retval; | ||
| 117 | } | ||
| 118 | |||
| 119 | static void init_arena(cacheline_t* arena, size_t size) | ||
| 120 | { | ||
| 121 | int i; | ||
| 122 | size_t num_arena_elem = size / sizeof(cacheline_t); | ||
| 123 | |||
| 124 | /* Generate a cycle among the cache lines using Sattolo's algorithm. | ||
| 125 | Every int in the cache line points to the same cache line. | ||
| 126 | Note: Sequential walk doesn't care about these values. */ | ||
| 127 | for (i = 0; i < num_arena_elem; i++) { | ||
| 128 | int j; | ||
| 129 | for(j = 0; j < INTS_IN_CACHELINE; ++j) | ||
| 130 | arena[i].line[j] = i; | ||
| 131 | } | ||
| 132 | while(1 < i--) { | ||
| 133 | int j = randrange(0, i); | ||
| 134 | cacheline_t temp = arena[j]; | ||
| 135 | arena[j] = arena[i]; | ||
| 136 | arena[i] = temp; | ||
| 137 | } | ||
| 138 | } | ||
| 139 | |||
| 140 | #endif | ||
diff --git a/include/litmus.h b/include/litmus.h index b9dbdb5..4b97b87 100644 --- a/include/litmus.h +++ b/include/litmus.h | |||
| @@ -40,6 +40,8 @@ extern "C" { | |||
| 40 | 40 | ||
| 41 | #include "migration.h" | 41 | #include "migration.h" |
| 42 | 42 | ||
| 43 | #include "litmus/mc2_common.h" | ||
| 44 | |||
| 43 | /** | 45 | /** |
| 44 | * @private | 46 | * @private |
| 45 | * The numeric ID of the LITMUS^RT scheduling class. | 47 | * The numeric ID of the LITMUS^RT scheduling class. |
| @@ -146,6 +148,12 @@ int sporadic_clustered(lt_t e_ns, lt_t p_ns, int cluster); | |||
| 146 | /** Convert microseconds to nanoseconds | 148 | /** Convert microseconds to nanoseconds |
| 147 | * @param us Time units in microseconds */ | 149 | * @param us Time units in microseconds */ |
| 148 | #define us2ns(us) ((us)*1000LL) | 150 | #define us2ns(us) ((us)*1000LL) |
| 151 | #define ns2s(ns) ((ns)/1000000000LL) | ||
| 152 | #define ns2ms(ns) ((ns)/1000000LL) | ||
| 153 | #define ns2us(ns) ((ns)/1000LL) | ||
| 154 | #define us2ms(us) ((us)/1000LL) | ||
| 155 | #define us2s(us) ((us)/1000000LL) | ||
| 156 | #define ms2s(ms) ((ms)/1000LL) | ||
| 149 | 157 | ||
| 150 | /** | 158 | /** |
| 151 | * Locking protocols for allocated shared objects | 159 | * Locking protocols for allocated shared objects |
| @@ -416,6 +424,18 @@ int null_call(cycles_t *timestamp); | |||
| 416 | */ | 424 | */ |
| 417 | struct control_page* get_ctrl_page(void); | 425 | struct control_page* get_ctrl_page(void); |
| 418 | 426 | ||
| 427 | int reservation_create(int rtype, void *config); | ||
| 428 | |||
| 429 | int reservation_destroy(unsigned int reservation_id, int cpu); | ||
| 430 | |||
| 431 | int set_mc2_task_param(pid_t pid, struct mc2_task* param); | ||
| 432 | |||
| 433 | int set_page_color(int cpu); | ||
| 434 | |||
| 435 | int test_call(unsigned int param); | ||
| 436 | |||
| 437 | typedef struct cacheline cacheline_t; | ||
| 438 | |||
| 419 | #ifdef __cplusplus | 439 | #ifdef __cplusplus |
| 420 | } | 440 | } |
| 421 | #endif | 441 | #endif |
