1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
|
/*
* drivers/video/tegra/dc/mipi_cal.h
*
* Copyright (c) 2012, NVIDIA CORPORATION, All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __DRIVERS_VIDEO_TEGRA_DC_MIPI_CAL_H__
#define __DRIVERS_VIDEO_TEGRA_DC_MIPI_CAL_H__
#include "mipi_cal_regs.h"
struct tegra_mipi_cal {
struct tegra_dc *dc;
struct resource *res;
struct clk *clk;
void __iomem *base;
struct mutex lock;
};
#ifdef CONFIG_TEGRA_MIPI_CAL
static inline void tegra_mipi_cal_clk_enable(struct tegra_mipi_cal *mipi_cal)
{
BUG_ON(IS_ERR_OR_NULL(mipi_cal));
clk_prepare_enable(mipi_cal->clk);
}
static inline void tegra_mipi_cal_clk_disable(struct tegra_mipi_cal *mipi_cal)
{
BUG_ON(IS_ERR_OR_NULL(mipi_cal));
clk_disable_unprepare(mipi_cal->clk);
}
/* reg is word offset */
static inline unsigned long tegra_mipi_cal_read(
struct tegra_mipi_cal *mipi_cal,
unsigned long reg)
{
BUG_ON(IS_ERR_OR_NULL(mipi_cal) ||
!tegra_is_clk_enabled(mipi_cal->clk));
return readl(mipi_cal->base + reg);
}
/* reg is word offset */
static inline void tegra_mipi_cal_write(struct tegra_mipi_cal *mipi_cal,
unsigned long val,
unsigned long reg)
{
BUG_ON(IS_ERR_OR_NULL(mipi_cal) ||
!tegra_is_clk_enabled(mipi_cal->clk));
writel(val, mipi_cal->base + reg);
}
extern struct tegra_mipi_cal *tegra_mipi_cal_init_sw(struct tegra_dc *dc);
extern int tegra_mipi_cal_init_hw(struct tegra_mipi_cal *mipi_cal);
extern void tegra_mipi_cal_destroy(struct tegra_dc *dc);
#else
static inline void tegra_mipi_cal_clk_enable(struct tegra_mipi_cal *mipi_cal)
{
/* dummy */
}
static inline void tegra_mipi_cal_clk_disable(struct tegra_mipi_cal *mipi_cal)
{
/* dummy */
}
static inline unsigned long tegra_mipi_cal_read(
struct tegra_mipi_cal *mipi_cal,
unsigned long reg)
{
/* dummy */
return 0;
}
static inline void tegra_mipi_cal_write(struct tegra_mipi_cal *mipi_cal,
unsigned long val,
unsigned long reg)
{
/* dummy */
}
struct tegra_mipi_cal *tegra_mipi_cal_init_sw(struct tegra_dc *dc)
{
/* dummy */
return NULL;
}
int tegra_mipi_cal_init_hw(struct tegra_mipi_cal *mipi_cal)
{
/* dummy */
return 0;
}
void tegra_mipi_cal_destroy(struct tegra_dc *dc)
{
/* dummy */
}
#endif
#endif
|
