From f0ebe18aad344a3889f0c964d37c23d5eb7db608 Mon Sep 17 00:00:00 2001 From: Igor Nabirushkin Date: Wed, 4 Sep 2019 12:36:44 +0300 Subject: misc: tegra-profiler: add cpufreq capability tegra-profiler capabilities: add cpufreq flag. Bug 2694772 Jira DTSP-1151 Change-Id: I0fc2503339ff796a9bdbaa9984f581edd1308613 Signed-off-by: Igor Nabirushkin Reviewed-on: https://git-master.nvidia.com/r/2189809 (cherry picked from commit 32ab6849716cb24243d29140df85f92c01fca356) Reviewed-on: https://git-master.nvidia.com/r/2211141 GVS: Gerrit_Virtual_Submit Reviewed-by: Roman Rybalko Reviewed-by: Bibek Basu Reviewed-by: mobile promotions Tested-by: mobile promotions --- include/uapi/linux/tegra_profiler.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/uapi/linux/tegra_profiler.h b/include/uapi/linux/tegra_profiler.h index 0da1040c2..8029b75a3 100644 --- a/include/uapi/linux/tegra_profiler.h +++ b/include/uapi/linux/tegra_profiler.h @@ -394,6 +394,7 @@ struct quadd_debug_data { #define QUADD_HDR_FLAG_MODE_TRACE_ALL (1ULL << 15) #define QUADD_HDR_FLAG_MODE_SAMPLE_TREE (1ULL << 16) #define QUADD_HDR_FLAG_MODE_TRACE_TREE (1ULL << 17) +#define QUADD_HDR_FLAG_CPUFREQ (1ULL << 18) struct quadd_header_data { __u16 magic; @@ -538,6 +539,7 @@ enum { #define QUADD_COMM_CAP_EXTRA_RB_MMAP_OP (1 << 9) #define QUADD_COMM_CAP_EXTRA_CPU_MASK (1 << 10) #define QUADD_COMM_CAP_EXTRA_ARCH_TIMER_USR (1 << 11) +#define QUADD_COMM_CAP_EXTRA_CPUFREQ (1 << 12) struct quadd_comm_cap { __u32 pmu:1, -- cgit v1.2.2