From 0c54e2afbd06aec00b57773686bb288195249d24 Mon Sep 17 00:00:00 2001 From: Chetan Kumar Date: Mon, 15 Jan 2018 10:40:58 -0800 Subject: tegra: mce: add scf dda register interface Add interface to access DDA control registers through NVG protocol, which is used by the LA/PTSA driver. Bug 1755290 JIRA: TMM-104 Change-Id: I3c76bfd65b34496289044fc29f66f553e620add3 Signed-off-by: Chetan Kumar Reviewed-on: https://git-master.nvidia.com/r/1640625 Reviewed-by: svc-mobile-coverity Reviewed-by: Varun Wadekar GVS: Gerrit_Virtual_Submit Reviewed-by: Krishna Sitaraman Reviewed-by: Alexander Van Brunt Reviewed-by: mobile promotions Tested-by: mobile promotions --- include/linux/tegra-mce.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'include/linux') diff --git a/include/linux/tegra-mce.h b/include/linux/tegra-mce.h index 4017b6e78..78c6ae88d 100644 --- a/include/linux/tegra-mce.h +++ b/include/linux/tegra-mce.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -114,6 +114,8 @@ int tegra_mce_write_uncore_mca(mca_cmd_t cmd, u64 data, u32 *error); int tegra_mce_read_uncore_perfmon(u32 req, u32 *data); int tegra_mce_write_uncore_perfmon(u32 req, u32 data); int tegra_mce_enable_latic(void); +int tegra_mce_write_dda_ctrl(u32 index, u64 value); +int tegra_mce_read_dda_ctrl(u32 index, u64 *value); /* Tegra cache functions */ int tegra_flush_cache_all(void); -- cgit v1.2.2