From bcdcc8e14f5f751ae8a0750f8a5e0aac7eb22bc8 Mon Sep 17 00:00:00 2001 From: JC Kuo Date: Mon, 30 May 2016 13:45:31 +0800 Subject: padctl_uphy: save and restore port_cap This commit add the following padctl register to save/restore context. XUSB_PADCTL_USB2_PAD_MUX_0 XUSB_PADCTL_USB2_PORT_CAP_0 XUSB_PADCTL_SS_PORT_CAP_0 These registers are supposed to be re-programed at SC7 exit before XUSB host controller and device controller are un-powergated. This commit also remove the VCORE_DOWN programming from tegra186_usb3_phy_set_wake(), VCORE_DOWN programming now is done in usb3 phy power_on() and power_off() to match PG. bug 200192947 Change-Id: Ib6fe16382f3d33f317d1fbad85f688b810966184 Signed-off-by: JC Kuo Reviewed-on: http://git-master/r/1155770 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Mark Kuo Reviewed-by: ChihMin Cheng Reviewed-by: Ashutosh Jha --- drivers/pinctrl/pinctrl-tegra186-padctl-uphy.c | 27 ++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) (limited to 'drivers/pinctrl') diff --git a/drivers/pinctrl/pinctrl-tegra186-padctl-uphy.c b/drivers/pinctrl/pinctrl-tegra186-padctl-uphy.c index ff6da3b58..a248591e8 100644 --- a/drivers/pinctrl/pinctrl-tegra186-padctl-uphy.c +++ b/drivers/pinctrl/pinctrl-tegra186-padctl-uphy.c @@ -635,6 +635,9 @@ static const char * const source_pll_states[] = { struct padctl_context { u32 vbus_id; + u32 usb2_pad_mux; + u32 usb2_port_cap; + u32 ss_port_cap; }; struct tegra_padctl_uphy { @@ -4917,10 +4920,22 @@ static int tegra186_uphy_pll_deinit(struct tegra_padctl_uphy *uphy) static void tegra186_padctl_save(struct tegra_padctl_uphy *uphy) { uphy->padctl_context.vbus_id = padctl_readl(uphy, USB2_VBUS_ID); + uphy->padctl_context.usb2_pad_mux = + padctl_readl(uphy, XUSB_PADCTL_USB2_PAD_MUX); + uphy->padctl_context.usb2_port_cap = + padctl_readl(uphy, XUSB_PADCTL_USB2_PORT_CAP); + uphy->padctl_context.ss_port_cap = + padctl_readl(uphy, XUSB_PADCTL_SS_PORT_CAP); } static void tegra186_padctl_restore(struct tegra_padctl_uphy *uphy) { + padctl_writel(uphy, uphy->padctl_context.usb2_pad_mux, + XUSB_PADCTL_USB2_PAD_MUX); + padctl_writel(uphy, uphy->padctl_context.usb2_port_cap, + XUSB_PADCTL_USB2_PORT_CAP); + padctl_writel(uphy, uphy->padctl_context.ss_port_cap, + XUSB_PADCTL_SS_PORT_CAP); padctl_writel(uphy, uphy->padctl_context.vbus_id, USB2_VBUS_ID); } @@ -5528,12 +5543,6 @@ static int tegra186_usb3_phy_set_wake(struct tegra_padctl_uphy *uphy, reg &= ~ALL_WAKE_EVENTS; reg |= SS_PORT_WAKE_INTERRUPT_ENABLE(port); padctl_writel(uphy, reg, XUSB_PADCTL_ELPG_PROGRAM); - - usleep_range(10, 20); - - reg = padctl_readl(uphy, XUSB_PADCTL_ELPG_PROGRAM_1); - reg |= SSPX_ELPG_VCORE_DOWN(port); - padctl_writel(uphy, reg, XUSB_PADCTL_ELPG_PROGRAM_1); } else { dev_dbg(uphy->dev, "disable USB3 port %d wake\n", port); @@ -5548,12 +5557,6 @@ static int tegra186_usb3_phy_set_wake(struct tegra_padctl_uphy *uphy, reg &= ~ALL_WAKE_EVENTS; reg |= SS_PORT_WAKEUP_EVENT(port); padctl_writel(uphy, reg, XUSB_PADCTL_ELPG_PROGRAM); - - usleep_range(10, 20); - - reg = padctl_readl(uphy, XUSB_PADCTL_ELPG_PROGRAM_1); - reg &= ~SSPX_ELPG_VCORE_DOWN(port); - padctl_writel(uphy, reg, XUSB_PADCTL_ELPG_PROGRAM_1); } mutex_unlock(&uphy->lock); -- cgit v1.2.2