From bca012dbc421e497ec59661f41659042efd1ce9c Mon Sep 17 00:00:00 2001 From: Krishna Sitaraman Date: Thu, 18 Aug 2016 16:22:11 -0700 Subject: t18x: cpuidle: pass upper bits of wake time Only 24bits of the wake time is passed through psci. Pass the upper bits [31:8] instead of [23:0] to avoid wake time being capped at 524ms. Bug 1802357 Change-Id: I2ce3388feb168def48c6f65640916611f904c4d5 Signed-off-by: Krishna Sitaraman Reviewed-on: http://git-master/r/1204690 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mustafa Bilgen GVS: Gerrit_Virtual_Submit Reviewed-by: Alexander Van Brunt --- drivers/cpuidle/cpuidle-tegra18x.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/cpuidle/cpuidle-tegra18x.c b/drivers/cpuidle/cpuidle-tegra18x.c index b454a053a..c666efcd6 100644 --- a/drivers/cpuidle/cpuidle-tegra18x.c +++ b/drivers/cpuidle/cpuidle-tegra18x.c @@ -217,7 +217,7 @@ static u32 t18x_make_power_state(u32 state) if (denver_testmode || a57_testmode) wake_time = 0xFFFFEEEE; - state = state | ((wake_time << 4) & PSCI_STATE_ID_WKTIM_MASK); + state = state | ((wake_time >> 4) & PSCI_STATE_ID_WKTIM_MASK); return state; } -- cgit v1.2.2