From 66dfaf34e5085d01c40c349ff51b97cf77cd3940 Mon Sep 17 00:00:00 2001 From: Mohan Kumar Date: Wed, 24 Aug 2016 15:58:25 +0530 Subject: adma: add Shared SMP defines for adma war Add HSP Shared Semaphores defines to synchronize the ADMA_GLOBAL_CG_0 register between ADSP and CPU access. Bug 200223484 Change-Id: Icb7953f5795b758f3f953b5346d06693b046b369 Signed-off-by: Mohan Kumar Reviewed-on: http://git-master/r/1207005 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Nitin Kumbhar Reviewed-by: Sarada Dash Reviewed-by: Viraj Karandikar GVS: Gerrit_Virtual_Submit Reviewed-by: Ravindra Lokhande --- drivers/dma/tegra186-adma.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/dma/tegra186-adma.h b/drivers/dma/tegra186-adma.h index 480e75ed9..bd4dc19fa 100644 --- a/drivers/dma/tegra186-adma.h +++ b/drivers/dma/tegra186-adma.h @@ -238,6 +238,9 @@ enum { ADDR3, ADDR4, ADAST_REG, +#if defined(CONFIG_TEGRA_ADMA_WAR) + SHRD_SMP_REG, +#endif ADMA_MAX_ADDR }; @@ -259,6 +262,22 @@ enum { #define ADMA_CH_STATUS_TRANSFER_ENABLED BIT(0) #define MAX_ADMAIF_WITH_DMA_FIFO_SIZE_3 4 + +#define ADMA_GLOBAL_CG_DISABLE 0x00 +#define ADMA_GLOBAL_CG_ENABLE 0x07 +/* HSP SS registers for ADMA WAR */ +#define HSP_SHRD_SEM_0_SHRD_SMP_STA 0x00 +#define HSP_SHRD_SEM_0_SHRD_SMP_STA_SET 0x04 +#define HSP_SHRD_SEM_0_SHRD_SMP_STA_CLR 0x08 +#define SHRD_SMP_STA HSP_SHRD_SEM_0_SHRD_SMP_STA +#define SHRD_SMP_STA_SET HSP_SHRD_SEM_0_SHRD_SMP_STA_SET +#define SHRD_SMP_STA_CLR HSP_SHRD_SEM_0_SHRD_SMP_STA_CLR +/* Make sure ADSP using 2nd SMP bit */ +#define ADMA_SHRD_SMP_CPU 0x1 +#define ADMA_SHRD_SMP_ADSP 0x2 +#define ADMA_SHRD_SMP_BITS (ADMA_SHRD_SMP_CPU | ADMA_SHRD_SMP_ADSP) +#define ADMA_SHRD_SEM_WAIT_COUNT 50 + enum tegra_adma_fetching_policy { BURST_BASED = 0, THRESHOLD_BASED = 1, -- cgit v1.2.2