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* gpu-paging: Functions to support initial working versionrtss22-aegpu-pagingJoshua Bakita2022-05-24
| | | | | | - Buffer deallocation (+IOCTL) - Buffer reallocation - Private dmabuf user list and accessor
* tegra: mc: Add resume function for mcKetan Patil2021-12-10
| | | | | | | | | | | | | | | | | | | | mc_err is not reported after device resume as MC_INTMASK register is in reset state. Restore this register in resume. Bug 3418979 Change-Id: I04884b81164a4b95e1f11e6e78e35499b6f5e977 Signed-off-by: Ketan Patil <ketanp@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2622984 (cherry picked from commit c9638f54e8b3dc48158cce548c24bae6dbf09adc) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2638812 Reviewed-by: svcacv <svcacv@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Puneet Saxena <puneets@nvidia.com> Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* video: tegra: host: LS fw gets priority in get fwAnkit Patel2021-08-02
| | | | | | | | | | | | | | | | Whenever NVDEC LS firmware pack for the soc, It will give priority to LS FW rather than NS FW. If in case of absence of LS FW It will load NS FW. Bug 200415909 Bug 200704321 Signed-off-by: Ankit Patel <anpatel@nvidia.com> Change-Id: I15f53f33d4735c25b972e1e8a394d01047f86bde Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2375549 Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2511966 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
* pwm: fan: get regulator name from DTAaron Tian2021-07-05
| | | | | | | | | | | | | | | | | | | | To support platforms that used common power supply for PWM fan, configure regulator name by DT property: regulator_name. Default regulator name is "vdd-fan" when the DT property does not exist. Bug 200743936 Change-Id: I6951e340e5444141a72de5187e3887de49244caf Signed-off-by: Aaron Tian <atian@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2549408 Reviewed-by: svcacv <svcacv@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Sandipan Patra <spatra@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
* tegra: safety: Phase notification commandMantravadi Karthik2021-07-01
| | | | | | | | | | | | | | | | | | | | | | Why? SCE HB working starts with Init done phase notification from CCPLEX. How? The init done phase notification is scheduled at the end of safety-ivc drver probe as all the necessary items for l1ss are initialized by then. Bug 200700400 Change-Id: I18cb66b2cbe6c3184c9c23c9b7ee6f6c53f62c06 Signed-off-by: Mantravadi Karthik <mkarthik@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2542621 Reviewed-by: Preetham Chandru <pchandru@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
* tegra: safety: FuSa State notification commandPreetham Chandru Ramchandra2021-06-07
| | | | | | | | | | | | | | | | Add support for CMDRESP_FUSA_STATE_NOTIFICATION command. This command will be sent from L2SS to L1SS when FuSa (Functional Safety) Manager's state changes. Bug 200700404 Change-Id: Ice986c17adf809f1eaf2dd7131aa70a5e67f9d1a Signed-off-by: Preetham Chandru Ramchandra <pchandru@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2537820 Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* tegra: safety-ivc: Add support for HB CMDMantravadi Karthik2021-06-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Why? L2SS expects a heartbeat ping every 40ms. CCPLEX is expected to write the Boot status in the IVC channel for the first time and the consective pings will be just to send Alive check. How? Create a new callback API for the HB command which fills the bit fields for the HB data and sends it over the cmd-resp IVC channel. * Added mutex lock support for l1ss_cmd_resp_send_frame for syncronizing the ivc writes. * Waiting for empty interrupts hogs the system. Time critical features such as HB fail while waiting for empty interrupts. Hence, removing the HSP SM empty isr support. Bug 200700400 Change-Id: I7f124c9f7336df9d387536aa3f2dda80d9234db8 Signed-off-by: Mantravadi Karthik <mkarthik@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2519655 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
* pwm: fan: fix deadlock due to incorrect lockingSumit Gupta2021-05-25
| | | | | | | | | | | | | | | | | Bug 3227296 Bug 200695596 Bug 200728417 Signed-off-by: Sumit Gupta <sumitg@nvidia.com> Change-Id: Ib64915556d285bd798e95da81a261eb2c16b4dab Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2503884 Reviewed-by: svcacv <svcacv@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: Bibek Basu <bbasu@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* tegra: safety: Add client registrationPreetham Chandru Ramchandra2021-05-24
| | | | | | | | | | | | | | | | Add client registration and deregistration calls. The clients registers with a callback function which gets called when ivc ready is received from L2SS. Bug 200700404 Change-Id: I358f4ad7ada547dfb81bb60c990b2f84235a9651 Signed-off-by: Preetham Chandru Ramchandra <pchandru@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2531217 Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* tegra: safety: Move header files to include/linuxPreetham Chandru Ramchandra2021-05-19
| | | | | | | | | | | | | | | | Move tegra_nv_guard_group_id.h and tegra_nv_guard_service_id.h header files to include/linux path. Also move l1ss_submit_rq() to tegra_l1ss_kernel_interface.h Bug 200700404 Change-Id: Ib609c3f3cbaebb495729eba6d607c340c9a2f185 Signed-off-by: Preetham Chandru Ramchandra <pchandru@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2530519 Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* tegra: safety: Enable L1SSPreetham Chandru Ramchandra2021-05-12
| | | | | | | | | | | | | | | | This change enable L1SS with minimal functionality. Currently it only supports sending sw error to SCE (SERVICESTATUS_NOTIFICATION) and IST erros. Bug 200700404 Change-Id: I4a33756dd2f4b6715157a39d3dbc4d0d968fc52b Signed-off-by: Preetham Chandru Ramchandra <pchandru@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2525248 Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* video: tegra: nvmap: add support to create RO handle from user VAPuneet Saxena2021-05-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | User malloc + mprotect/mmap a buffer as RO and as part of alloc_from_va, user pass the ACCESS_FLAGS as RO and expects NvMap to give dma_buf_fd with RO access. Below are the conditions result in NvRmMemHandle creation - 1) VA: RO and Attr: RW - Don't create NvMap Handle 2) VA: RO and Attr: RO - Create NvMap Handle and set dma_buf_fd as RO 3) VA: RW and Attr: RO - Create NvMap Handle and set dma_buf_fd as RO 4) Mixed VA: RO + RW and Attr: RO - Create NvMap Handle with dma_buf_fd as RO for the whole buffer 5) Mixed VA: RO + RW and Attr: RW - Don't Create NvMap Handle If few pages of the buffer is set as RO and rest as RW, multiple vma are created and vma->end and vma->start doesn't differ by the buffer size, passed to create handle from VA. Hence remove the check. Anyway the check is done in get_user_pages. The change sets dma_buf_fd as RW/RO so that other process should fetch the access permission just by reading f_mode of dma_buf_fd. Bug 200621238 Bug 200634660 Change-Id: I9c50c6f28664f0ff9f70dc08b15d93389e7d7201 Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2515023 (cherry picked from commit 0514e68ce8948428b417c55057a4dd2f57acd9c2) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2521313 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: Amulya Yarlagadda <ayarlagadda@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
* camera: Check for pending ivc framesAniket Bahadarpurkar2021-05-05
| | | | | | | | | | | | | | | | | | | If ivc message handler workqueue is not scheduled, driver will report no reply from camera processor error. This gives impression that rtcpu is in bad state. However, it is possible that some IVC frames are pending read. Hence, before reporting no reply from camera processor we check for pending IVC frames. Bug 3293029 Bug 3291799 Change-Id: I653add5d363a81af816d81e1197868cc289249a2 Signed-off-by: Aniket Bahadarpurkar <aniketb@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2520521 (cherry picked from commit d3a7408c12cf1e51288cd1ee56f54668d8fdae1a) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2524157 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
* tegra: safety-ivc: Fix the SCE-L1SS syncMantravadi Karthik2021-04-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SCE-L1SS sync expects the ast-mapped address to be sent from CCPLEX to SCE. Fixing this logic helped SCE sync with CCPLEX. CCPLEX logs: ubuntu@tegra-ubuntu:~$ dmesg | grep tegra186-safety-ivc [ 4.505639] tegra186-safety-ivc b040000.sce: probing sce safety driver [ 4.505882] tegra186-safety-ivc b040000.sce: dma address = 0xffef0000 [ 4.505897] tegra186-safety-ivc b040000.sce: cmdresp: RX: 0x0-0x1080 TX: 0x8000-0x9080 [ 4.505902] tegra186-safety-ivc b040000.sce: hb: RX: 0x1400-0x14c0 TX: 0x9400-0x94c0 [ 4.505906] tegra186-safety-ivc b040000.sce: mods: RX: 0x1500-0x1980 TX: 0x9500-0x9980 [ 8.542842] tegra186-safety-ivc b040000.sce: safety: character device 0 registered [ 8.543059] tegra186-safety-ivc b040000.sce: safety: character device 1 registered [ 8.543226] tegra186-safety-ivc b040000.sce: safety: character device 2 registered [ 8.543365] tegra186-safety-ivc b040000.sce: successfully probed safety ivc driver SCE uart Logs with debug prints: [772801] : [ LOG ] : Sce Booted : 1.4.0 [33746167] : [ LOG ] : SceIvc_Init_Callback: Line 445: [34246815] : [ LOG ] : SceHsp_SM_Produced [34662648] : [ LOG ] : SceHsp_SM_Consume: Invoked [34670879] : [ LOG ] : SceHsp_SM_Consume: MB addr - 0c b168000, value - 0x81ffef00 [34678666] : [ LOG ] : SceIvcHandshakePerformedCallback: Handshake done [34688074] : [ LOG ] : SceIvc_ChannelNotified: invoked [34691072] : [ LOG ] : SceIvc_ChannelNotified: invoked [34698090] : [ LOG ] : SceHsp_SM_Produce: 169: Invoked [34702170] : [ LOG ] : SceHsp_SM_Produce: 169: Invoked [33745454] : [ ISR ] : SceHsp_Irq: invoked [34711495] : [ ERROR ] : Fatal, SCE BL data invalid [34719113] : [ ERROR ] : DRAM Init Failed [34727446] : [ INFO ] : SCE-FW & L1SS in sync [34823406] : [ LOG ] : Monitoring Failue Bug 200700400 Change-Id: I40bbea06b42892d25408a2da317c831e12acfc9d Signed-off-by: Mantravadi Karthik <mkarthik@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2515929 Reviewed-by: Preetham Chandru <pchandru@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
* tegra: Fix safety ivc driverMantravadi Karthik2021-03-31
| | | | | | | | | | | | | | | | | | * Fix safety ivc driver to remove unused cmd-pair. * Update Makefile to use the correct defconfig. * Add support for unit testing the safety-ivc driver guarded by CONFIG_TEGRA_SAFETY_IVC_DEBUG. Bug 200700400 Change-Id: I479db5fcb4a57ad36c374fa3f137346e8582cb13 Signed-off-by: Mantravadi Karthik <mkarthik@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2493498 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
* PCI: tvnet: Add PM support for tvnet driverManikanta Maddireddy2021-02-18
| | | | | | | | | | | | | | | | Add PM support to enable suspend to RAM support for Tegra virtual Ethernet over PCIe in RP system. Bug 3216243 Change-Id: I39e023c6c890699b082f6761dd2955b19659da16 Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2469498 Reviewed-by: Vidya Sagar <vidyas@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
* thermal: continuous: add custom dt entry supportKarthik Mantravadi2021-01-07
| | | | | | | | | | | | | | | | | | | | | Why? In the case of therm-fan-est driver, the dt entry is not added as part of thermal-zones. Hence, any continuous governor parameters defined under therm-fan-est node will not be considered by the continuous governor while binding to the thermal zone. How? Expose the dt parsing logic in continuous governor driver. This way therm-fan-est driver can call the dt parsing function passing the dt node defined under therm-fan-est dt entry. Bug 200594433 Change-Id: I06f1653209887f674db0636fe6f5803771d46877 Signed-off-by: Karthik Mantravadi <mkarthik@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2464743 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
* pwm: fan: Add support for always on fanMantravadi Karthik2020-12-25
| | | | | | | | | | | | | | | | | | | | | | | | | Why? In case of continuous governor, the fan-poweron pwm value is assumed to be at index 1 of pwm values. In case of tmargin the pwm table would be reversed (high to low) and hence the assumption is invalid. How? While calculating the pwm value in the case of continuous governor, add a check if the cooling device is always on fan. If true, for all values of temp, pwm should be calculated instead of assigning 0. Bug 200646929 Change-Id: Ibed572fa2af9f8bd36a4a4cbb472029e21aeb442 Signed-off-by: Mantravadi Karthik <mkarthik@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2448826 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
* thermal: pwm-fan: Add support for tmarginMantravadi Karthik2020-12-17
| | | | | | | | | | | | | | | | | | | | | | | | | | Why? Tmargin feature uses reverse pwm mapping in DT. The current rru/rrd calculation logic assumes that the pwm table is in ascending order. In the case of tmargin, the pwm table is given in descending order. How? pwm fan dt node should have a "use_tmargin" identifier similar to therm_fan_est dt node. This dt entry switches the logic in rru/rrd calculation Bug 200646929 Change-Id: I2042aaff5347553202212c6b69f707511bb9b7dd Signed-off-by: Mantravadi Karthik <mkarthik@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2460881 Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
* platform: tegra: cbb: mask SError due to CBB errorSumit Gupta2020-12-14
| | | | | | | | | | | | | | | | | | | | | | | Mask SError for illegal accesses from CCPLEX master. Interrupts will be generated for access from CCPLEX and error info will be printed within the interrupt handler instead of SError callback. Also, call BUG() to crash the system if illegal access is from CCPLEX master. For illegal accesses from other masters, interrupt is already getting generated instead of SError. Bug 3191922 Change-Id: Ie03f4f0f0ca58fb695a54183456861dd98931855 Signed-off-by: Sumit Gupta <sumitg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2118672 (cherry picked from commit ef8df45ba078e6d9ab2d648c4c122e38b600c77d) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2458251 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* misc: nvs: Add NVS GTE supportelilliebjerg2020-11-13
| | | | | | | | | | | | | | | | | | - Add the Tegra hardware Generic Timestamping Engine support to the NVidia Sensor framework. - Use CONFIG_NVS_GTE in Linux kernel config. Bug 3046736 Bug 2975033 Change-Id: I55397436ee635cdaf7788a3c5d6dc384601940df Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2342800 (cherry picked from commit 79de33624bb9f6cf10f77251039143d5d3128715) Signed-off-by: elilliebjerg <elilliebjerg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2439322 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
* misc: nvs: Add on-change moduleelilliebjerg2020-11-13
| | | | | | | | | | | | | | | | | | - Create a common NVS module for on-change sensors. Bug 3046736 Bug 2975069 Change-Id: I1021c4a14db88ad3f8a2daa7c9efce7f667023a8 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2374392 (cherry picked from commit d7cd7261814a024c86f4a96d4f320badae1bda49) Signed-off-by: elilliebjerg <elilliebjerg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2439315 Reviewed-by: Greg Lo <glo@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* therm-fan-est: Add support for Tmargin to drive fanmkarthik2020-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Why? Tmargin method of fan control allows multiple groups of therma-fan-est devices temperatures to be considered for the fan control algorithm/fan curve. The limitation of the existing max temp algorithm in therm-fan-est driver is that devices with different fan curves cannot be accomodated in the driver. In case, there are multple fan curves, the device which has the steepest curve wins the algoritm. Hence, taking the temperatures as a reference from their respective critical temperatures and using that value to drive the fan will help in accomodating both the devices' fan curves. How? * Calculate the effective crit temp of all the thermal zones during probe. * In the polling cycles, calculate the effective temperatures of the individual groups and use the tmargin formula to calculate the current temperature. * Since the Tmargin temp trip values are in reverse order, we need to use the reverse order in the pwm-fan dt profile. * The hysterysis is subtracted from the temp in cooling scenario to avoid frequent switching at trip temps. Since the tmargin trip values are taken in the decending order, hysterysis temps in dt should be given as negative values. Bug 200627962 Change-Id: Ideba4bfdb3d3306d1b4aff15093bcfac13d7bb86 Signed-off-by: Mantravadi Karthik <mkarthik@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2362354 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
* thermal: pwm-fan: Add tach feedback supportmkarthik2020-09-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Why? The current implementation of the pwm-fan driver only writes a pwm value to the HW when requested. There is no tachometer rpm read back to check if the thermal performance is as expected. This change aims to add the rpm offsets necessary to maintain the desired fan rpm. How? A new work queue is added which gets the pwm fan rpm and checks the same for a rpm diff tolerance value. In case the tolerance value is exceeded, the next pwm corresponding to the next rpm ramp index is written to the pwm controller. Bug 200646929 Change-Id: Iff780a7edf98ca457ace10079149925adf06189d Signed-off-by: Mantravadi Karthik <mkarthik@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2369412 Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: Sandipan Patra <spatra@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
* clk: aon: add aon clk providerVishruth Jain2020-03-16
| | | | | | | | | | | | | | | | | PLL_AON clock is controlled by SPE. Add clock provider that can control PLL_AON state using IPC with SPE instead of BPMP. Bug 200409889 Change-Id: I2e88eb3a5971881b6f51c4d1472422203831a33e Signed-off-by: Vishruth Jain <vishruthj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2290986 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* drivers: gpio-tegra186: Add conditional GTE flagDipen Patel2020-02-24
| | | | | | | | | | | | | | | | | | | There is use_timestamp gpio driver DT property which is used to map GTE registers address space which will conflict if GTE driver is enabled. This CL creates function for GTE driver to indicate its presence so using flag which will make timestamp control function just to return enabling the timestamp bit. Bug 2757864 Change-Id: I653c237455131f1b1a92a6de3cc79385d799316f Signed-off-by: Dipen Patel <dipenp@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2287319 Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
* drivers: staging: Add Generic timestamping supportDipen Patel2020-02-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds generic hardware timestamping (GTE) support for the T194 SoC. There are certain applications like robotics which may require more accurate recording of the occurance of the certain events. GTE driver will help monitor AON GPIOs and LIC interrupts. GTE driver also implements char driver for userspace to monitor GPIO through IOCTL. Other kernel APIs are exported and defined in the tegra-gte.h file for kernel client drivers to use. APIs are not stable and subject to change in the future. It is for this reason GTE driver is provided in the staging directory. Since its APIs are not stable, it should not break existing nvpps driver code from the stage-main which also uses GTE but in limited way. It is for this reason this driver will not be selected if nvpps is enabled. Bug 2757864 Change-Id: I0947f2b90232eb6c2a31163e33ec5ad45b7bd415 Signed-off-by: Dipen Patel <dipenp@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2287452 Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
* Err-inject: Handle generic sync exception reportsAndre Richter2020-02-21
| | | | | | | | | | | | | | | | | | | | | | | | This change extends the existing minimal placeholder sample handler for injected synchronous exceptions. It now consumes a generic sync exception report and, showcases how the information can be used to decode the exceptions further using two minimal examples (Data Abort and Instr Abort). This needs to be used only as a reference for any customized elaborate error handling that may be needed. JIRA ESV-312 Bug 2580803 Change-Id: I32cf2322a6002ac00071d3246a32a17eb37165c3 Signed-off-by: Andre Richter <arichter@nvidia.com> (cherry picked from commit 9ce3c05e425607a1acf0a28ea75258fb66f06820) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2300616 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Dmitry Pervushin <dpervushin@nvidia.com> Reviewed-by: Rohit Upadhyay <rupadhyay@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
* PCI: tvnet: add tegra_vnet.hOm Prakash Singh2020-02-12
| | | | | | | | | | | | | | | add tegra_vnet.h for tegra virtual network host and endpoint driver Bug 200585814 Change-Id: I3a8070983885cbb3a1680f0f3d356cf027720419 Signed-off-by: Om Prakash Singh <omp@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2283952 Reviewed-by: Manikanta Maddireddy <mmaddireddy@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
* video: tegra: host: add freq. capping capabilityLeon Yu2020-02-07
| | | | | | | | | | | | | | | | | | | | | | | This change adds sysfs interface under acm for capping frequencies of host1x clients. It is to replace existing nvpmodel kernel driver which serves same purpose but does this in an unreliable/wrong way - bypassing host1x and grabbing parent clock handle of clients directly. With this functionality, things are put under host1x acm control and we gain more finely grained control in some cases, e.g. setting freq. cap independently for dla0 and dla1. Bug 200585348 Bug 200521935 Change-Id: I34445df1abc3656138cfde06c23ea5a4c8694d07 Signed-off-by: Leon Yu <leoyu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2288876 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
* inject-vm-err: T19x MC error handlerPotharaju Ravi Teja2020-01-24
| | | | | | | | | | | | | | | | | | | - Add support to handle Memory Controller errors on on t19x. - This change adds a sample handler for MC errors. It is a minimal handler that just dumps error information to the console. This can be used as a reference to implement an elaborate error handler. Bug 2580803 Change-Id: Ib86b925125650b4812fdbee5310455ae95ccd83c (cherry picked from commit 6c8395d11872f79ab5819a9900cb40b8f946852e) Signed-off-by: Potharaju Ravi Teja <pteja@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2279875 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
* inject-vm-err: CBB error handlerPotharaju Ravi Teja2020-01-24
| | | | | | | | | | | | | | | | | | | | | | Add support to handle control back bone errors. - This change adds a sample handler for cbb error. It is a minimal handler that just dumps error information to the console. This can be used as a reference to implement an elaborate error handler. Bug 2580803 Change-Id: I2fbbc994854611a54276068ee90f1d2cffeeb948 (cherry picked from commit ea898756f7b2e4aff8f89546f3b69fc4e97fd300) Signed-off-by: Potharaju Ravi Teja <pteja@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2279874 GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: Dmitry Pervushin <dpervushin@nvidia.com> Reviewed-by: Rohit Upadhyay <rupadhyay@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
* tegra: host: t210: use per device policyKen Chang2020-01-08
| | | | | | | | | | | | | | | | | | | MLOCK feature in T210 host1x is not supported so change the resource policy for each engine to 'RESOURCE_PER_DEVICE' to serialize the taks from applications through a single channel to each hardware engine. This is with an exception on tsec which is using single channel operation. Bug 2550468 Change-Id: I166b8af286461a13e543f1da7495c34abc948241 Signed-off-by: Ken Chang <kenc@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2152237 (cherry picked from commit ff20edb0674dd9083395327a529e8674f3f70410) Reviewed-on: https://git-master.nvidia.com/r/2226976 GVS: Gerrit_Virtual_Submit Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* inject-vm-err: misc. improvementsYashomati2019-12-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Prevented bad mode entry for unassigned offender as no point in rebooting the Privileged guest in that case. - Made the driver to fire build bug if sizes of structures shared with HV code are out of sync. - Replaced enum variables with unsigned int in err_data structure members to avoid ambiguity in size used by HV and Linux compilers for enum. - Renamed variables from camelCase to small_case, added tegra-hv prefix, etc. - Removed sending of redundant parameter while sending ack for sync error. - Added #undef _X5,6,7_X17 for completeness that was missed earlier. JIRA ESV-312 Bug 2580803 Change-Id: Ibf49c80a2e781dd75faadd96813b9c19e31e68bf Signed-off-by: Yashomati <ygodbole@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2228786 (cherry picked from commit 7364fbd8661997c98a4d9fa036ad3a5659fe319e) Reviewed-on: https://git-master.nvidia.com/r/2254757 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Dmitry Pervushin <dpervushin@nvidia.com> Reviewed-by: Hardik T Shah <hardikts@nvidia.com> Reviewed-by: Rohit Upadhyay <rupadhyay@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* inject-vm-err: handlers for injected errorsYashomati2019-12-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If Linux/EBP causes an error that HV can't handle, then instead of freezing the guest, HV injects the error back into the guest. This enables the guest to handle the error as gracefully as it can/needs. This changeset provides 2 parts: 1. sample handlers: minimal placeholder handlers that just dump the error information on to the console. This is to be used as a reference for any customized elaborate error handling that may be needed. 2. library module: it comes into existence only if/when any error handler is registered. Its main responsibilities: - map memory that's shared with HV where HV dumps all information about the errors. - register handlers for interrupts used by HV to inject errors - invoke custom error handlers when HV injects error JIRA ESV-312 Bug 2580803 Change-Id: Ia8c6484d423fd33cabbfd901f0f6ebb0da95cb40 Signed-off-by: Yashomati <ygodbole@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2214402 Reviewed-on: https://git-master.nvidia.com/r/2128765 GVS: Gerrit_Virtual_Submit Reviewed-by: Dmitry Pervushin <dpervushin@nvidia.com> Reviewed-by: Hardik T Shah <hardikts@nvidia.com> Reviewed-by: Rohit Upadhyay <rupadhyay@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* t19x: mce: rt: enable rt configuration supportSuresh Venkatachalam2019-11-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add API to configure rt settings for T19x Enable sysfs interface to configure rt settings for T19x The following three sysfs entries are added under tegra_mce rt_safe_mask: used to set/get rt safe mask Each bit set in the mask indicates a logical core number which should behave as real-time cores and adhere to the behaviour limits set in rt_window_us and rt_fwd_progress_us rt_window_us: used to set/get rt window specifies the number of microseconds which constitutes a window which should be monitored for ARM forward progress rt_fwd_progress_us: used to set/get rt forward progress defines the number of microseconds of forward progress which are minimum amount of forward progress allowed within the current rt window Bug 2329811 Change-Id: Idfa142110b75cebfd4d1b01cff56021ea90ea4a1 Signed-off-by: Suresh Venkatachalam <skathirampat@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2119817 (cherry picked from commit 05c76631f4be85325a9fc969e44515972ee0d7e8) Reviewed-on: https://git-master.nvidia.com/r/2249724 Tested-by: Sumit Gupta <sumitg@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* ASoC: tegra-virt-alt: lpthread init via amixerDipesh Gandhi2019-10-11
| | | | | | | | | | | | | | | | | | | | | | Change exposes lpthread/adsp usage trigger via amixer. This is needed to make sound card aware of lpthread state. Without this STR adsp feature breaks as currently lpthread is written in such a manner which does not allow adsp to suspend. Bug 200552183 Change-Id: I2cc1e0fd805a982686bbd034b2c6e094b56df23b Signed-off-by: Dipesh Gandhi <dipeshg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2198693 (cherry picked from commit e9bd14fd6eb0305cc583092752e6bdccc9c5e76a) Reviewed-on: https://git-master.nvidia.com/r/2210547 Reviewed-by: Uday Gupta <udayg@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Nitin Pai <npai@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* video: tegra: host: update T186 VIC actmon driverAaron Tian2019-10-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify T186/T210 VIC actmon driver and wmark_active governor to address the following issues: 1. To let VIC actmon reports accurate VIC active cycle counts, set static WEIGHT_COUNT in both VIC actmon and VIC IP block. It ensures VIC actmon can capture all activity signal toggle event from VIC. The value of WEIGHT_COUNT are equal to: 4 * (max VIC freq / VIC_actmon freq) = 4 * (1024 / 19.2) ~= 213 2. Since VIC actmon reports active "VIC clock cycle" instead of "VIC actmon clock cycle", "relative loading translation" should consider current VIC clock freq. E.g., - sample_period = 80 us, VIC freq = 115.2 Mhz - 9216 cycles represents 100% loading (115.2 * 80) 3. Update upper/lower wmark settings after VIC clock scaled completed, to ensure wmark settings are equil to 0 ~ 100% loading of current freq. - Register 'get_dev_status' instance in devfreq_dev_profile, to let wmark active governor can query current device freq. - Register devfreq transition notifier in wmark_active governor. It will query current device freq. and update corresponding wmark value after VIC freq. changed. Bug 200501949 Change-Id: Ic159eb93fddc37d55b0c9649a3afcb50ed82cac2 Signed-off-by: Aaron Tian <atian@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2200520 GVS: Gerrit_Virtual_Submit Reviewed-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* platform: tegra: Add API to check VPR resizeVedashree Vidwans2019-08-30
| | | | | | | | | | | | | | | | | | This patch adds a new API to check if vpr resize is supported. This will be used in nvgpu driver module. Bug 200532122 Change-Id: I4513c2bbdadd5b1db747216ab99bb6d8466268b1 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2167079 Reviewed-on: https://git-master.nvidia.com/r/2180579 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Sungwook Kim <sungwookk@nvidia.com> Reviewed-by: Vinayak Pane <vpane@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* video: tegra: host: Set DMA masksMikko Perttunen2019-07-03
| | | | | | | | | | | | | | | | | | Set DMA masks for host1x, engines, and context devices as per the following to support over 32 bits of address space: - T210: 34 bits - T186: 40 bits - T194: 40 bits Bug 200527850 Change-Id: I1e7495bbf90a2928c17c06c2728640a036f843d7 Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2139215 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* Thermal: support feature: pwm_period independent with fan_pwm_maxTaylor Xiao2019-05-29
| | | | | | | | | | | | | | | | Pwm_period needn't keep the same with fan_pwm_max now, precision_multiplier multiply with constant 100 and divide by constant 100 when caculating pwm duty. Bug 200519087 Change-Id: Ibc684289479ee850171ef8860b577457077e7b2b Signed-off-by: Taylor Xiao <txiao@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2125786 GVS: Gerrit_Virtual_Submit Reviewed-by: Martin Gao <marting@nvidia.com> Reviewed-by: Daniel Fu <danifu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* Thermal: pwm-fan: support continuous fan control featureTaylor Xiao2019-05-09
| | | | | | | | | | | | | | | | Update for pwm-fan: Cooling device ops "set_cur_state" will set its second parameter as target pwm directly, because continuous fan pwm dont ramp step by step but point to point smoothly. Bug 2540031 Change-Id: I2f5bbddb4ea82ab655f18067812705696f7f7601 Signed-off-by: Taylor Xiao <txiao@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2113583 Reviewed-by: Daniel Fu <danifu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* include: uapi: move linux user-interface headersAnuj Gangwar2019-05-07
| | | | | | | | | | | | | | | | | | | Move the linux tegra_cpc user-interface headers from include/linux/ to include/uapi/linux/ Change the path for above headers in the dependent files. Bug 2062672 Change-Id: I674909f3188a746f3283b2e92296d9c18a2e767c Signed-off-by: Anuj Gangwar <anujg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1956560 (cherry picked from commit 1373b074d8a76869e143337caeba5d42d213e43f) Reviewed-on: https://git-master.nvidia.com/r/2109985 Reviewed-by: Bibek Basu <bbasu@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* include :uapi: move nvmap header file with IOCTLAnuj Gangwar2019-05-06
| | | | | | | | | | | | | | | | | Create new header file nvmap in include/uapi/linux/. The new file has IOCTL definitions which is moved from include/linux/nvmap.h. Bug 2062672 Change-Id: I87b5cc8e8a6b80168550b8033e98a5e719677fa8 Signed-off-by: Anuj Gangwar <anujg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2071430 (cherry picked from commit 2282a431b61ced655738f73fd4cf6d0df276b3c1) Reviewed-on: https://git-master.nvidia.com/r/2109951 Reviewed-by: Bibek Basu <bbasu@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* include: uapi: move nvpps_ioctl header fileAnuj Gangwar2019-05-03
| | | | | | | | | | | | | | | | | Header file nvpps_ioctl have IOCTL definitions, so move the headers files from include/linux/ to include/uapi/linux. Change the path for header in dependent c files. Bug 2062672 Change-Id: I50a3d27978926db0088cb49a30c33eeac46bf83b Signed-off-by: Anuj Gangwar <anujg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2110163 GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* include: uapi: move nvhost user-interface headersAnuj Gangwar2019-05-03
| | | | | | | | | | | | | | | | | | Move the linux user-interface headers from include/linux/ to include/uapi/linux/. Change the path for above headers in the dependent files Bug 2062672 Change-Id: I2e116dc8f6c33f53c03fb56b923931b6e600b534 Signed-off-by: Anuj Gangwar <anujg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1953709 (cherry picked from commit 965ceca35c92eba011163f4c637b3b9e0f073f1a) Signed-off-by: Anuj Gangwar <anujg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2110116 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* include: uapi: move nvhvivc_mempool_ioctl.h fileAnuj Gangwar2019-05-03
| | | | | | | | | | | | | | | | | | | Move nvhvivc_mempool_ioctl header file from include/linux/ to include/uapi/linux/. Change the path for above header in the dependent file. Bug 2062672 Change-Id: I3120e2d5aeb61be891709dc04193a87e6784df0d Signed-off-by: Anuj Gangwar <anujg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2029838 (cherry picked from commit 7abd341a471f870a8cfac1641c0e81f91a3f8ea3) Reviewed-on: https://git-master.nvidia.com/r/2109962 GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* video: tegra: host: nvdla, pva: add task information to fencesDmitry Antipov2019-04-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For NSys, we're interested in having detailed information on what task waits on a particular prefence or requests a particular postfence. This is implemented by adding two extra fields, 'task_syncpt_id' and 'task_syncpt_thresh' to 'struct nvhost_task_fence', to record the task this particular fence is associated with. To avoid race conditon in pva_submit (similar to what was fixed in 0c2065fd669926536f79fd9e8ec33f33cbdcae2e), PVA task memory management is changed to use simple kref-based scheme, much like it's done in DLA. Finally, this patch renames syncpoint fields of 'task_fence' to 'syncpt_id' and 'syncpt_thresh' to match the same field names in other events, which is intended to simplify Python scripting. JIRA DTSP-1662 JIRA DTSP-682 Bug 2568514 Signed-off-by: Dmitry Antipov <dantipov@nvidia.com> Change-Id: I4c55efcae15eb80a0d950882d6ff6e5ac706ab20 Reviewed-on: https://git-master.nvidia.com/r/1978175 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Shridhar Rasal <srasal@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2099982 Reviewed-by: Mitch Harwell <mharwell@nvidia.com> Tested-by: Mitch Harwell <mharwell@nvidia.com>
* misc: tegra-profiler: add task comm eventsIgor Nabirushkin2019-04-11
| | | | | | | | | | | | | | | | | | | | Add task COMM events: - Add support for quadd_event_comm() callback. - Send task COMM events to userspace. Bug 2514095 Jira DTSP-2432 Change-Id: Id5b92f544497b69098e3b16bf82baf0f6abb77e1 Signed-off-by: Igor Nabirushkin <inabirushkin@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2027490 (cherry picked from commit a0c0d3bf9eeabbdad2a43b768235e1cc846b04ef) Reviewed-on: https://git-master.nvidia.com/r/2093405 GVS: Gerrit_Virtual_Submit Reviewed-by: Roman Rybalko <rrybalko@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
* include: uapi: move tegra_profiler header fileAnuj Gangwar2019-04-11
| | | | | | | | | | | | | | | | | | | | Creating new file tegra_profiler.h in include/uapi/linux/. The File has uapi definitions which copied from linux/tegra_profiler.h. Removing the IOCTL definitions in linux/tegra_profiler.h. Bug 2062672 Change-Id: I0e756617cd4e55c03dc6013c9aff3d74d0c1232b Signed-off-by: Anuj Gangwar <anujg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2027220 (cherry picked from commit 700cc51c4e2e91f914455622477f004adcb22ada) Reviewed-on: https://git-master.nvidia.com/r/2093404 GVS: Gerrit_Virtual_Submit Reviewed-by: Roman Rybalko <rrybalko@nvidia.com> Tested-by: Igor Nabirushkin <inabirushkin@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-14 07:53:36 -0500