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-rw-r--r--drivers/video/tegra/dc/bandwidth.c8
-rw-r--r--drivers/video/tegra/dc/dc.c86
-rw-r--r--drivers/video/tegra/dc/dc_priv_defs.h4
-rw-r--r--drivers/video/tegra/dc/dp.c99
-rw-r--r--drivers/video/tegra/dc/edid.c12
-rw-r--r--drivers/video/tegra/dc/edid.h21
-rw-r--r--drivers/video/tegra/dc/mode.c20
-rw-r--r--drivers/video/tegra/dc/nvsr.c14
8 files changed, 117 insertions, 147 deletions
diff --git a/drivers/video/tegra/dc/bandwidth.c b/drivers/video/tegra/dc/bandwidth.c
index b692304e3..bcaaa4a1a 100644
--- a/drivers/video/tegra/dc/bandwidth.c
+++ b/drivers/video/tegra/dc/bandwidth.c
@@ -745,6 +745,9 @@ void tegra_dc_program_bandwidth(struct tegra_dc *dc, bool use_new)
745#ifdef CONFIG_TEGRA_ISOMGR 745#ifdef CONFIG_TEGRA_ISOMGR
746 int latency; 746 int latency;
747 747
748 if (!dc->isomgr_handle)
749 return;
750
748 /* reserve atleast the minimum bandwidth. */ 751 /* reserve atleast the minimum bandwidth. */
749 bw = max(bw, tegra_dc_calc_min_bandwidth(dc)); 752 bw = max(bw, tegra_dc_calc_min_bandwidth(dc));
750 latency = tegra_isomgr_reserve(dc->isomgr_handle, bw, 1000); 753 latency = tegra_isomgr_reserve(dc->isomgr_handle, bw, 1000);
@@ -850,6 +853,11 @@ long tegra_dc_calc_min_bandwidth(struct tegra_dc *dc)
850#else 853#else
851 pclk = KHZ2PICOS(150000); /* 150MHz max */ 854 pclk = KHZ2PICOS(150000); /* 150MHz max */
852#endif 855#endif
856 } else if (dc->out->type == TEGRA_DC_OUT_DP) {
857 if (dc->mode.pclk)
858 pclk = KHZ2PICOS(dc->mode.pclk / 1000);
859 else
860 pclk = KHZ2PICOS(25200); /* vga */
853 } else { 861 } else {
854 pclk = KHZ2PICOS(dc->mode.pclk / 1000); 862 pclk = KHZ2PICOS(dc->mode.pclk / 1000);
855 } 863 }
diff --git a/drivers/video/tegra/dc/dc.c b/drivers/video/tegra/dc/dc.c
index c716b1e9b..4f15f34b4 100644
--- a/drivers/video/tegra/dc/dc.c
+++ b/drivers/video/tegra/dc/dc.c
@@ -72,7 +72,7 @@
72#define DC_COM_PIN_OUTPUT_POLARITY1_INIT_VAL 0x01000000 72#define DC_COM_PIN_OUTPUT_POLARITY1_INIT_VAL 0x01000000
73#define DC_COM_PIN_OUTPUT_POLARITY3_INIT_VAL 0x0 73#define DC_COM_PIN_OUTPUT_POLARITY3_INIT_VAL 0x0
74 74
75static struct fb_videomode tegra_dc_hdmi_fallback_mode = { 75static struct fb_videomode tegra_dc_vga_mode = {
76 .refresh = 60, 76 .refresh = 60,
77 .xres = 640, 77 .xres = 640,
78 .yres = 480, 78 .yres = 480,
@@ -1419,22 +1419,6 @@ static int tegra_dc_set_out(struct tegra_dc *dc, struct tegra_dc_out *out)
1419 return err; 1419 return err;
1420 } 1420 }
1421 } 1421 }
1422 /* If there is no predefined mode, try early_enable()
1423 to check mode from panel directly */
1424 if (!mode && !out->n_modes && dc->out_ops &&
1425 dc->out_ops->early_enable) {
1426 if (dc->out_ops->early_enable(dc))
1427 dev_info(&dc->ndev->dev,
1428 "Detected mode: %dx%d (on %dx%dmm) pclk=%d\n",
1429 dc->mode.h_active, dc->mode.v_active,
1430 dc->out->h_size, dc->out->v_size,
1431 dc->mode.pclk);
1432 else {
1433 dev_err(&dc->ndev->dev,
1434 "Error: failed to check panel mode\n");
1435 err = -EINVAL;
1436 }
1437 }
1438 1422
1439 return err; 1423 return err;
1440} 1424}
@@ -2355,13 +2339,15 @@ static int _tegra_dc_set_default_videomode(struct tegra_dc *dc)
2355 /* DC enable called but no videomode is loaded. 2339 /* DC enable called but no videomode is loaded.
2356 Check if HDMI is connected, then set fallback mdoe */ 2340 Check if HDMI is connected, then set fallback mdoe */
2357 if (tegra_dc_hpd(dc)) { 2341 if (tegra_dc_hpd(dc)) {
2358 return tegra_dc_set_fb_mode(dc, 2342 return tegra_dc_set_fb_mode(dc, &tegra_dc_vga_mode, 0);
2359 &tegra_dc_hdmi_fallback_mode, 0);
2360 } else 2343 } else
2361 return false; 2344 return false;
2362 2345
2363 break; 2346 break;
2364 2347
2348 case TEGRA_DC_OUT_DP:
2349 return tegra_dc_set_fb_mode(dc, &tegra_dc_vga_mode, 0);
2350
2365 /* Do nothing for other outputs for now */ 2351 /* Do nothing for other outputs for now */
2366 case TEGRA_DC_OUT_RGB: 2352 case TEGRA_DC_OUT_RGB:
2367 2353
@@ -2925,39 +2911,18 @@ static int tegra_dc_probe(struct platform_device *ndev)
2925 } 2911 }
2926 dc->mode_dirty = false; /* ignore changes tegra_dc_set_out has done */ 2912 dc->mode_dirty = false; /* ignore changes tegra_dc_set_out has done */
2927 2913
2928#ifdef CONFIG_TEGRA_ISOMGR 2914#ifndef CONFIG_TEGRA_ISOMGR
2929 if (isomgr_client_id == -1) { 2915 /*
2930 dc->isomgr_handle = NULL; 2916 * The emc is a shared clock, it will be set based on
2931 } else { 2917 * the requirements for each user on the bus.
2932 dc->isomgr_handle = tegra_isomgr_register(isomgr_client_id, 2918 */
2933 tegra_dc_calc_min_bandwidth(dc), 2919 emc_clk = clk_get(&ndev->dev, "emc");
2934 tegra_dc_bandwidth_renegotiate, dc); 2920 if (IS_ERR_OR_NULL(emc_clk)) {
2935 if (IS_ERR(dc->isomgr_handle)) { 2921 dev_err(&ndev->dev, "can't get emc clock\n");
2936 dev_err(&dc->ndev->dev,
2937 "could not register isomgr. err=%ld\n",
2938 PTR_ERR(dc->isomgr_handle));
2939 ret = -ENOENT; 2922 ret = -ENOENT;
2940 goto err_put_clk; 2923 goto err_put_clk;
2941 } 2924 }
2942 dc->reserved_bw = tegra_dc_calc_min_bandwidth(dc); 2925 dc->emc_clk = emc_clk;
2943 /*
2944 * Use maximum value so we can try to reserve as much as
2945 * needed until we are told by isomgr to backoff.
2946 */
2947 dc->available_bw = UINT_MAX;
2948 }
2949#else
2950 /*
2951 * The emc is a shared clock, it will be set based on
2952 * the requirements for each user on the bus.
2953 */
2954 emc_clk = clk_get(&ndev->dev, "emc");
2955 if (IS_ERR_OR_NULL(emc_clk)) {
2956 dev_err(&ndev->dev, "can't get emc clock\n");
2957 ret = -ENOENT;
2958 goto err_put_clk;
2959 }
2960 dc->emc_clk = emc_clk;
2961#endif 2926#endif
2962 2927
2963 dc->ext = tegra_dc_ext_register(ndev, dc); 2928 dc->ext = tegra_dc_ext_register(ndev, dc);
@@ -2985,6 +2950,29 @@ static int tegra_dc_probe(struct platform_device *ndev)
2985 dc->enabled = _tegra_dc_enable(dc); 2950 dc->enabled = _tegra_dc_enable(dc);
2986 } 2951 }
2987 2952
2953#ifdef CONFIG_TEGRA_ISOMGR
2954 if (isomgr_client_id == -1) {
2955 dc->isomgr_handle = NULL;
2956 } else {
2957 dc->isomgr_handle = tegra_isomgr_register(isomgr_client_id,
2958 tegra_dc_calc_min_bandwidth(dc),
2959 tegra_dc_bandwidth_renegotiate, dc);
2960 if (IS_ERR(dc->isomgr_handle)) {
2961 dev_err(&dc->ndev->dev,
2962 "could not register isomgr. err=%ld\n",
2963 PTR_ERR(dc->isomgr_handle));
2964 ret = -ENOENT;
2965 goto err_put_clk;
2966 }
2967 dc->reserved_bw = tegra_dc_calc_min_bandwidth(dc);
2968 /*
2969 * Use maximum value so we can try to reserve as much as
2970 * needed until we are told by isomgr to backoff.
2971 */
2972 dc->available_bw = UINT_MAX;
2973 }
2974#endif
2975
2988 tegra_dc_create_debugfs(dc); 2976 tegra_dc_create_debugfs(dc);
2989 2977
2990 dev_info(&ndev->dev, "probed\n"); 2978 dev_info(&ndev->dev, "probed\n");
diff --git a/drivers/video/tegra/dc/dc_priv_defs.h b/drivers/video/tegra/dc/dc_priv_defs.h
index 794e70280..6856f48dd 100644
--- a/drivers/video/tegra/dc/dc_priv_defs.h
+++ b/drivers/video/tegra/dc/dc_priv_defs.h
@@ -109,10 +109,6 @@ struct tegra_dc_out_ops {
109 /* callback after new mode is programmed. 109 /* callback after new mode is programmed.
110 * dc clocks are on at this point */ 110 * dc clocks are on at this point */
111 void (*modeset_notifier)(struct tegra_dc *dc); 111 void (*modeset_notifier)(struct tegra_dc *dc);
112 /* enable output before dc is fully enabled in order to get
113 * info such as panel mode for dc enablement.
114 */
115 bool (*early_enable)(struct tegra_dc *dc);
116}; 112};
117 113
118struct tegra_dc_shift_clk_div { 114struct tegra_dc_shift_clk_div {
diff --git a/drivers/video/tegra/dc/dp.c b/drivers/video/tegra/dc/dp.c
index 800f091bf..a1fe98a89 100644
--- a/drivers/video/tegra/dc/dp.c
+++ b/drivers/video/tegra/dc/dp.c
@@ -1968,6 +1968,42 @@ static void tegra_dp_link_config(struct tegra_dc_dp_data *dp)
1968 tegra_sor_port_enable(sor, true); 1968 tegra_sor_port_enable(sor, true);
1969} 1969}
1970 1970
1971static int tegra_dp_edid(struct tegra_dc_dp_data *dp)
1972{
1973 struct tegra_dc *dc = dp->dc;
1974 struct fb_monspecs specs;
1975 int err;
1976
1977 err = tegra_edid_get_monspecs(dp->dp_edid, &specs);
1978 if (err < 0) {
1979 dev_err(&dc->ndev->dev, "dp: Failed to get EDID data\n");
1980 goto fail;
1981 }
1982
1983 dc->out->h_size = specs.max_x * 10; /* in mm */
1984 dc->out->v_size = specs.max_y * 10;
1985
1986 tegra_dc_set_fb_mode(dc, specs.modedb, false);
1987
1988 if (!dc->out->width && !dc->out->height) {
1989 /*
1990 * EDID specifies either the acutal screen sizes or
1991 * the aspect ratios. The panel file can choose to
1992 * trust the value as the actual sizes by leaving
1993 * width/height to 0s
1994 */
1995 dc->out->width = dc->out->h_size;
1996 dc->out->height = dc->out->v_size;
1997 }
1998
1999 /* adjust clk for new mode */
2000 tegra_dc_setup_clk(dc, dc->clk);
2001
2002 return 0;
2003fail:
2004 return err;
2005}
2006
1971static void tegra_dc_dp_enable(struct tegra_dc *dc) 2007static void tegra_dc_dp_enable(struct tegra_dc *dc)
1972{ 2008{
1973 struct tegra_dc_dp_data *dp = tegra_dc_get_outdata(dc); 2009 struct tegra_dc_dp_data *dp = tegra_dc_get_outdata(dc);
@@ -1997,6 +2033,9 @@ static void tegra_dc_dp_enable(struct tegra_dc *dc)
1997 goto error_enable; 2033 goto error_enable;
1998 } 2034 }
1999 2035
2036 if (dp->dp_edid && !dp->dp_edid->data)
2037 tegra_dp_edid(dp);
2038
2000 tegra_dp_dpcd_init(dp); 2039 tegra_dp_dpcd_init(dp);
2001 2040
2002 tegra_dc_sor_enable_dp(dp->sor); 2041 tegra_dc_sor_enable_dp(dp->sor);
@@ -2068,65 +2107,6 @@ static long tegra_dc_dp_setup_clk(struct tegra_dc *dc, struct clk *clk)
2068 return tegra_dc_pclk_round_rate(dc, dp->sor->dc->mode.pclk); 2107 return tegra_dc_pclk_round_rate(dc, dp->sor->dc->mode.pclk);
2069} 2108}
2070 2109
2071
2072static bool tegra_dc_dp_early_enable(struct tegra_dc *dc)
2073{
2074 struct tegra_dc_dp_data *dp = tegra_dc_get_outdata(dc);
2075 struct fb_monspecs specs;
2076 u32 reg_val;
2077
2078 /* Power on panel */
2079 if (dc->out->enable)
2080 dc->out->enable(&dc->ndev->dev);
2081
2082 tegra_dc_get(dp->dc);
2083
2084 if (!tegra_is_clk_enabled(dp->clk))
2085 clk_prepare_enable(dp->clk);
2086 tegra_dpaux_enable(dp);
2087 tegra_dp_enable_irq(dp->irq);
2088 tegra_dp_hpd_config(dp);
2089
2090 tegra_dc_unpowergate_locked(dc);
2091 msleep(80);
2092
2093 if (tegra_dp_hpd_plug(dp) < 0) {
2094 dev_err(&dc->ndev->dev, "dp: hpd plug failed\n");
2095 return false;
2096 }
2097
2098 reg_val = tegra_dpaux_readl(dp, DPAUX_DP_AUXSTAT);
2099 if (!(reg_val & DPAUX_DP_AUXSTAT_HPD_STATUS_PLUGGED)) {
2100 dev_err(&dc->ndev->dev, "dp: Failed to detect HPD\n");
2101 return false;
2102 }
2103
2104 if (tegra_edid_get_monspecs(dp->dp_edid, &specs)) {
2105 dev_err(&dc->ndev->dev, "dp: Failed to get EDID data\n");
2106 return false;
2107 }
2108
2109 tegra_dc_set_fb_mode(dc, specs.modedb, false);
2110
2111 dc->out->h_size = specs.max_x * 10; /* in mm */
2112 dc->out->v_size = specs.max_y * 10;
2113
2114 if (!dc->out->width && !dc->out->height) {
2115 /* EDID specifies either the acutal screen sizes or
2116 the aspect ratios. The panel file can choose to
2117 trust the value as the actual sizes by leaving
2118 width/height to 0s */
2119 dc->out->width = dc->out->h_size;
2120 dc->out->height = dc->out->v_size;
2121 }
2122
2123 tegra_dc_powergate_locked(dc);
2124 msleep(50);
2125 tegra_dp_disable_irq(dp->irq);
2126 tegra_dc_put(dp->dc);
2127 return true;
2128}
2129
2130static void tegra_dc_dp_modeset_notifier(struct tegra_dc *dc) 2110static void tegra_dc_dp_modeset_notifier(struct tegra_dc *dc)
2131{ 2111{
2132 struct tegra_dc_dp_data *dp = tegra_dc_get_outdata(dc); 2112 struct tegra_dc_dp_data *dp = tegra_dc_get_outdata(dc);
@@ -2140,7 +2120,6 @@ struct tegra_dc_out_ops tegra_dc_dp_ops = {
2140 .disable = tegra_dc_dp_disable, 2120 .disable = tegra_dc_dp_disable,
2141 .setup_clk = tegra_dc_dp_setup_clk, 2121 .setup_clk = tegra_dc_dp_setup_clk,
2142 .modeset_notifier = tegra_dc_dp_modeset_notifier, 2122 .modeset_notifier = tegra_dc_dp_modeset_notifier,
2143 .early_enable = tegra_dc_dp_early_enable,
2144}; 2123};
2145 2124
2146 2125
diff --git a/drivers/video/tegra/dc/edid.c b/drivers/video/tegra/dc/edid.c
index ad9fba3fa..47fa337e9 100644
--- a/drivers/video/tegra/dc/edid.c
+++ b/drivers/video/tegra/dc/edid.c
@@ -40,18 +40,6 @@ struct tegra_edid_pvt {
40 struct tegra_dc_edid dc_edid; 40 struct tegra_dc_edid dc_edid;
41}; 41};
42 42
43struct tegra_dc_i2c_ops {
44 i2c_transfer_func_t i2c_transfer;
45};
46
47struct tegra_edid {
48 struct tegra_edid_pvt *data;
49
50 struct mutex lock;
51 struct tegra_dc_i2c_ops i2c_ops;
52 struct tegra_dc *dc;
53};
54
55#if defined(DEBUG) || defined(CONFIG_DEBUG_FS) 43#if defined(DEBUG) || defined(CONFIG_DEBUG_FS)
56static int tegra_edid_show(struct seq_file *s, void *unused) 44static int tegra_edid_show(struct seq_file *s, void *unused)
57{ 45{
diff --git a/drivers/video/tegra/dc/edid.h b/drivers/video/tegra/dc/edid.h
index 60d32a39d..8a6f8c7ba 100644
--- a/drivers/video/tegra/dc/edid.h
+++ b/drivers/video/tegra/dc/edid.h
@@ -26,7 +26,23 @@
26 26
27#define ELD_MAX_MNL 16 27#define ELD_MAX_MNL 16
28#define ELD_MAX_SAD 16 28#define ELD_MAX_SAD 16
29struct tegra_edid; 29
30struct tegra_edid_pvt;
31
32typedef int (*i2c_transfer_func_t)(struct tegra_dc *dc, struct i2c_msg *msgs,
33 int num);
34
35struct tegra_dc_i2c_ops {
36 i2c_transfer_func_t i2c_transfer;
37};
38
39struct tegra_edid {
40 struct tegra_edid_pvt *data;
41
42 struct mutex lock;
43 struct tegra_dc_i2c_ops i2c_ops;
44 struct tegra_dc *dc;
45};
30 46
31/* 47/*
32 * ELD: EDID Like Data 48 * ELD: EDID Like Data
@@ -49,9 +65,6 @@ struct tegra_edid_hdmi_eld {
49 u8 sad[ELD_MAX_SAD]; 65 u8 sad[ELD_MAX_SAD];
50}; 66};
51 67
52typedef int (*i2c_transfer_func_t)(struct tegra_dc *dc, struct i2c_msg *msgs,
53 int num);
54
55struct tegra_edid *tegra_edid_create(struct tegra_dc *dc, 68struct tegra_edid *tegra_edid_create(struct tegra_dc *dc,
56 i2c_transfer_func_t func); 69 i2c_transfer_func_t func);
57void tegra_edid_destroy(struct tegra_edid *edid); 70void tegra_edid_destroy(struct tegra_edid *edid);
diff --git a/drivers/video/tegra/dc/mode.c b/drivers/video/tegra/dc/mode.c
index feb71c84f..22c4fb6cf 100644
--- a/drivers/video/tegra/dc/mode.c
+++ b/drivers/video/tegra/dc/mode.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Copyright (C) 2010 Google, Inc. 4 * Copyright (C) 2010 Google, Inc.
5 * 5 *
6 * Copyright (c) 2010-2013, NVIDIA CORPORATION, All rights reserved. 6 * Copyright (c) 2010-2014, NVIDIA CORPORATION, All rights reserved.
7 * 7 *
8 * This software is licensed under the terms of the GNU General Public 8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and 9 * License version 2, as published by the Free Software Foundation, and
@@ -219,6 +219,8 @@ int tegra_dc_program_mode(struct tegra_dc *dc, struct tegra_dc_mode *mode)
219 219
220 print_mode(dc, mode, __func__); 220 print_mode(dc, mode, __func__);
221 221
222 tegra_dc_get(dc);
223
222 /* use default EMC rate when switching modes */ 224 /* use default EMC rate when switching modes */
223#ifdef CONFIG_TEGRA_ISOMGR 225#ifdef CONFIG_TEGRA_ISOMGR
224 dc->new_bw_kbps = tegra_dc_calc_min_bandwidth(dc); 226 dc->new_bw_kbps = tegra_dc_calc_min_bandwidth(dc);
@@ -351,6 +353,8 @@ int tegra_dc_program_mode(struct tegra_dc *dc, struct tegra_dc_mode *mode)
351 if (dc->out_ops && dc->out_ops->modeset_notifier) 353 if (dc->out_ops && dc->out_ops->modeset_notifier)
352 dc->out_ops->modeset_notifier(dc); 354 dc->out_ops->modeset_notifier(dc);
353 355
356 tegra_dc_put(dc);
357
354 dc->mode_dirty = false; 358 dc->mode_dirty = false;
355 359
356 trace_display_mode(dc, &dc->mode); 360 trace_display_mode(dc, &dc->mode);
@@ -365,9 +369,9 @@ int tegra_dc_get_panel_sync_rate(void)
365} 369}
366EXPORT_SYMBOL(tegra_dc_get_panel_sync_rate); 370EXPORT_SYMBOL(tegra_dc_get_panel_sync_rate);
367 371
368int tegra_dc_set_mode(struct tegra_dc *dc, const struct tegra_dc_mode *mode) 372static int _tegra_dc_set_mode(struct tegra_dc *dc,
373 const struct tegra_dc_mode *mode)
369{ 374{
370 mutex_lock(&dc->lock);
371 memcpy(&dc->mode, mode, sizeof(dc->mode)); 375 memcpy(&dc->mode, mode, sizeof(dc->mode));
372 dc->mode_dirty = true; 376 dc->mode_dirty = true;
373 377
@@ -378,6 +382,14 @@ int tegra_dc_set_mode(struct tegra_dc *dc, const struct tegra_dc_mode *mode)
378 382
379 print_mode(dc, mode, __func__); 383 print_mode(dc, mode, __func__);
380 dc->frametime_ns = calc_frametime_ns(mode); 384 dc->frametime_ns = calc_frametime_ns(mode);
385
386 return 0;
387}
388
389int tegra_dc_set_mode(struct tegra_dc *dc, const struct tegra_dc_mode *mode)
390{
391 mutex_lock(&dc->lock);
392 _tegra_dc_set_mode(dc, mode);
381 mutex_unlock(&dc->lock); 393 mutex_unlock(&dc->lock);
382 394
383 return 0; 395 return 0;
@@ -520,6 +532,6 @@ int tegra_dc_set_fb_mode(struct tegra_dc *dc,
520 if (!(fbmode->sync & FB_SYNC_VERT_HIGH_ACT)) 532 if (!(fbmode->sync & FB_SYNC_VERT_HIGH_ACT))
521 mode.flags |= TEGRA_DC_MODE_FLAG_NEG_V_SYNC; 533 mode.flags |= TEGRA_DC_MODE_FLAG_NEG_V_SYNC;
522 534
523 return tegra_dc_set_mode(dc, &mode); 535 return _tegra_dc_set_mode(dc, &mode);
524} 536}
525EXPORT_SYMBOL(tegra_dc_set_fb_mode); 537EXPORT_SYMBOL(tegra_dc_set_fb_mode);
diff --git a/drivers/video/tegra/dc/nvsr.c b/drivers/video/tegra/dc/nvsr.c
index 7ad404b08..725b20eb1 100644
--- a/drivers/video/tegra/dc/nvsr.c
+++ b/drivers/video/tegra/dc/nvsr.c
@@ -845,15 +845,6 @@ static void tegra_dc_nvsr_enable(struct tegra_dc *dc)
845 tegra_dc_nvsr_init_src(nvsr); 845 tegra_dc_nvsr_init_src(nvsr);
846} 846}
847 847
848static bool tegra_dc_nvsr_early_enable(struct tegra_dc *dc)
849{
850 struct tegra_dc_nvsr_data *nvsr = dc->nvsr;
851 if (nvsr->out_ops.early_enable)
852 return nvsr->out_ops.early_enable(dc);
853
854 return true;
855}
856
857static void tegra_dc_nvsr_disable(struct tegra_dc *dc) 848static void tegra_dc_nvsr_disable(struct tegra_dc *dc)
858{ 849{
859 struct tegra_dc_nvsr_data *nvsr = dc->nvsr; 850 struct tegra_dc_nvsr_data *nvsr = dc->nvsr;
@@ -939,11 +930,6 @@ static void tegra_dc_nvsr_init_out_ops(struct tegra_dc_nvsr_data *nvsr,
939 nvsr->out_ops.enable = out_ops->enable; 930 nvsr->out_ops.enable = out_ops->enable;
940 } 931 }
941 932
942 if (out_ops->early_enable) {
943 tegra_dc_nvsr_ops.early_enable = tegra_dc_nvsr_early_enable;
944 nvsr->out_ops.early_enable = out_ops->early_enable;
945 }
946
947 if (out_ops->disable) { 933 if (out_ops->disable) {
948 tegra_dc_nvsr_ops.disable = tegra_dc_nvsr_disable; 934 tegra_dc_nvsr_ops.disable = tegra_dc_nvsr_disable;
949 nvsr->out_ops.disable = out_ops->disable; 935 nvsr->out_ops.disable = out_ops->disable;