2 files changed, 13 insertions, 10 deletions

diff --git a/drivers/video/tegra/dc/dsi.c b/drivers/video/tegra/dc/dsi.c
index 31707993b..2d317240c 100644
--- a/drivers/video/tegra/dc/dsi.c
+++ b/drivers/video/tegra/dc/dsi.c
@@ -2105,7 +2105,8 @@ static void tegra_dsi_set_dsi_clk(struct tegra_dc *dc,
                         DIV_ROUND_UP(S_TO_MS(1), dsi->info.refresh_rate);
 
         tegra_dsi_setup_clk(dc, dsi);
-        tegra_dsi_reset_deassert(dsi);
+        if (tegra_bpmp_running())
+                tegra_dsi_reset_deassert(dsi);
 
         dsi->current_dsi_clk_khz =
                         clk_get_rate(dsi->dsi_clk[0]) / 1000;
diff --git a/drivers/video/tegra/dc/dsi_padctrl.c b/drivers/video/tegra/dc/dsi_padctrl.c
index 004f88227..4b2fbc794 100644
--- a/drivers/video/tegra/dc/dsi_padctrl.c
+++ b/drivers/video/tegra/dc/dsi_padctrl.c
@@ -1,7 +1,7 @@
 /*
  * drivers/video/tegra/dc/dsi_padctrl.c
  *
- * Copyright (c) 2015, NVIDIA CORPORATION, All rights reserved.
+ * Copyright (c) 2015-2016, NVIDIA CORPORATION, All rights reserved.
  *
  * This software is licensed under the terms of the GNU General Public
  * License version 2, as published by the Free Software Foundation, and
@@ -204,15 +204,17 @@ struct tegra_dsi_padctrl *tegra_dsi_padctrl_init(struct tegra_dc *dc)
                 goto fail;
         }
 
-        dsi_padctrl->reset = of_reset_control_get(np_dsi, "dsi_padctrl");
-        if (IS_ERR_OR_NULL(dsi_padctrl->reset)) {
-                dev_err(&dc->ndev->dev, "dsi padctl: Failed to get reset\n");
-                err = PTR_ERR(dsi_padctrl->reset);
-                goto fail;
-        }
+        if (tegra_bpmp_running()) {
+                dsi_padctrl->reset = of_reset_control_get(np_dsi, "dsi_padctrl");
+                if (IS_ERR_OR_NULL(dsi_padctrl->reset)) {
+                        dev_err(&dc->ndev->dev, "dsi padctl: Failed to get reset\n");
+                        err = PTR_ERR(dsi_padctrl->reset);
+                        goto fail;
+                }
 
-        /* Reset dsi padctrl module */
-        tegra_dsi_padctrl_reset(dsi_padctrl);
+                /* Reset dsi padctrl module */
+                tegra_dsi_padctrl_reset(dsi_padctrl);
+        }
 
         /* Set up active data and clock lanes mask */
         tegra_dsi_padctrl_setup_pwr_down_mask(dsi, dsi_padctrl);