diff options
14 files changed, 454 insertions, 9 deletions
diff --git a/arch/arm64/boot/dts/tegra186-priv-vcm31-bali-vm1-ebp-pl.dts b/arch/arm64/boot/dts/tegra186-priv-vcm31-bali-vm1-ebp-pl.dts index a6537c5a5..f4b606a63 100644 --- a/arch/arm64/boot/dts/tegra186-priv-vcm31-bali-vm1-ebp-pl.dts +++ b/arch/arm64/boot/dts/tegra186-priv-vcm31-bali-vm1-ebp-pl.dts | |||
@@ -36,4 +36,24 @@ | |||
36 | spi@3270000 { | 36 | spi@3270000 { |
37 | status = "disabled"; | 37 | status = "disabled"; |
38 | }; | 38 | }; |
39 | |||
40 | vse@15810000 { | ||
41 | ivc = <76>; | ||
42 | status = "disabled"; | ||
43 | }; | ||
44 | |||
45 | vse@15820000 { | ||
46 | ivc = <76>; | ||
47 | status = "disabled"; | ||
48 | }; | ||
49 | |||
50 | vse@15830000 { | ||
51 | ivc = <76>; | ||
52 | status = "disabled"; | ||
53 | }; | ||
54 | |||
55 | vse@15840000 { | ||
56 | ivc = <76>; | ||
57 | status = "disabled"; | ||
58 | }; | ||
39 | }; | 59 | }; |
diff --git a/arch/arm64/boot/dts/tegra186-priv-vcm31-bali-vm1-ebp.dts b/arch/arm64/boot/dts/tegra186-priv-vcm31-bali-vm1-ebp.dts index 863142f35..9c37177f9 100644 --- a/arch/arm64/boot/dts/tegra186-priv-vcm31-bali-vm1-ebp.dts +++ b/arch/arm64/boot/dts/tegra186-priv-vcm31-bali-vm1-ebp.dts | |||
@@ -509,7 +509,19 @@ | |||
509 | <&{/i2c@31b0000} TEGRA_SID_GPCDMA_0>, | 509 | <&{/i2c@31b0000} TEGRA_SID_GPCDMA_0>, |
510 | <&{/i2c@31c0000} TEGRA_SID_GPCDMA_0>, | 510 | <&{/i2c@31c0000} TEGRA_SID_GPCDMA_0>, |
511 | <&{/i2c@c250000} TEGRA_SID_GPCDMA_0>, | 511 | <&{/i2c@c250000} TEGRA_SID_GPCDMA_0>, |
512 | <&{/i2c@31e0000} TEGRA_SID_GPCDMA_0>; | 512 | <&{/i2c@31e0000} TEGRA_SID_GPCDMA_0>, |
513 | <&{/vse@15810000} TEGRA_SID_SE_VM0>, | ||
514 | <&{/vse@15820000} TEGRA_SID_SE_VM0>, | ||
515 | <&{/vse@15830000} TEGRA_SID_SE_VM0>, | ||
516 | <&{/vse@15840000} TEGRA_SID_SE_VM0>; | ||
517 | |||
518 | domains { | ||
519 | vse_domain { | ||
520 | address-space = <&common_as>; | ||
521 | sid-list = <TEGRA_SID_SE_VM0>; | ||
522 | sid-list-len = <1>; | ||
523 | }; | ||
524 | }; | ||
513 | 525 | ||
514 | address-space-prop { | 526 | address-space-prop { |
515 | ape_as: ape { | 527 | ape_as: ape { |
@@ -558,4 +570,32 @@ | |||
558 | status = "disabled"; | 570 | status = "disabled"; |
559 | }; | 571 | }; |
560 | }; | 572 | }; |
573 | |||
574 | vse@15810000 { | ||
575 | compatible = "nvidia,tegra186-hv-vse"; | ||
576 | #stream-id-cells = <1>; | ||
577 | ivc = <76>; | ||
578 | status = "disabled"; | ||
579 | }; | ||
580 | |||
581 | vse@15820000 { | ||
582 | compatible = "nvidia,tegra186-hv-vse"; | ||
583 | #stream-id-cells = <1>; | ||
584 | ivc = <76>; | ||
585 | status = "disabled"; | ||
586 | }; | ||
587 | |||
588 | vse@15830000 { | ||
589 | compatible = "nvidia,tegra186-hv-vse"; | ||
590 | #stream-id-cells = <1>; | ||
591 | ivc = <76>; | ||
592 | status = "disabled"; | ||
593 | }; | ||
594 | |||
595 | vse@15840000 { | ||
596 | compatible = "nvidia,tegra186-hv-vse"; | ||
597 | #stream-id-cells = <1>; | ||
598 | ivc = <76>; | ||
599 | status = "disabled"; | ||
600 | }; | ||
561 | }; | 601 | }; |
diff --git a/arch/arm64/boot/dts/tegra186-priv-vcm31-bali-vm2-ebp-pl.dts b/arch/arm64/boot/dts/tegra186-priv-vcm31-bali-vm2-ebp-pl.dts index efd0325d3..ea563fd77 100644 --- a/arch/arm64/boot/dts/tegra186-priv-vcm31-bali-vm2-ebp-pl.dts +++ b/arch/arm64/boot/dts/tegra186-priv-vcm31-bali-vm2-ebp-pl.dts | |||
@@ -27,4 +27,24 @@ | |||
27 | spi@3270000 { | 27 | spi@3270000 { |
28 | status = "okay"; | 28 | status = "okay"; |
29 | }; | 29 | }; |
30 | |||
31 | vse@15810000 { | ||
32 | ivc = <77>; | ||
33 | status = "disabled"; | ||
34 | }; | ||
35 | |||
36 | vse@15820000 { | ||
37 | ivc = <77>; | ||
38 | status = "disabled"; | ||
39 | }; | ||
40 | |||
41 | vse@15830000 { | ||
42 | ivc = <77>; | ||
43 | status = "disabled"; | ||
44 | }; | ||
45 | |||
46 | vse@15840000 { | ||
47 | ivc = <77>; | ||
48 | status = "disabled"; | ||
49 | }; | ||
30 | }; | 50 | }; |
diff --git a/arch/arm64/boot/dts/tegra186-priv-vcm31-bali-vm2-ebp.dts b/arch/arm64/boot/dts/tegra186-priv-vcm31-bali-vm2-ebp.dts index 0c075ce3c..91b93c60d 100644 --- a/arch/arm64/boot/dts/tegra186-priv-vcm31-bali-vm2-ebp.dts +++ b/arch/arm64/boot/dts/tegra186-priv-vcm31-bali-vm2-ebp.dts | |||
@@ -948,17 +948,55 @@ | |||
948 | <&{/i2c@31b0000} TEGRA_SID_GPCDMA_1>, | 948 | <&{/i2c@31b0000} TEGRA_SID_GPCDMA_1>, |
949 | <&{/i2c@31c0000} TEGRA_SID_GPCDMA_1>, | 949 | <&{/i2c@31c0000} TEGRA_SID_GPCDMA_1>, |
950 | <&{/i2c@c250000} TEGRA_SID_GPCDMA_1>, | 950 | <&{/i2c@c250000} TEGRA_SID_GPCDMA_1>, |
951 | <&{/i2c@31e0000} TEGRA_SID_GPCDMA_1>; | 951 | <&{/i2c@31e0000} TEGRA_SID_GPCDMA_1>, |
952 | <&{/vse@15810000} TEGRA_SID_SE_VM1>, | ||
953 | <&{/vse@15820000} TEGRA_SID_SE_VM1>, | ||
954 | <&{/vse@15830000} TEGRA_SID_SE_VM1>, | ||
955 | <&{/vse@15840000} TEGRA_SID_SE_VM1>; | ||
952 | domains { | 956 | domains { |
953 | gpcdma_domain { | 957 | gpcdma_domain { |
954 | address-space = <&common_as>; | 958 | address-space = <&common_as>; |
955 | sid-list = <TEGRA_SID_GPCDMA_1>; | 959 | sid-list = <TEGRA_SID_GPCDMA_1>; |
956 | sid-list-len = <1>; | 960 | sid-list-len = <1>; |
957 | }; | 961 | }; |
962 | |||
963 | vse_domain { | ||
964 | address-space = <&common_as>; | ||
965 | sid-list = <TEGRA_SID_SE_VM1>; | ||
966 | sid-list-len = <1>; | ||
967 | }; | ||
958 | }; | 968 | }; |
959 | }; | 969 | }; |
960 | 970 | ||
961 | gpio-keys { | 971 | gpio-keys { |
962 | status = "disabled"; | 972 | status = "disabled"; |
963 | }; | 973 | }; |
974 | |||
975 | vse@15810000 { | ||
976 | compatible = "nvidia,tegra186-hv-vse"; | ||
977 | #stream-id-cells = <1>; | ||
978 | ivc = <77>; | ||
979 | status = "disabled"; | ||
980 | }; | ||
981 | |||
982 | vse@15820000 { | ||
983 | compatible = "nvidia,tegra186-hv-vse"; | ||
984 | #stream-id-cells = <1>; | ||
985 | ivc = <77>; | ||
986 | status = "disabled"; | ||
987 | }; | ||
988 | |||
989 | vse@15830000 { | ||
990 | compatible = "nvidia,tegra186-hv-vse"; | ||
991 | #stream-id-cells = <1>; | ||
992 | ivc = <77>; | ||
993 | status = "disabled"; | ||
994 | }; | ||
995 | |||
996 | vse@15840000 { | ||
997 | compatible = "nvidia,tegra186-hv-vse"; | ||
998 | #stream-id-cells = <1>; | ||
999 | ivc = <77>; | ||
1000 | status = "disabled"; | ||
1001 | }; | ||
964 | }; | 1002 | }; |
diff --git a/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-android-vm1.dts b/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-android-vm1.dts index 7a8a7d85b..52ae5c77d 100644 --- a/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-android-vm1.dts +++ b/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-android-vm1.dts | |||
@@ -518,7 +518,19 @@ | |||
518 | <&{/i2c@31b0000} TEGRA_SID_GPCDMA_0>, | 518 | <&{/i2c@31b0000} TEGRA_SID_GPCDMA_0>, |
519 | <&{/i2c@31c0000} TEGRA_SID_GPCDMA_0>, | 519 | <&{/i2c@31c0000} TEGRA_SID_GPCDMA_0>, |
520 | <&{/i2c@c250000} TEGRA_SID_GPCDMA_0>, | 520 | <&{/i2c@c250000} TEGRA_SID_GPCDMA_0>, |
521 | <&{/i2c@31e0000} TEGRA_SID_GPCDMA_0>; | 521 | <&{/i2c@31e0000} TEGRA_SID_GPCDMA_0>, |
522 | <&{/vse@15810000} TEGRA_SID_SE_VM0>, | ||
523 | <&{/vse@15820000} TEGRA_SID_SE_VM0>, | ||
524 | <&{/vse@15830000} TEGRA_SID_SE_VM0>, | ||
525 | <&{/vse@15840000} TEGRA_SID_SE_VM0>; | ||
526 | |||
527 | domains { | ||
528 | vse_domain { | ||
529 | address-space = <&common_as>; | ||
530 | sid-list = <TEGRA_SID_SE_VM0>; | ||
531 | sid-list-len = <1>; | ||
532 | }; | ||
533 | }; | ||
522 | 534 | ||
523 | address-space-prop { | 535 | address-space-prop { |
524 | ape_as: ape { | 536 | ape_as: ape { |
@@ -580,4 +592,32 @@ | |||
580 | gpio-keys { | 592 | gpio-keys { |
581 | status = "disabled"; | 593 | status = "disabled"; |
582 | }; | 594 | }; |
595 | |||
596 | vse@15810000 { | ||
597 | compatible = "nvidia,tegra186-hv-vse"; | ||
598 | #stream-id-cells = <1>; | ||
599 | ivc = <76>; | ||
600 | status = "disabled"; | ||
601 | }; | ||
602 | |||
603 | vse@15820000 { | ||
604 | compatible = "nvidia,tegra186-hv-vse"; | ||
605 | #stream-id-cells = <1>; | ||
606 | ivc = <76>; | ||
607 | status = "disabled"; | ||
608 | }; | ||
609 | |||
610 | vse@15830000 { | ||
611 | compatible = "nvidia,tegra186-hv-vse"; | ||
612 | #stream-id-cells = <1>; | ||
613 | ivc = <76>; | ||
614 | status = "disabled"; | ||
615 | }; | ||
616 | |||
617 | vse@15840000 { | ||
618 | compatible = "nvidia,tegra186-hv-vse"; | ||
619 | #stream-id-cells = <1>; | ||
620 | ivc = <76>; | ||
621 | status = "disabled"; | ||
622 | }; | ||
583 | }; | 623 | }; |
diff --git a/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm.dts b/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm.dts index fdc9cece4..7a5815fee 100644 --- a/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm.dts +++ b/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm.dts | |||
@@ -435,7 +435,19 @@ | |||
435 | <&{/i2c@31b0000} TEGRA_SID_GPCDMA_0>, | 435 | <&{/i2c@31b0000} TEGRA_SID_GPCDMA_0>, |
436 | <&{/i2c@31c0000} TEGRA_SID_GPCDMA_0>, | 436 | <&{/i2c@31c0000} TEGRA_SID_GPCDMA_0>, |
437 | <&{/i2c@c250000} TEGRA_SID_GPCDMA_0>, | 437 | <&{/i2c@c250000} TEGRA_SID_GPCDMA_0>, |
438 | <&{/i2c@31e0000} TEGRA_SID_GPCDMA_0>; | 438 | <&{/i2c@31e0000} TEGRA_SID_GPCDMA_0>, |
439 | <&{/vse@15810000} TEGRA_SID_SE_VM0>, | ||
440 | <&{/vse@15820000} TEGRA_SID_SE_VM0>, | ||
441 | <&{/vse@15830000} TEGRA_SID_SE_VM0>, | ||
442 | <&{/vse@15840000} TEGRA_SID_SE_VM0>; | ||
443 | |||
444 | domains { | ||
445 | vse_domain { | ||
446 | address-space = <&common_as>; | ||
447 | sid-list = <TEGRA_SID_SE_VM0>; | ||
448 | sid-list-len = <1>; | ||
449 | }; | ||
450 | }; | ||
439 | 451 | ||
440 | address-space-prop { | 452 | address-space-prop { |
441 | ape_as: ape { | 453 | ape_as: ape { |
@@ -512,4 +524,32 @@ | |||
512 | gpio-keys { | 524 | gpio-keys { |
513 | status = "okay"; | 525 | status = "okay"; |
514 | }; | 526 | }; |
527 | |||
528 | vse@15810000 { | ||
529 | compatible = "nvidia,tegra186-hv-vse"; | ||
530 | #stream-id-cells = <1>; | ||
531 | ivc = <76>; | ||
532 | status = "disabled"; | ||
533 | }; | ||
534 | |||
535 | vse@15820000 { | ||
536 | compatible = "nvidia,tegra186-hv-vse"; | ||
537 | #stream-id-cells = <1>; | ||
538 | ivc = <76>; | ||
539 | status = "disabled"; | ||
540 | }; | ||
541 | |||
542 | vse@15830000 { | ||
543 | compatible = "nvidia,tegra186-hv-vse"; | ||
544 | #stream-id-cells = <1>; | ||
545 | ivc = <76>; | ||
546 | status = "disabled"; | ||
547 | }; | ||
548 | |||
549 | vse@15840000 { | ||
550 | compatible = "nvidia,tegra186-hv-vse"; | ||
551 | #stream-id-cells = <1>; | ||
552 | ivc = <76>; | ||
553 | status = "disabled"; | ||
554 | }; | ||
515 | }; | 555 | }; |
diff --git a/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm1-ebp-pl.dts b/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm1-ebp-pl.dts index 2ebc44e53..8f4f9b48d 100644 --- a/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm1-ebp-pl.dts +++ b/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm1-ebp-pl.dts | |||
@@ -35,4 +35,24 @@ | |||
35 | status = "disabled"; | 35 | status = "disabled"; |
36 | }; | 36 | }; |
37 | }; | 37 | }; |
38 | |||
39 | vse@15810000 { | ||
40 | ivc = <76>; | ||
41 | status = "disabled"; | ||
42 | }; | ||
43 | |||
44 | vse@15820000 { | ||
45 | ivc = <76>; | ||
46 | status = "disabled"; | ||
47 | }; | ||
48 | |||
49 | vse@15830000 { | ||
50 | ivc = <76>; | ||
51 | status = "disabled"; | ||
52 | }; | ||
53 | |||
54 | vse@15840000 { | ||
55 | ivc = <76>; | ||
56 | status = "disabled"; | ||
57 | }; | ||
38 | }; | 58 | }; |
diff --git a/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm1-ebp.dts b/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm1-ebp.dts index febc13f7a..e7ddcd6a8 100644 --- a/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm1-ebp.dts +++ b/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm1-ebp.dts | |||
@@ -509,7 +509,19 @@ | |||
509 | <&{/i2c@31b0000} TEGRA_SID_GPCDMA_0>, | 509 | <&{/i2c@31b0000} TEGRA_SID_GPCDMA_0>, |
510 | <&{/i2c@31c0000} TEGRA_SID_GPCDMA_0>, | 510 | <&{/i2c@31c0000} TEGRA_SID_GPCDMA_0>, |
511 | <&{/i2c@c250000} TEGRA_SID_GPCDMA_0>, | 511 | <&{/i2c@c250000} TEGRA_SID_GPCDMA_0>, |
512 | <&{/i2c@31e0000} TEGRA_SID_GPCDMA_0>; | 512 | <&{/i2c@31e0000} TEGRA_SID_GPCDMA_0>, |
513 | <&{/vse@15810000} TEGRA_SID_SE_VM0>, | ||
514 | <&{/vse@15820000} TEGRA_SID_SE_VM0>, | ||
515 | <&{/vse@15830000} TEGRA_SID_SE_VM0>, | ||
516 | <&{/vse@15840000} TEGRA_SID_SE_VM0>; | ||
517 | |||
518 | domains { | ||
519 | vse_domain { | ||
520 | address-space = <&common_as>; | ||
521 | sid-list = <TEGRA_SID_SE_VM0>; | ||
522 | sid-list-len = <1>; | ||
523 | }; | ||
524 | }; | ||
513 | 525 | ||
514 | address-space-prop { | 526 | address-space-prop { |
515 | ape_as: ape { | 527 | ape_as: ape { |
@@ -558,4 +570,32 @@ | |||
558 | status = "disabled"; | 570 | status = "disabled"; |
559 | }; | 571 | }; |
560 | }; | 572 | }; |
573 | |||
574 | vse@15810000 { | ||
575 | compatible = "nvidia,tegra186-hv-vse"; | ||
576 | #stream-id-cells = <1>; | ||
577 | ivc = <76>; | ||
578 | status = "disabled"; | ||
579 | }; | ||
580 | |||
581 | vse@15820000 { | ||
582 | compatible = "nvidia,tegra186-hv-vse"; | ||
583 | #stream-id-cells = <1>; | ||
584 | ivc = <76>; | ||
585 | status = "disabled"; | ||
586 | }; | ||
587 | |||
588 | vse@15830000 { | ||
589 | compatible = "nvidia,tegra186-hv-vse"; | ||
590 | #stream-id-cells = <1>; | ||
591 | ivc = <76>; | ||
592 | status = "disabled"; | ||
593 | }; | ||
594 | |||
595 | vse@15840000 { | ||
596 | compatible = "nvidia,tegra186-hv-vse"; | ||
597 | #stream-id-cells = <1>; | ||
598 | ivc = <76>; | ||
599 | status = "disabled"; | ||
600 | }; | ||
561 | }; | 601 | }; |
diff --git a/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm1-ivi.dts b/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm1-ivi.dts index 6670d701c..f265dfb32 100644 --- a/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm1-ivi.dts +++ b/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm1-ivi.dts | |||
@@ -485,7 +485,19 @@ | |||
485 | <&{/i2c@31b0000} TEGRA_SID_GPCDMA_0>, | 485 | <&{/i2c@31b0000} TEGRA_SID_GPCDMA_0>, |
486 | <&{/i2c@31c0000} TEGRA_SID_GPCDMA_0>, | 486 | <&{/i2c@31c0000} TEGRA_SID_GPCDMA_0>, |
487 | <&{/i2c@c250000} TEGRA_SID_GPCDMA_0>, | 487 | <&{/i2c@c250000} TEGRA_SID_GPCDMA_0>, |
488 | <&{/i2c@31e0000} TEGRA_SID_GPCDMA_0>; | 488 | <&{/i2c@31e0000} TEGRA_SID_GPCDMA_0>, |
489 | <&{/vse@15810000} TEGRA_SID_SE_VM0>, | ||
490 | <&{/vse@15820000} TEGRA_SID_SE_VM0>, | ||
491 | <&{/vse@15830000} TEGRA_SID_SE_VM0>, | ||
492 | <&{/vse@15840000} TEGRA_SID_SE_VM0>; | ||
493 | |||
494 | domains { | ||
495 | vse_domain { | ||
496 | address-space = <&common_as>; | ||
497 | sid-list = <TEGRA_SID_SE_VM0>; | ||
498 | sid-list-len = <1>; | ||
499 | }; | ||
500 | }; | ||
489 | 501 | ||
490 | address-space-prop { | 502 | address-space-prop { |
491 | ape_as: ape { | 503 | ape_as: ape { |
@@ -569,4 +581,32 @@ | |||
569 | instance = <1>; | 581 | instance = <1>; |
570 | ivc = <&tegra_hv 67>; | 582 | ivc = <&tegra_hv 67>; |
571 | }; | 583 | }; |
584 | |||
585 | vse@15810000 { | ||
586 | compatible = "nvidia,tegra186-hv-vse"; | ||
587 | #stream-id-cells = <1>; | ||
588 | ivc = <76>; | ||
589 | status = "disabled"; | ||
590 | }; | ||
591 | |||
592 | vse@15820000 { | ||
593 | compatible = "nvidia,tegra186-hv-vse"; | ||
594 | #stream-id-cells = <1>; | ||
595 | ivc = <76>; | ||
596 | status = "disabled"; | ||
597 | }; | ||
598 | |||
599 | vse@15830000 { | ||
600 | compatible = "nvidia,tegra186-hv-vse"; | ||
601 | #stream-id-cells = <1>; | ||
602 | ivc = <76>; | ||
603 | status = "disabled"; | ||
604 | }; | ||
605 | |||
606 | vse@15840000 { | ||
607 | compatible = "nvidia,tegra186-hv-vse"; | ||
608 | #stream-id-cells = <1>; | ||
609 | ivc = <76>; | ||
610 | status = "disabled"; | ||
611 | }; | ||
572 | }; | 612 | }; |
diff --git a/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm1.dts b/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm1.dts index 1d611ebf5..25faa922d 100644 --- a/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm1.dts +++ b/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm1.dts | |||
@@ -466,7 +466,19 @@ | |||
466 | <&{/i2c@31b0000} TEGRA_SID_GPCDMA_0>, | 466 | <&{/i2c@31b0000} TEGRA_SID_GPCDMA_0>, |
467 | <&{/i2c@31c0000} TEGRA_SID_GPCDMA_0>, | 467 | <&{/i2c@31c0000} TEGRA_SID_GPCDMA_0>, |
468 | <&{/i2c@c250000} TEGRA_SID_GPCDMA_0>, | 468 | <&{/i2c@c250000} TEGRA_SID_GPCDMA_0>, |
469 | <&{/i2c@31e0000} TEGRA_SID_GPCDMA_0>; | 469 | <&{/i2c@31e0000} TEGRA_SID_GPCDMA_0>, |
470 | <&{/vse@15810000} TEGRA_SID_SE_VM0>, | ||
471 | <&{/vse@15820000} TEGRA_SID_SE_VM0>, | ||
472 | <&{/vse@15830000} TEGRA_SID_SE_VM0>, | ||
473 | <&{/vse@15840000} TEGRA_SID_SE_VM0>; | ||
474 | |||
475 | domains { | ||
476 | vse_domain { | ||
477 | address-space = <&common_as>; | ||
478 | sid-list = <TEGRA_SID_SE_VM0>; | ||
479 | sid-list-len = <1>; | ||
480 | }; | ||
481 | }; | ||
470 | 482 | ||
471 | address-space-prop { | 483 | address-space-prop { |
472 | ape_as: ape { | 484 | ape_as: ape { |
@@ -546,4 +558,32 @@ | |||
546 | gpio-keys { | 558 | gpio-keys { |
547 | status = "disabled"; | 559 | status = "disabled"; |
548 | }; | 560 | }; |
561 | |||
562 | vse@15810000 { | ||
563 | compatible = "nvidia,tegra186-hv-vse"; | ||
564 | #stream-id-cells = <1>; | ||
565 | ivc = <76>; | ||
566 | status = "disabled"; | ||
567 | }; | ||
568 | |||
569 | vse@15820000 { | ||
570 | compatible = "nvidia,tegra186-hv-vse"; | ||
571 | #stream-id-cells = <1>; | ||
572 | ivc = <76>; | ||
573 | status = "disabled"; | ||
574 | }; | ||
575 | |||
576 | vse@15830000 { | ||
577 | compatible = "nvidia,tegra186-hv-vse"; | ||
578 | #stream-id-cells = <1>; | ||
579 | ivc = <76>; | ||
580 | status = "disabled"; | ||
581 | }; | ||
582 | |||
583 | vse@15840000 { | ||
584 | compatible = "nvidia,tegra186-hv-vse"; | ||
585 | #stream-id-cells = <1>; | ||
586 | ivc = <76>; | ||
587 | status = "disabled"; | ||
588 | }; | ||
549 | }; | 589 | }; |
diff --git a/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm2-ebp-pl.dts b/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm2-ebp-pl.dts index 9a3c7cbe7..cdb4e52e8 100644 --- a/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm2-ebp-pl.dts +++ b/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm2-ebp-pl.dts | |||
@@ -27,4 +27,24 @@ | |||
27 | nvidia,pts-base = <284>; | 27 | nvidia,pts-base = <284>; |
28 | nvidia,nb-pts = <284>; | 28 | nvidia,nb-pts = <284>; |
29 | }; | 29 | }; |
30 | |||
31 | vse@15810000 { | ||
32 | ivc = <77>; | ||
33 | status = "disabled"; | ||
34 | }; | ||
35 | |||
36 | vse@15820000 { | ||
37 | ivc = <77>; | ||
38 | status = "disabled"; | ||
39 | }; | ||
40 | |||
41 | vse@15830000 { | ||
42 | ivc = <77>; | ||
43 | status = "disabled"; | ||
44 | }; | ||
45 | |||
46 | vse@15840000 { | ||
47 | ivc = <77>; | ||
48 | status = "disabled"; | ||
49 | }; | ||
30 | }; | 50 | }; |
diff --git a/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm2-ebp.dts b/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm2-ebp.dts index 0359f00fb..cdd8fc2b8 100644 --- a/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm2-ebp.dts +++ b/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm2-ebp.dts | |||
@@ -947,17 +947,55 @@ | |||
947 | <&{/i2c@31b0000} TEGRA_SID_GPCDMA_1>, | 947 | <&{/i2c@31b0000} TEGRA_SID_GPCDMA_1>, |
948 | <&{/i2c@31c0000} TEGRA_SID_GPCDMA_1>, | 948 | <&{/i2c@31c0000} TEGRA_SID_GPCDMA_1>, |
949 | <&{/i2c@c250000} TEGRA_SID_GPCDMA_1>, | 949 | <&{/i2c@c250000} TEGRA_SID_GPCDMA_1>, |
950 | <&{/i2c@31e0000} TEGRA_SID_GPCDMA_1>; | 950 | <&{/i2c@31e0000} TEGRA_SID_GPCDMA_1>, |
951 | <&{/vse@15810000} TEGRA_SID_SE_VM1>, | ||
952 | <&{/vse@15820000} TEGRA_SID_SE_VM1>, | ||
953 | <&{/vse@15830000} TEGRA_SID_SE_VM1>, | ||
954 | <&{/vse@15840000} TEGRA_SID_SE_VM1>; | ||
951 | domains { | 955 | domains { |
952 | gpcdma_domain { | 956 | gpcdma_domain { |
953 | address-space = <&common_as>; | 957 | address-space = <&common_as>; |
954 | sid-list = <TEGRA_SID_GPCDMA_1>; | 958 | sid-list = <TEGRA_SID_GPCDMA_1>; |
955 | sid-list-len = <1>; | 959 | sid-list-len = <1>; |
956 | }; | 960 | }; |
961 | |||
962 | vse_domain { | ||
963 | address-space = <&common_as>; | ||
964 | sid-list = <TEGRA_SID_SE_VM1>; | ||
965 | sid-list-len = <1>; | ||
966 | }; | ||
957 | }; | 967 | }; |
958 | }; | 968 | }; |
959 | 969 | ||
960 | gpio-keys { | 970 | gpio-keys { |
961 | status = "disabled"; | 971 | status = "disabled"; |
962 | }; | 972 | }; |
973 | |||
974 | vse@15810000 { | ||
975 | compatible = "nvidia,tegra186-hv-vse"; | ||
976 | #stream-id-cells = <1>; | ||
977 | ivc = <77>; | ||
978 | status = "disabled"; | ||
979 | }; | ||
980 | |||
981 | vse@15820000 { | ||
982 | compatible = "nvidia,tegra186-hv-vse"; | ||
983 | #stream-id-cells = <1>; | ||
984 | ivc = <77>; | ||
985 | status = "disabled"; | ||
986 | }; | ||
987 | |||
988 | vse@15830000 { | ||
989 | compatible = "nvidia,tegra186-hv-vse"; | ||
990 | #stream-id-cells = <1>; | ||
991 | ivc = <77>; | ||
992 | status = "disabled"; | ||
993 | }; | ||
994 | |||
995 | vse@15840000 { | ||
996 | compatible = "nvidia,tegra186-hv-vse"; | ||
997 | #stream-id-cells = <1>; | ||
998 | ivc = <77>; | ||
999 | status = "disabled"; | ||
1000 | }; | ||
963 | }; | 1001 | }; |
diff --git a/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm2.dts b/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm2.dts index 01218a883..5816f95bc 100644 --- a/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm2.dts +++ b/arch/arm64/boot/dts/tegra186-priv-vcm31-p2382-010-a01-00-base-vm2.dts | |||
@@ -915,7 +915,12 @@ | |||
915 | <&{/i2c@31b0000} TEGRA_SID_GPCDMA_1>, | 915 | <&{/i2c@31b0000} TEGRA_SID_GPCDMA_1>, |
916 | <&{/i2c@31c0000} TEGRA_SID_GPCDMA_1>, | 916 | <&{/i2c@31c0000} TEGRA_SID_GPCDMA_1>, |
917 | <&{/i2c@c250000} TEGRA_SID_GPCDMA_1>, | 917 | <&{/i2c@c250000} TEGRA_SID_GPCDMA_1>, |
918 | <&{/i2c@31e0000} TEGRA_SID_GPCDMA_1>; | 918 | <&{/i2c@31e0000} TEGRA_SID_GPCDMA_1>, |
919 | <&{/vse@15810000} TEGRA_SID_SE_VM1>, | ||
920 | <&{/vse@15820000} TEGRA_SID_SE_VM1>, | ||
921 | <&{/vse@15830000} TEGRA_SID_SE_VM1>, | ||
922 | <&{/vse@15840000} TEGRA_SID_SE_VM1>; | ||
923 | |||
919 | domains { | 924 | domains { |
920 | ape_domain { | 925 | ape_domain { |
921 | address-space = <&ape_as>; | 926 | address-space = <&ape_as>; |
@@ -928,6 +933,12 @@ | |||
928 | sid-list = <TEGRA_SID_GPCDMA_1>; | 933 | sid-list = <TEGRA_SID_GPCDMA_1>; |
929 | sid-list-len = <1>; | 934 | sid-list-len = <1>; |
930 | }; | 935 | }; |
936 | |||
937 | vse_domain { | ||
938 | address-space = <&common_as>; | ||
939 | sid-list = <TEGRA_SID_SE_VM1>; | ||
940 | sid-list-len = <1>; | ||
941 | }; | ||
931 | }; | 942 | }; |
932 | 943 | ||
933 | address-space-prop { | 944 | address-space-prop { |
@@ -1018,4 +1029,32 @@ | |||
1018 | gpio-keys { | 1029 | gpio-keys { |
1019 | status = "disabled"; | 1030 | status = "disabled"; |
1020 | }; | 1031 | }; |
1032 | |||
1033 | vse@15810000 { | ||
1034 | compatible = "nvidia,tegra186-hv-vse"; | ||
1035 | #stream-id-cells = <1>; | ||
1036 | ivc = <77>; | ||
1037 | status = "disabled"; | ||
1038 | }; | ||
1039 | |||
1040 | vse@15820000 { | ||
1041 | compatible = "nvidia,tegra186-hv-vse"; | ||
1042 | #stream-id-cells = <1>; | ||
1043 | ivc = <77>; | ||
1044 | status = "disabled"; | ||
1045 | }; | ||
1046 | |||
1047 | vse@15830000 { | ||
1048 | compatible = "nvidia,tegra186-hv-vse"; | ||
1049 | #stream-id-cells = <1>; | ||
1050 | ivc = <77>; | ||
1051 | status = "disabled"; | ||
1052 | }; | ||
1053 | |||
1054 | vse@15840000 { | ||
1055 | compatible = "nvidia,tegra186-hv-vse"; | ||
1056 | #stream-id-cells = <1>; | ||
1057 | ivc = <77>; | ||
1058 | status = "disabled"; | ||
1059 | }; | ||
1021 | }; | 1060 | }; |
diff --git a/include/dt-bindings/memory/tegra186-swgroup.h b/include/dt-bindings/memory/tegra186-swgroup.h index 4b1dd224a..a31bc576e 100644 --- a/include/dt-bindings/memory/tegra186-swgroup.h +++ b/include/dt-bindings/memory/tegra186-swgroup.h | |||
@@ -39,3 +39,13 @@ | |||
39 | #define TEGRA_SID_HC_VM5 0x45 | 39 | #define TEGRA_SID_HC_VM5 0x45 |
40 | #define TEGRA_SID_HC_VM6 0x46 | 40 | #define TEGRA_SID_HC_VM6 0x46 |
41 | #define TEGRA_SID_HC_VM7 0x47 | 41 | #define TEGRA_SID_HC_VM7 0x47 |
42 | |||
43 | /* SE data buffers */ | ||
44 | #define TEGRA_SID_SE_VM0 0x48 | ||
45 | #define TEGRA_SID_SE_VM1 0x49 | ||
46 | #define TEGRA_SID_SE_VM2 0x4a | ||
47 | #define TEGRA_SID_SE_VM3 0x4b | ||
48 | #define TEGRA_SID_SE_VM4 0x4c | ||
49 | #define TEGRA_SID_SE_VM5 0x4d | ||
50 | #define TEGRA_SID_SE_VM6 0x4e | ||
51 | #define TEGRA_SID_SE_VM7 0x4f | ||