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-rw-r--r--drivers/video/tegra/host/pva/pva-task.h217
-rw-r--r--drivers/video/tegra/host/pva/pva_ioctl.c61
-rw-r--r--drivers/video/tegra/host/pva/pva_queue.c724
-rw-r--r--drivers/video/tegra/host/pva/pva_queue.h35
-rw-r--r--include/uapi/linux/nvhost_pva_ioctl.h2
5 files changed, 1008 insertions, 31 deletions
diff --git a/drivers/video/tegra/host/pva/pva-task.h b/drivers/video/tegra/host/pva/pva-task.h
new file mode 100644
index 000000000..622d5e16e
--- /dev/null
+++ b/drivers/video/tegra/host/pva/pva-task.h
@@ -0,0 +1,217 @@
1/*
2 * Copyright (c) 2016 NVIDIA Corporation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#ifndef _PVA_TASK_H_
18#define _PVA_TASK_H_
19
20#define TASK_VERSION_ID 0x01
21#define PVA_TASK_VERSION_ID 0x01
22#define PVA_ENGINE_ID 'P'
23
24#define PVA_MAX_PREACTION_LISTS 1U
25#define PVA_MAX_POSTACTION_LISTS 1U
26
27/*
28 * These are not the in DRAM representations of the action list elements,
29 * they are repackaged to allow for them to be managed more efficiently.
30 */
31struct pva_task_action_ptr {
32 u64 p;
33 u32 v;
34} __packed;
35
36struct pva_task_action_gos {
37 u8 gos;
38 u16 ofs;
39 u32 v;
40} __packed;
41
42struct pva_task_action_status {
43 u64 p;
44 u16 status;
45} __packed;
46
47/*
48 * Generic task meta-data for the CV pipeline.
49 */
50
51struct pva_gen_task {
52 u64 next; /* ptr to next task in the list */
53 u8 versionid;
54 u8 engineid;
55 u16 length;
56 u16 sequence;
57 u8 n_preaction_lists;
58 u8 n_postaction_lists;
59 u16 preaction_lists_p;
60 u16 postaction_lists_p;
61} __packed;
62
63/*
64 * Structure pointed to by {pre/post}action_lists_p. This points
65 * to the actual action list.
66 */
67struct pva_action_list {
68 u16 offset;
69 u16 length;
70} __packed;
71
72enum pva_task_action_ids_e {
73 TASK_ACT_TERMINATE = 0x00U,
74 TASK_ACT_NEXT = 0x01U,
75 TASK_ACT_RESTART = 0x02U,
76 TASK_ACT_ERROR = 0x03U,
77 TASK_ACT_STOP = 0x10U,
78 TASK_ACT_DEV_SPEC_1ST = 0x40U,
79 TASK_ACT_PVA_STATISTICS = 0x40U,
80 TASK_ACT_DEV_SPEC_LAST = 0x7FU,
81 TASK_ACT_PTR_WRITE_VAL = 0x80U,
82 TASK_ACT_PTR_WRITE_VAL_SFRAME = 0x81U,
83 TASK_ACT_PTR_INCR = 0x82U,
84 TASK_ACT_PTR_BLK_EQUAL = 0x90U,
85 TASK_ACT_PTR_BLK_EQUAL_SFRAME = 0x91U,
86 TASK_ACT_PTR_BLK_GTREQL = 0x92U,
87 TASK_ACT_PTR_BLK_GTREQL_SFRAME = 0x93U,
88 TASK_ACT_GOS_WRITE_VAL = 0xA0U,
89 TASK_ACT_GOS_WRITE_VAL_SFRAME = 0xA1U,
90 TASK_ACT_GOS_INCR = 0xA2U,
91 TASK_ACT_GOS_BLK_EQUAL = 0xB0U,
92 TASK_ACT_GOS_BLK_EQUAL_SFRAME = 0xB1U,
93 TASK_ACT_GOS_BLK_GTREQL = 0xB2U,
94 TASK_ACT_GOS_BLK_GTREQL_SFRAME = 0xB3U,
95 TASK_ACT_READ_STATUS = 0xC0U,
96 TASK_ACT_WRITE_STATUS = 0xC1U,
97};
98
99struct pva_gen_task_status {
100 u64 timestamp;
101 u32 engine_status;
102 u16 subframe;
103 u16 status_task;
104};
105
106struct pva_task_statistics {
107 u64 queued_time; /* when task was accepted by PVA */
108 u64 head_time; /* when task reached head of queue */
109 u64 input_actions_complete; /* when input actions done */
110 u64 vpu_assigned_time; /* when task assigned a VPU */
111 u64 vpu_start_time; /* when VPU started running task */
112 u64 vpu_complete_time; /* when execution completed */
113 u64 complete_time; /* when task considered complete */
114 u8 vpu_assigned; /* which VPU task was assigned */
115 u8 reserved[7];
116};
117
118/*
119 * PVA specific task structure.
120 */
121#define PVA_TASK_FL_ATOMIC (1 << 0)
122#define PVA_TASK_FL_CV_RD_SCALARS (1 << 1)
123#define PVA_TASK_FL_CV_WR_SCALARS (1 << 2)
124#define PVA_TASK_FL_CV_WR_ROI (1 << 3)
125
126struct pva_task {
127 struct pva_gen_task gen_task;
128 u8 runlist_version;
129 u8 queue_id;
130 u8 num_input_parameters;
131 u8 num_output_parameters;
132 u8 operation_version;
133 u8 reserved;
134 u16 input_parameters;
135 u16 output_parameters;
136 u16 flags;
137 u32 operation;
138 u64 timeout;
139 u8 r5_reserved[32];
140};
141
142enum pva_task_parameter_type_e {
143 PVA_PARAM_FIRST = 0U, /* must match first type */
144 PVA_PARAM_SCALAR_LIST = 0U,
145 PVA_PARAM_SURFACE_LIST = 1U,
146 PVA_PARAM_ROI_LIST = 2U,
147 PVA_PARAM_2DPOINTS_LIST = 3U,
148 PVA_PARAM_LAST = 4U /* must be last! */
149};
150
151struct pva_task_parameter_array {
152 u64 address;
153 u32 size;
154 u32 type; /* type = pva_task_parameter_type_t */
155};
156
157/*
158 * Parameter descriptor (all parameters have the same header)
159 * the specific data for the parameters immediately follows
160 * the descriptor.
161 */
162struct pva_task_parameter_desc {
163 u32 num_parameters;
164 u32 reserved;
165};
166
167/*
168 * Individual Region of Interest (ROI) descriptor
169 */
170struct pva_task_roi_desc {
171 u32 left;
172 u32 top;
173 u32 right;
174 u32 bottom;
175};
176
177/*
178 * Surface descriptor
179 */
180struct pva_task_surface {
181 u64 address;
182 u64 roi_addr;
183 u32 roi_size;
184 u32 surface_size;
185 u32 width;
186 u32 height;
187 u32 line_stride;
188 u32 plane_stride;
189 u32 num_planes;
190 u8 layout;
191 u8 block_height_log2;
192 u8 memory;
193 u8 reserved;
194 u64 format;
195};
196
197/*
198 * 2-dimentional point descriptor
199 */
200struct pva_task_point2d {
201