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-rw-r--r--drivers/iommu/arm-smmu-t19x.c147
1 files changed, 81 insertions, 66 deletions
diff --git a/drivers/iommu/arm-smmu-t19x.c b/drivers/iommu/arm-smmu-t19x.c
index 3fc77f81b..6cc33b726 100644
--- a/drivers/iommu/arm-smmu-t19x.c
+++ b/drivers/iommu/arm-smmu-t19x.c
@@ -15,7 +15,7 @@
15 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 15 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
16 * 16 *
17 * Copyright (C) 2013 ARM Limited 17 * Copyright (C) 2013 ARM Limited
18 * Copyright (c) 2015-2020, NVIDIA CORPORATION. All rights reserved. 18 * Copyright (c) 2015-2021, NVIDIA CORPORATION. All rights reserved.
19 * 19 *
20 * Author: Will Deacon <will.deacon@arm.com> 20 * Author: Will Deacon <will.deacon@arm.com>
21 * 21 *
@@ -1680,12 +1680,18 @@ static int smmu_master_show(struct seq_file *s, void *unused)
1680 int i; 1680 int i;
1681 struct arm_smmu_master *master = s->private; 1681 struct arm_smmu_master *master = s->private;
1682 1682
1683 if (!master->cfg)
1684 return 0;
1683 for (i = 0; i < master->cfg->num_streamids; i++) 1685 for (i = 0; i < master->cfg->num_streamids; i++)
1684 seq_printf(s, "streamids: % 3d ", master->cfg->streamids[i]); 1686 seq_printf(s, "streamids: % 3d ", master->cfg->streamids[i]);
1685 seq_printf(s, "\n"); 1687 seq_printf(s, "\n");
1688
1689 if (!master->cfg->smrs)
1690 return 0;
1686 for (i = 0; i < master->cfg->num_streamids; i++) 1691 for (i = 0; i < master->cfg->num_streamids; i++)
1687 seq_printf(s, "smrs: % 3d ", master->cfg->smrs[i].idx); 1692 seq_printf(s, "smrs: % 3d ", master->cfg->smrs[i].idx);
1688 seq_printf(s, "\n"); 1693 seq_printf(s, "\n");
1694
1689 return 0; 1695 return 0;
1690} 1696}
1691 1697
@@ -2979,9 +2985,11 @@ static void arm_smmu_debugfs_create(struct arm_smmu_device *smmu)
2979 if (!dent_gr) 2985 if (!dent_gr)
2980 goto err_out; 2986 goto err_out;
2981 2987
2982 dent_gnsr = debugfs_create_dir("gnsr", smmu->debugfs_root); 2988 if (!is_tegra_hypervisor_mode()) {
2983 if (!dent_gnsr) 2989 dent_gnsr = debugfs_create_dir("gnsr", smmu->debugfs_root);
2984 goto err_out; 2990 if (!dent_gnsr)
2991 goto err_out;
2992 }
2985 2993
2986 smmu->masters_root = debugfs_create_dir("masters", smmu->debugfs_root); 2994 smmu->masters_root = debugfs_create_dir("masters", smmu->debugfs_root);
2987 if (!smmu->masters_root) 2995 if (!smmu->masters_root)
@@ -3042,75 +3050,82 @@ static void arm_smmu_debugfs_create(struct arm_smmu_device *smmu)
3042 debugfs_create_regset32("regdump", S_IRUGO, smmu->debugfs_root, 3050 debugfs_create_regset32("regdump", S_IRUGO, smmu->debugfs_root,
3043 smmu->regset); 3051 smmu->regset);
3044 3052
3045 bytes = sizeof(*smmu->perf_regset); 3053 if (!is_tegra_hypervisor_mode()) {
3046 bytes += ARRAY_SIZE(arm_smmu_gnsr0_regs) * sizeof(*regs); 3054 bytes = sizeof(*smmu->perf_regset);
3047 /* 3055 bytes += ARRAY_SIZE(arm_smmu_gnsr0_regs) * sizeof(*regs);
3048 * Account the number of bytes for two sets of 3056 /*
3049 * counter group registers 3057 * Account the number of bytes for two sets of
3050 */ 3058 * counter group registers
3051 bytes += 2 * PMCG_SIZE * sizeof(*regs); 3059 */
3052 /* 3060 bytes += 2 * PMCG_SIZE * sizeof(*regs);
3053 * Account the number of bytes for two sets of 3061 /*
3054 * event counter registers 3062 * Account the number of bytes for two sets of
3055 */ 3063 * event counter registers
3056 bytes += 2 * PMEV_SIZE * sizeof(*regs); 3064 */
3057 3065 bytes += 2 * PMEV_SIZE * sizeof(*regs);
3058 /* Allocate memory for Perf Monitor registers */
3059 smmu->perf_regset = kzalloc(bytes, GFP_KERNEL);
3060 if (!smmu->perf_regset)
3061 goto err_out;
3062
3063 /*
3064 * perf_regset base address is placed at offset (3 * smmu_pagesize)
3065 * from smmu->base address
3066 */
3067 smmu->perf_regset->base = smmu->base[0] + 3 * (1 << smmu->pgshift);
3068 smmu->perf_regset->nregs = ARRAY_SIZE(arm_smmu_gnsr0_regs) +
3069 2 * PMCG_SIZE + 2 * PMEV_SIZE;
3070 smmu->perf_regset->regs =
3071 (struct debugfs_reg32 *)(smmu->perf_regset + 1);
3072
3073 regs = (struct debugfs_reg32 *)smmu->perf_regset->regs;
3074
3075 for (i = 0; i < ARRAY_SIZE(arm_smmu_gnsr0_regs); i++) {
3076 regs->name = arm_smmu_gnsr0_regs[i].name;
3077 regs->offset = arm_smmu_gnsr0_regs[i].offset;
3078 regs++;
3079 }
3080 3066
3081 for (i = 0; i < PMEV_SIZE; i++) { 3067 /* Allocate memory for Perf Monitor registers */
3082 regs->name = kasprintf(GFP_KERNEL, "GNSR0_PMEVTYPER%d_0", i); 3068 smmu->perf_regset = kzalloc(bytes, GFP_KERNEL);
3083 if (!regs->name) 3069 if (!smmu->perf_regset)
3084 goto err_out; 3070 goto err_out;
3085 regs->offset = ARM_SMMU_GNSR0_PMEVTYPER(i);
3086 regs++;
3087 3071
3088 regs->name = kasprintf(GFP_KERNEL, "GNSR0_PMEVCNTR%d_0", i); 3072 /*
3089 if (!regs->name) 3073 * perf_regset base address is placed at offset
3090 goto err_out; 3074 * (3 * smmu_pagesize) from smmu->base address
3091 regs->offset = ARM_SMMU_GNSR0_PMEVCNTR(i); 3075 */
3092 regs++; 3076 smmu->perf_regset->base = smmu->base[0] +
3093 } 3077 3 * (1 << smmu->pgshift);
3078 smmu->perf_regset->nregs = ARRAY_SIZE(arm_smmu_gnsr0_regs) +
3079 2 * PMCG_SIZE + 2 * PMEV_SIZE;
3080 smmu->perf_regset->regs =
3081 (struct debugfs_reg32 *)(smmu->perf_regset + 1);
3082
3083 regs = (struct debugfs_reg32 *)smmu->perf_regset->regs;
3084
3085 for (i = 0; i < ARRAY_SIZE(arm_smmu_gnsr0_regs); i++) {
3086 regs->name = arm_smmu_gnsr0_regs[i].name;
3087 regs->offset = arm_smmu_gnsr0_regs[i].offset;
3088 regs++;
3089 }
3094 3090
3095 for (i = 0; i < PMCG_SIZE; i++) { 3091 for (i = 0; i < PMEV_SIZE; i++) {
3096 regs->name = kasprintf(GFP_KERNEL, "GNSR0_PMCGCR%d_0", i); 3092 regs->name = kasprintf(GFP_KERNEL,
3097 if (!regs->name) 3093 "GNSR0_PMEVTYPER%d_0", i);
3098 goto err_out; 3094 if (!regs->name)
3099 regs->offset = ARM_SMMU_GNSR0_PMCGCR(i); 3095 goto err_out;
3100 regs++; 3096 regs->offset = ARM_SMMU_GNSR0_PMEVTYPER(i);
3097 regs++;
3098
3099 regs->name = kasprintf(GFP_KERNEL,
3100 "GNSR0_PMEVCNTR%d_0", i);
3101 if (!regs->name)
3102 goto err_out;
3103 regs->offset = ARM_SMMU_GNSR0_PMEVCNTR(i);
3104 regs++;
3105 }
3101 3106
3102 regs->name = kasprintf(GFP_KERNEL, "GNSR0_PMCGSMR%d_0", i); 3107 for (i = 0; i < PMCG_SIZE; i++) {
3103 if (!regs->name) 3108 regs->name = kasprintf(GFP_KERNEL,
3109 "GNSR0_PMCGCR%d_0", i);
3110 if (!regs->name)
3104 goto err_out; 3111 goto err_out;
3105 regs->offset = ARM_SMMU_GNSR0_PMCGSMR(i); 3112 regs->offset = ARM_SMMU_GNSR0_PMCGCR(i);
3106 regs++; 3113 regs++;
3107 } 3114
3115 regs->name = kasprintf(GFP_KERNEL,
3116 "GNSR0_PMCGSMR%d_0", i);
3117 if (!regs->name)
3118 goto err_out;
3119 regs->offset = ARM_SMMU_GNSR0_PMCGSMR(i);
3120 regs++;
3121 }
3108 3122
3109 regs = (struct debugfs_reg32 *)smmu->perf_regset->regs; 3123 regs = (struct debugfs_reg32 *)smmu->perf_regset->regs;
3110 for (i = 0; i < smmu->perf_regset->nregs; i++) { 3124 for (i = 0; i < smmu->perf_regset->nregs; i++) {
3111 debugfs_create_file(regs->name, S_IRUGO | S_IWUSR, 3125 debugfs_create_file(regs->name, S_IRUGO | S_IWUSR,
3112 dent_gnsr, regs, &smmu_perf_regset_debugfs_fops); 3126 dent_gnsr, regs, &smmu_perf_regset_debugfs_fops);
3113 regs++; 3127 regs++;
3128 }
3114 } 3129 }
3115 3130
3116 debugfs_create_file("context_filter", S_IRUGO | S_IWUSR, 3131 debugfs_create_file("context_filter", S_IRUGO | S_IWUSR,