ALSA: hda/tegra: add chip data

For few features or HW fixes, we have been using DT properties to pass
relevant information. These are not the standard DT bindings. Instead chip
specific information can be used in the driver. Below DT properties are
replaced with suitable chip data members.
  1. nvidia,num-sdo-stripe --> war_sdo_lines
  2. nvidia,avoid-compact-sdo-bw --> war_sdo_bw
  3. nvidia,set-watermark-reg --> set_watermark
  4. nvidia,apr-gsc-id --> set_gsc_id

[1] and [2] are HW issues related to Tegra194 and are getting fixed in next
Tegra chip (bug 200376557 and bug 200379206)

[3] and [4] are HW features for which currently added chip data members
to avoid using DT properties. Both by default are false and no programming
is done. Default watermark values will work. These will be removed once
user control is provided. The programming code is retained only for future
purpose.

DT for HDA is updated in other patches in the series, which involves
cleanup and adding compatibe for Tegra194. Other Tegra chips, as of now,
can use legacy DT compatible.

Bug 200454686

Change-Id: I32ccbccaef5ea6b796fb65c1ab9dc0869066887d
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2117482
(cherry picked from commit 0e013fb24bbb2490c8a706b041ef2e5db219c064)
Reviewed-on: https://git-master.nvidia.com/r/2192652
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 42 insertions, 13 deletions

diff --git a/sound/pci/hda/hda_tegra.c b/sound/pci/hda/hda_tegra.c
index c326c79ce..0ef2f5718 100644
--- a/sound/pci/hda/hda_tegra.c
+++ b/sound/pci/hda/hda_tegra.c
@@ -87,10 +87,18 @@ static const struct of_device_id tegra_disb_pd[] = {
 
 /* GSC_ID register */
 #define HDA_GSC_REG             0x1e0
+#define HDA_GSC_ID              10
 
 #define HDA_MAX_CODECS          8
 #define CHAR_BUF_SIZE_MAX       50
 
+struct tegra_hda_chip_data {
+        unsigned int war_sdo_lines;
+        bool set_watermark;
+        bool war_sdo_bw;
+        bool set_gsc_id;
+};
+
 struct hda_pcm_devices {
         struct azx_pcm *apcm;
         struct kobject *kobj;
@@ -111,6 +119,7 @@ struct hda_tegra {
         struct work_struct probe_work;
         struct kobject *kobj;
         struct hda_pcm_devices *hda_pcm_dev;
+        const struct tegra_hda_chip_data *cdata;
 };
 
 #ifdef CONFIG_PM
@@ -452,6 +461,7 @@ static int hda_tegra_init_chip(struct azx *chip, struct platform_device *pdev)
 
 static int hda_tegra_first_init(struct azx *chip, struct platform_device *pdev)
 {
+        struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
         struct hdac_bus *bus = azx_bus(chip);
         struct snd_card *card = chip->card;
         int err;
@@ -476,11 +486,13 @@ static int hda_tegra_first_init(struct azx *chip, struct platform_device *pdev)
 
         synchronize_irq(bus->irq);
 
-        /* WAR to override no. of SDO lines on T194    */
-        /* GCAP_NSDO is bits 19:18 in T_AZA_DBG_CFG_2  */
-        /* 0 for 1 SDO, 1 for 2 SDO, 2 for 4 SDO lines */
-        if (!of_property_read_u32(pdev->dev.of_node, "nvidia,num-sdo-stripe",
-                        &num_sdo_lines)) {
+        /*
+         * WAR to override no. of SDO lines on T194.
+         * GCAP_NSDO is bits 19:18 in T_AZA_DBG_CFG_2
+         * 0 for 1 SDO, 1 for 2 SDO, 2 for 4 SDO lines
+         */
+        if (hda->cdata && hda->cdata->war_sdo_lines) {
+                num_sdo_lines = hda->cdata->war_sdo_lines;
                 dev_info(card->dev, "Override SDO lines to %u\n",
                         num_sdo_lines);
                 azx_fpci_updatel(chip, DBG_CFG_2, AZX_FPCI_GCAP_NSDO,
@@ -592,8 +604,24 @@ static int hda_tegra_create(struct snd_card *card,
         return 0;
 }
 
+static const struct tegra_hda_chip_data tegra194_cdata = {
+        /* GCAP reg shows 2 SDO lines which does not reflect true capability */
+        .war_sdo_lines          = 4,
+
+        /*
+         * audio can support up to 4SDO lines, but 4SDO lines can not support
+         * 32K/44.1K/48K 2 channel 16bps audio format due to legacy design
+         * limitation. With below flag, following condition is avoided while
+         * deciding number of SDO lines for audio stripe functionality.
+         * { ((num_channels * bits_per_sample) / number of SDOs) = 8 }
+         * Ref: Section 5.3.2.3 (Revision 1.0a: HD audio spec.)
+         */
+        .war_sdo_bw             = true,
+};
+
 static const struct of_device_id hda_tegra_match[] = {
         { .compatible = "nvidia,tegra30-hda" },
+        { .compatible = "nvidia,tegra194-hda", .data = &tegra194_cdata},
         {},
 };
 MODULE_DEVICE_TABLE(of, hda_tegra_match);
@@ -616,6 +644,9 @@ static int hda_tegra_probe(struct platform_device *pdev)
         hda->dev = &pdev->dev;
         chip = &hda->chip;
 
+        /* chip data can be NULL for legacy hda devices */
+        hda->cdata = of_device_get_match_data(&pdev->dev);
+
         hda->partition_id = tegra_pd_get_powergate_id(tegra_disb_pd);
         if (hda->partition_id < 0) {
                 dev_err(&pdev->dev, "Failed to get hda power domain id\n");
@@ -772,8 +803,6 @@ static void hda_tegra_probe_work(struct work_struct *work)
         struct hda_tegra *hda = container_of(work, struct hda_tegra, probe_work);
         struct azx *chip = &hda->chip;
         struct platform_device *pdev = to_platform_device(hda->dev);
-        struct device_node *np = pdev->dev.of_node;
-        int gsc_id;
         struct hdac_bus *bus = azx_bus(chip);
         int err;
 
@@ -782,19 +811,19 @@ static void hda_tegra_probe_work(struct work_struct *work)
         if (err < 0)
                 goto out_free;
 
-        bus->avoid_compact_sdo_bw = of_property_read_bool(np,
-                "nvidia,avoid-compact-sdo-bw");
+        if (hda->cdata)
+                bus->avoid_compact_sdo_bw = hda->cdata->war_sdo_bw;
 
         /* Below code sets watermark registers to maximum   */
         /* value (same as default); only applicable to T194 */
-        if (of_property_read_bool(np, "nvidia,set-watermark-reg")) {
+        if (hda->cdata && hda->cdata->set_watermark) {
                 azx_fpci_writel(chip, FIFO_WATERMARK, 0x07070707);
                 azx_fpci_writel(chip, BUFSZ_NUM_OF_FRAMES, 0x000a0a0a);
         }
 
-        /* program HDA GSC_ID to get access to APR */
-        if (of_property_read_u32(np, "nvidia,apr-gsc-id", &gsc_id) >= 0)
-                hda_tegra_writel(gsc_id, hda->regs + HDA_GSC_REG);
+        /* program HDA_GSC_ID to get access to APR */
+        if (hda->cdata && hda->cdata->set_gsc_id)
+                hda_tegra_writel(HDA_GSC_ID, hda->regs + HDA_GSC_REG);
 
         /* create codec instances */
         err = azx_probe_codecs(chip, HDA_MAX_CODECS);