diff options
| author | Seema Khowala <seemaj@nvidia.com> | 2018-07-20 14:32:47 -0400 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-08-09 02:27:05 -0400 |
| commit | b65109afbbdf20b12e07bf42d15dbd392986256a (patch) | |
| tree | 517d53e67d1aac4f79806491be912f7026a5e757 /include | |
| parent | 735d1ef9edb336402a48845515f95d30b64b72f7 (diff) | |
nvlink: t19x: read nvlink fuses and enable fuse clock
Read fuse_ip_disable_0 to check if nvlink ip is enabled
or not. If nvlink ip is disabled in the chip, do not register
tegra nvlink device.
Dump ucode_minion_rev_0 and secure_minion_debug_dis_0 fuse
values.
Enable fuse clocks during early init and disable the same
at the time of setting link to OFF state. This is required as a
WAR for Bug 2301575. Without fuse clocks being ON, sfk
request would cause h/w hang.
Bug 2258148
Bug 2277570
Bug 200425800
Bug 2301575
Change-Id: Ibf34361ed07d51b24868f60225d59bc70b0a375a
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1777267
Tested-by: Sandarbh Jain <sanjain@nvidia.com>
Reviewed-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions