include: uapi: change the data type in headers

According kernel ABI proposal, user-space headers should have data
type like __u8, __u16, __u32, __u64 instead of u8, u16, u32, u64.

Bug 2062672

Change-Id: I3b5d09584efb0738f87f03c9d746bffec3d2a209
Signed-off-by: Anuj Gangwar <anujg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2116124
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

7 files changed, 55 insertions, 55 deletions

diff --git a/include/uapi/linux/nvhost_events.h b/include/uapi/linux/nvhost_events.h
index 1c1fd7229..747130976 100644
--- a/include/uapi/linux/nvhost_events.h
+++ b/include/uapi/linux/nvhost_events.h
@@ -28,109 +28,109 @@ enum {
 /* Marks that the task is submitted to hardware */
 struct nvhost_task_submit {
         /* Engine class ID */
-        u32 class_id;
+        __u32 class_id;
 
         /* Syncpoint ID */
-        u32 syncpt_id;
+        __u32 syncpt_id;
 
         /* Threshold for task completion */
-        u32 syncpt_thresh;
+        __u32 syncpt_thresh;
 
         /* PID */
-        u32 pid;
+        __u32 pid;
 
         /* TID */
-        u32 tid;
+        __u32 tid;
 } __packed;
 
 /* Marks that the task is moving to execution */
 struct nvhost_task_begin {
         /* Engine class ID */
-        u32 class_id;
+        __u32 class_id;
 
         /* Syncpoint ID */
-        u32 syncpt_id;
+        __u32 syncpt_id;
 
         /* Threshold for task completion */
-        u32 syncpt_thresh;
+        __u32 syncpt_thresh;
 } __packed;
 
 /* Marks that the task is completed */
 struct nvhost_task_end {
         /* Engine class ID */
-        u32 class_id;
+        __u32 class_id;
 
         /* Syncpoint ID */
-        u32 syncpt_id;
+        __u32 syncpt_id;
 
         /* Threshold for task completion */
-        u32 syncpt_thresh;
+        __u32 syncpt_thresh;
 } __packed;
 
 struct nvhost_vpu_perf_counter {
         /* Engine class ID */
-        u32 class_id;
+        __u32 class_id;
 
         /* Syncpoint ID */
-        u32 syncpt_id;
+        __u32 syncpt_id;
 
         /* Threshold for task completion */
-        u32 syncpt_thresh;
+        __u32 syncpt_thresh;
 
         /* Identifier for the R5/VPU algorithm executed */
-        u32 operation;
+        __u32 operation;
 
         /* Algorithm specific identifying tag for the perf counter */
-        u32 tag;
+        __u32 tag;
 
-        u32 count;
-        u32 average;
-        u64 variance;
-        u32 minimum;
-        u32 maximum;
+        __u32 count;
+        __u32 average;
+        __u64 variance;
+        __u32 minimum;
+        __u32 maximum;
 } __packed;
 
 /* Marks the pre/postfence associated with the task */
 struct nvhost_task_fence {
         /* Engine class ID */
-        u32 class_id;
+        __u32 class_id;
 
         /* Kind (prefence or postfence) */
-        u32 kind;
+        __u32 kind;
 
         /* Fence-specific type (see nvdev_fence.h) */
-        u32 fence_type;
+        __u32 fence_type;
 
         /* Valid for NVDEV_FENCE_TYPE_SYNCPT only */
-        u32 syncpt_id;
-        u32 syncpt_thresh;
+        __u32 syncpt_id;
+        __u32 syncpt_thresh;
 
         /* The task this fence is associated with */
-        u32 task_syncpt_id;
-        u32 task_syncpt_thresh;
+        __u32 task_syncpt_id;
+        __u32 task_syncpt_thresh;
 
         /* Valid for NVDEV_FENCE_TYPE_SYNC_FD only */
-        u32 sync_fd;
+        __u32 sync_fd;
 
         /* Valid for NVDEV_FENCE_TYPE_SEMAPHORE
            and NVDEV_FENCE_TYPE_SEMAPHORE_TS */
-        u32 semaphore_handle;
-        u32 semaphore_offset;
-        u32 semaphore_value;
+        __u32 semaphore_handle;
+        __u32 semaphore_offset;
+        __u32 semaphore_value;
 } __packed;
 
 struct nvhost_pva_task_state {
         /* Engine class ID */
-        u32 class_id;
+        __u32 class_id;
 
         /* Syncpoint ID */
-        u32 syncpt_id;
+        __u32 syncpt_id;
 
         /* Threshold for task completion */
-        u32 syncpt_thresh;
+        __u32 syncpt_thresh;
 
         /* Identifier for the R5/VPU algorithm executed */
-        u32 operation;
+        __u32 operation;
 } __packed;
 
 enum {
diff --git a/include/uapi/linux/nvhost_isp_ioctl.h b/include/uapi/linux/nvhost_isp_ioctl.h
index bbad7b918..d8bc8a2d7 100644
--- a/include/uapi/linux/nvhost_isp_ioctl.h
+++ b/include/uapi/linux/nvhost_isp_ioctl.h
@@ -41,7 +41,7 @@ struct isp_emc {
 
 struct isp_la_bw {
         /* Total ISP write BW in MBps, either ISO peak BW or non-ISO avg BW */
-        u32 isp_la_bw;
+        __u32 isp_la_bw;
         /* is ISO or non-ISO */
         bool is_iso;
 };
diff --git a/include/uapi/linux/nvhost_pva_ioctl.h b/include/uapi/linux/nvhost_pva_ioctl.h
index fc0940e95..1c8fc7eae 100644
--- a/include/uapi/linux/nvhost_pva_ioctl.h
+++ b/include/uapi/linux/nvhost_pva_ioctl.h
@@ -1,7 +1,7 @@
 /*
  * Tegra PVA Driver ioctls
  *
- * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2019, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -232,10 +232,10 @@ struct pva_ioctl_submit_task {
         __u64 input_surfaces;
         struct pva_task_parameter input_scalars;
         __u64 primary_payload;
-        u8 reserved0[8];
+        __u8 reserved0[8];
         __u64 output_surfaces;
         struct pva_task_parameter output_scalars;
-        u8 reserved1[16];
+        __u8 reserved1[16];
         __u64 input_task_status;
         __u64 output_task_status;
 };
diff --git a/include/uapi/media/imx219.h b/include/uapi/media/imx219.h
index 73f4abb7e..71a4bc154 100644
--- a/include/uapi/media/imx219.h
+++ b/include/uapi/media/imx219.h
@@ -35,11 +35,11 @@
 #define IMX219_GAIN_ADDR                        0x0157
 
 struct imx219_flash_control {
-        u8 enable;
-        u8 edge_trig_en;
-        u8 start_edge;
-        u8 repeat;
-        u16 delay_frm;
+        __u8 enable;
+        __u8 edge_trig_en;
+        __u8 start_edge;
+        __u8 repeat;
+        __u16 delay_frm;
 };
 
 struct imx219_mode {
diff --git a/include/uapi/media/ov10823.h b/include/uapi/media/ov10823.h
index 88a09ca4a..1223ce661 100644
--- a/include/uapi/media/ov10823.h
+++ b/include/uapi/media/ov10823.h
@@ -55,11 +55,11 @@ struct ov10823_grouphold {
 };
 
 struct ov10823_flash_control {
-        u8 enable;
-        u8 edge_trig_en;
-        u8 start_edge;
-        u8 repeat;
-        u16 delay_frm;
+        __u8 enable;
+        __u8 edge_trig_en;
+        __u8 start_edge;
+        __u8 repeat;
+        __u16 delay_frm;
 };
 
 #endif /* __UAPI_OV10823_H__ */
\ No newline at end of file
diff --git a/include/uapi/misc/eqos_ape_ioctl.h b/include/uapi/misc/eqos_ape_ioctl.h
index 7621c394a..d535fa8f6 100644
--- a/include/uapi/misc/eqos_ape_ioctl.h
+++ b/include/uapi/misc/eqos_ape_ioctl.h
@@ -26,8 +26,8 @@ struct eqos_ape_cmd {
 };
 
 struct eqos_ape_sync_cmd {
-        u64 drift_num;
-        u64 drift_den;
+        __u64 drift_num;
+        __u64 drift_den;
 };
 
 struct rate_to_time_period {
diff --git a/include/uapi/misc/tegra_mipi_ioctl.h b/include/uapi/misc/tegra_mipi_ioctl.h
index 145ebf7fa..b8c4932ad 100644
--- a/include/uapi/misc/tegra_mipi_ioctl.h
+++ b/include/uapi/misc/tegra_mipi_ioctl.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2019, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -19,8 +19,8 @@
 
 #define TEGRA_MIPI_IOCTL_MAGIC 'M'
 
-#define TEGRA_MIPI_IOCTL_BIAS_PAD_CTRL _IOW(TEGRA_MIPI_IOCTL_MAGIC, 1, u32)
-#define TEGRA_MIPI_IOCTL_CAL _IOW(TEGRA_MIPI_IOCTL_MAGIC, 2, u32)
+#define TEGRA_MIPI_IOCTL_BIAS_PAD_CTRL _IOW(TEGRA_MIPI_IOCTL_MAGIC, 1, __u32)
+#define TEGRA_MIPI_IOCTL_CAL _IOW(TEGRA_MIPI_IOCTL_MAGIC, 2, __u32)
 #define TEGRA_MIPI_IOCTL_CAL_STATUS _IOR(TEGRA_MIPI_IOCTL_MAGIC, 3, __u32)
 #define TEGRA_MIPI_IOCTL_BIAS_PAD_CFG0 _IOR(TEGRA_MIPI_IOCTL_MAGIC, 4, __u32)
 #define TEGRA_MIPI_IOCTL_BIAS_PAD_CFG2 _IOR(TEGRA_MIPI_IOCTL_MAGIC, 5, __u32)