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| author | Sai Gurrappadi <sgurrappadi@nvidia.com> | 2017-08-24 23:51:22 -0400 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-08-25 20:24:56 -0400 |
| commit | 85295edf190bcd24fb786c16eb9cf11f2ada5d08 (patch) | |
| tree | 3594851566868d8b0ce0fb36d7ea3d044a838b46 /include/uapi/linux | |
| parent | 8dd09d7666b12b562e3b8dffc3f00f3e6890ab20 (diff) | |
video: tegra: host: Always use VM threshold regs
The WAR to detect which threshold register range to use is flaky. Older
simulator models no longer need to be supported plus this is the
configuration we'll use on silicon so just yank the WAR.
Using the wrong threshold register range ends up causing an interrupt
storm.
Bug 1977648
Change-Id: I7c9c80869329d74702eacb4a9099f36c04a5bf6a
Signed-off-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1545481
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bo Yan <byan@nvidia.com>
Diffstat (limited to 'include/uapi/linux')
0 files changed, 0 insertions, 0 deletions