tegra-profiler: support carmel perfmon events

tegra-profiler:
- Support Carmel uncore perfmon events.
- Remove obsolete pl310 code.

Bug 2847789
Jira DTSP-6023

Change-Id: I41209b1b6bd17ace40be1190ce84de51548d9609
Signed-off-by: Igor Nabirushkin <inabirushkin@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2293698
(cherry picked from commit f26da26a3c3ac62ad919eb8f577fdea0bf15cb68)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2294398
Reviewed-by: Roman Rybalko <rrybalko@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 13 insertions, 6 deletions

diff --git a/include/uapi/linux/tegra_profiler.h b/include/uapi/linux/tegra_profiler.h
index 8029b75a3..d8807e637 100644
--- a/include/uapi/linux/tegra_profiler.h
+++ b/include/uapi/linux/tegra_profiler.h
@@ -1,7 +1,7 @@
 /*
  * include/uapi/linux/tegra_profiler.h
  *
- * Copyright (c) 2013-2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2013-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -20,8 +20,8 @@
 #include <linux/ioctl.h>
 #include <linux/types.h>
 
-#define QUADD_SAMPLES_VERSION   47
-#define QUADD_IO_VERSION        27
+#define QUADD_SAMPLES_VERSION   48
+#define QUADD_IO_VERSION        28
 
 #define QUADD_IO_VERSION_DYNAMIC_RB             5
 #define QUADD_IO_VERSION_RB_MAX_FILL_COUNT      6
@@ -46,6 +46,7 @@
 #define QUADD_IO_VERSION_SAMPLE_ALL_TASKS       25
 #define QUADD_IO_VERSION_EXTABLES_PID           26
 #define QUADD_IO_VERSION_SAMPLING_CNTRL         27
+#define QUADD_IO_VERSION_UNCORE_EVENTS          28
 
 #define QUADD_SAMPLE_VERSION_THUMB_MODE_FLAG    17
 #define QUADD_SAMPLE_VERSION_GROUP_SAMPLES      18
@@ -76,6 +77,7 @@
 #define QUADD_SAMPLE_VERSION_MMAP_CPUID         45
 #define QUADD_SAMPLE_VERSION_PCLK_SEND_CHANGES  46
 #define QUADD_SAMPLE_VERSION_COMM_SAMPLES       47
+#define QUADD_SAMPLE_VERSION_UNCORE_EVENTS      48
 
 #define QUADD_MMAP_HEADER_VERSION       1
 
@@ -185,9 +187,10 @@ enum quadd_record_type {
         QUADD_RECORD_TYPE_HOTPLUG,
 };
 
-enum quadd_event_source {
+enum quadd_event_source_type {
         QUADD_EVENT_SOURCE_PMU = 1,
         QUADD_EVENT_SOURCE_PL310,
+        QUADD_EVENT_SOURCE_CARMEL_UNCORE_PMU,
 };
 
 enum quadd_cpu_mode {
@@ -248,6 +251,7 @@ enum {
 #define QUADD_SAMPLE_FLAG_PF_KTHREAD    (1 << 6)
 #define QUADD_SAMPLE_FLAG_URCS          (1 << 7)
 #define QUADD_SAMPLE_FLAG_IP64          (1 << 8)
+#define QUADD_SAMPLE_FLAG_UNCORE        (1 << 9)
 
 struct quadd_sample_data {
         __u64 ip;
@@ -395,6 +399,7 @@ struct quadd_debug_data {
 #define QUADD_HDR_FLAG_MODE_SAMPLE_TREE (1ULL << 16)
 #define QUADD_HDR_FLAG_MODE_TRACE_TREE  (1ULL << 17)
 #define QUADD_HDR_FLAG_CPUFREQ          (1ULL << 18)
+#define QUADD_HDR_FLAG_UNCORE           (1ULL << 19)
 
 struct quadd_header_data {
         __u16 magic;
@@ -441,6 +446,7 @@ enum {
         QUADD_PARAM_IDX_SIZE_OF_RB      = 0,
         QUADD_PARAM_IDX_EXTRA           = 1,
         QUADD_PARAM_IDX_BT_LOWER_BOUND  = 2,
+        QUADD_PARAM_IDX_UNCORE_FREQ     = 4,
 };
 
 #define QUADD_PARAM_EXTRA_GET_MMAP              (1 << 0)
@@ -462,8 +468,9 @@ enum {
 #define QUADD_PARAM_EXTRA_SAMPLING_SCHED_OUT    (1 << 16)
 
 enum {
-        QUADD_EVENT_TYPE_RAW            = 0,
-        QUADD_EVENT_TYPE_HARDWARE       = 1,
+        QUADD_EVENT_TYPE_RAW                    = 0,
+        QUADD_EVENT_TYPE_HARDWARE               = 1,
+        QUADD_EVENT_TYPE_RAW_CARMEL_UNCORE      = 2,
 
         QUADD_EVENT_TYPE_MAX,
 };