summaryrefslogtreecommitdiffstats
path: root/include/linux
diff options
context:
space:
mode:
authorKrishna Sitaraman <ksitaraman@nvidia.com>2017-01-04 19:44:39 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-02-24 11:43:19 -0500
commitddcfffcf6a354492fccda77f75ad51667f661a40 (patch)
tree9ca7b4a2c15d1226ee6933ee07a472be0d1f9a4a /include/linux
parentc660a0a75342a820c87b36415a12a3d380de9f8a (diff)
t19x: mce: add mce driver
This patch adds the initial driver for sw interface with the mts/mce in t19x. The driver provides api's and debugfs nodes for interaction with the mts/mce. JIRA TPM-1062 Change-Id: I4a682457a8e28e9b8db2a6a370a756f0d0524830 Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com> Reviewed-on: http://git-master/r/1280452 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/t19x_mce.h35
1 files changed, 35 insertions, 0 deletions
diff --git a/include/linux/t19x_mce.h b/include/linux/t19x_mce.h
new file mode 100644
index 000000000..fcd611d94
--- /dev/null
+++ b/include/linux/t19x_mce.h
@@ -0,0 +1,35 @@
1/*
2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#ifndef _LINUX_TEGRA_MCE_H
18#define _LINUX_TEGRA_MCE_H
19
20#define NVG_STAT_MAX_ENTRIES 5
21
22int t19x_mce_enter_cstate(u32 state, u32 wake_time);
23int t19x_mce_update_cstate_info(u32 cluster, u32 ccplex,
24 u32 system, u8 force, u32 wake_mask, bool valid);
25int t19x_mce_update_crossover_time(u32 type, u32 time);
26int t19x_mce_read_cstate_stats(u32 state, u32 *stats);
27int t19x_mce_write_cstate_stats(u32 state, u32 stats);
28int t19x_mce_is_sc7_allowed(u32 state, u32 wake, u32 *allowed);
29int t19x_mce_online_core(int cpu);
30int t19x_mce_cc3_ctrl(u32 freq, u32 volt, u8 enable);
31int t19x_mce_echo_data(u32 data, int *matched);
32int t19x_mce_read_versions(u32 *major, u32 *minor);
33int t19x_mce_enum_features(u64 *features);
34
35#endif