clk: aon: add aon clk provider

PLL_AON clock is controlled by SPE. Add clock provider that can
control PLL_AON state using IPC with SPE instead of BPMP.

Bug 200409889

Change-Id: I2e88eb3a5971881b6f51c4d1472422203831a33e
Signed-off-by: Vishruth Jain <vishruthj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2290986
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 19 insertions, 0 deletions

diff --git a/include/linux/tegra-aon-clk.h b/include/linux/tegra-aon-clk.h
new file mode 100644
index 000000000..e950b84ba
--- /dev/null
+++ b/include/linux/tegra-aon-clk.h
@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2020, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#ifndef _LINUX_TEGRA_AON_CLK_H
+#define _LINUX_TEGRA_AON_CLK_H
+
+int tegra_aon_clk_init(struct device_node *np);
+
+#endif