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authorsreenivasulu velpula <svelpula@nvidia.com>2018-03-30 13:07:26 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-05-22 12:04:50 -0400
commitaeccd17ca3672fa7068a3af26733c556c1665b02 (patch)
treef233011d88dab04c910334e7f2308f3ac8adcc28 /include/linux
parente73c3419e0eae1c345d917e9248ac8bb577fe341 (diff)
cpufreq: Add support for Guest VM
with this changes, guest VM will be able to set/get the CPU frequencies of the CPUs guest owns. Guest cpufreq driver will interface with the cpufreq server which is part of bpmp server. ESLC-1617 Change-Id: I3a4d14ec444a106a8136d3ef271f54c2b5cc5aff Signed-off-by: sreenivasulu velpula <svelpula@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1685271 Reviewed-by: Bo Yan <byan@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Nitin Sehgal <nsehgal@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vipin Kumar <vipink@nvidia.com> Reviewed-by: Sandeep Trasi <strasi@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/tegra-cpufreq.h7
1 files changed, 5 insertions, 2 deletions
diff --git a/include/linux/tegra-cpufreq.h b/include/linux/tegra-cpufreq.h
index 3a2a2fb9a..4563da02d 100644
--- a/include/linux/tegra-cpufreq.h
+++ b/include/linux/tegra-cpufreq.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify it 4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License, 5 * under the terms and conditions of the GNU General Public License,
@@ -20,12 +20,15 @@
20enum tegra_cpufreq_msg_ids { 20enum tegra_cpufreq_msg_ids {
21 TEGRA_CPU_FREQ_THROTTLE, 21 TEGRA_CPU_FREQ_THROTTLE,
22 TEGRA_CPU_FREQ_SET_RATE, 22 TEGRA_CPU_FREQ_SET_RATE,
23 TEGRA_CPU_FREQ_GET_RATE,
23 MAX_IVC_MSG_ID, 24 MAX_IVC_MSG_ID,
24}; 25};
25 26
26int tegra_cpufreq_tx_ivc_msg(uint32_t id, uint32_t len, void *msg_buf);
27int parse_hv_dt_data(struct device_node *dn); 27int parse_hv_dt_data(struct device_node *dn);
28int parse_t194_cpufreq_hv_dt(struct device_node *dn);
28bool hv_is_set_speed_supported(void); 29bool hv_is_set_speed_supported(void);
29void tegra_update_cpu_speed_hv(uint32_t rate, uint8_t cpu); 30void tegra_update_cpu_speed_hv(uint32_t rate, uint8_t cpu);
31uint32_t t194_get_cpu_speed_hv(uint32_t cpu);
32void t194_update_cpu_speed_hv(uint32_t rate, uint32_t cpu);
30 33
31#endif 34#endif