tegra-profiler: power_clk: fix possible deadlock

- power_clk: There is a potential deadlock if
  clk_notifier_unregister() happens during XXXX_notifier_call()
  callback.
  Use mutex_trylock() to prevent a possible deadlock.
- power_rate samples: Do not send unchanged values.

Bug 2491022
Jira DTSP-2248

Change-Id: I53eac956728de88ca645a0ae7ca4e3eb66b2c570
Signed-off-by: Igor Nabirushkin <inabirushkin@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2016234
(cherry picked from commit a26746d7350d89a351592cf1d0e7b78996b1c342)
Reviewed-on: https://git-master.nvidia.com/r/2018190
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dmitry Antipov <dantipov@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 13 insertions, 6 deletions

diff --git a/include/linux/tegra_profiler.h b/include/linux/tegra_profiler.h
index 97495c60c..f81812899 100644
--- a/include/linux/tegra_profiler.h
+++ b/include/linux/tegra_profiler.h
@@ -1,7 +1,7 @@
 /*
  * include/linux/tegra_profiler.h
  *
- * Copyright (c) 2013-2018, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2013-2019, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -19,7 +19,7 @@
 
 #include <linux/ioctl.h>
 
-#define QUADD_SAMPLES_VERSION   45
+#define QUADD_SAMPLES_VERSION   46
 #define QUADD_IO_VERSION        26
 
 #define QUADD_IO_VERSION_DYNAMIC_RB             5
@@ -72,6 +72,7 @@
 #define QUADD_SAMPLE_VERSION_SAMPLE_ALL_TASKS           43
 #define QUADD_SAMPLE_VERSION_KTHREAD_TSK_FLAG           44
 #define QUADD_SAMPLE_VERSION_MMAP_CPUID                 45
+#define QUADD_SAMPLE_VERSION_PCLK_SEND_CHANGES          46
 
 #define QUADD_MMAP_HEADER_VERSION       1
 
@@ -283,13 +284,19 @@ struct quadd_ma_data {
         u32 rss_size;
 };
 
+enum {
+        QUADD_POWER_CLK_CPU = 1,
+        QUADD_POWER_CLK_GPU,
+        QUADD_POWER_CLK_EMC,
+};
+
 struct quadd_power_rate_data {
+        u8 type;
         u64 time;
+        u32 cpu_id;
 
-        u8 nr_cpus;
-
-        u32 gpu;
-        u32 emc;
+        u16 nr_values;
+        u32 flags;
 };
 
 struct quadd_hotplug_data {