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authorSivaram Nair <sivaramn@nvidia.com>2016-12-05 14:39:41 -0500
committerBitan Biswas <bbiswas@nvidia.com>2018-03-14 05:49:57 -0400
commit01367e1a18e74fcc072530bced52c6c1958fd8e2 (patch)
treed2a585f1cdb160fdb28e9c035545babf918d50e1 /include/linux
parente02352900fe259a164d7dd1ced4dff43568b4123 (diff)
platform: tegra: add hsp driver
Copied from linux-t18x repo Bug 200257382 Change-Id: I0746282a8c73350bb31a0a035e28de466c21e9ac Signed-off-by: Sivaram Nair <sivaramn@nvidia.com> Reviewed-on: http://git-master/r/1274692
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/tegra-hsp.h100
1 files changed, 100 insertions, 0 deletions
diff --git a/include/linux/tegra-hsp.h b/include/linux/tegra-hsp.h
new file mode 100644
index 000000000..86ed0102f
--- /dev/null
+++ b/include/linux/tegra-hsp.h
@@ -0,0 +1,100 @@
1/*
2 * Copyright (c) 2014-2016 NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#ifndef _LINUX_TEGRA_HSP_H
18#define _LINUX_TEGRA_HSP_H
19
20#include <linux/types.h>
21
22enum tegra_hsp_master {
23 HSP_FIRST_MASTER = 1,
24
25 /* secure */
26 HSP_MASTER_SECURE_CCPLEX = HSP_FIRST_MASTER,
27 HSP_MASTER_SECURE_DPMU,
28 HSP_MASTER_SECURE_BPMP,
29 HSP_MASTER_SECURE_SPE,
30 HSP_MASTER_SECURE_SCE,
31 HSP_MASTER_SECURE_DMA,
32 HSP_MASTER_SECURE_TSECA,
33 HSP_MASTER_SECURE_TSECB,
34 HSP_MASTER_SECURE_JTAGM,
35 HSP_MASTER_SECURE_CSITE,
36 HSP_MASTER_SECURE_APE,
37
38 /* non-secure */
39 HSP_MASTER_CCPLEX = HSP_FIRST_MASTER + 16,
40 HSP_MASTER_DPMU,
41 HSP_MASTER_BPMP,
42 HSP_MASTER_SPE,
43 HSP_MASTER_SCE,
44 HSP_MASTER_DMA,
45 HSP_MASTER_TSECA,
46 HSP_MASTER_TSECB,
47 HSP_MASTER_JTAGM,
48 HSP_MASTER_CSITE,
49 HSP_MASTER_APE,
50
51 HSP_LAST_MASTER = HSP_MASTER_APE,
52};
53
54enum tegra_hsp_doorbell {
55 HSP_FIRST_DB = 0,
56 HSP_DB_DPMU = HSP_FIRST_DB,
57 HSP_DB_CCPLEX,
58 HSP_DB_CCPLEX_TZ,
59 HSP_DB_BPMP,
60 HSP_DB_SPE,
61 HSP_DB_SCE,
62 HSP_DB_APE,
63 HSP_LAST_DB = HSP_DB_APE,
64 HSP_NR_DBS,
65};
66
67typedef void (*db_handler_t)(void *data);
68
69int tegra_hsp_init(void);
70
71int tegra_hsp_db_enable_master(enum tegra_hsp_master master);
72
73int tegra_hsp_db_disable_master(enum tegra_hsp_master master);
74
75int tegra_hsp_db_ring(enum tegra_hsp_doorbell dbell);
76
77int tegra_hsp_db_can_ring(enum tegra_hsp_doorbell dbell);
78
79int tegra_hsp_db_add_handler(int master, db_handler_t handler, void *data);
80
81int tegra_hsp_db_del_handler(int master);
82
83#define tegra_hsp_find_master(mask, master) ((mask) & (1 << (master)))
84
85struct tegra_hsp_sm_pair;
86
87typedef u32 (*tegra_hsp_sm_full_fn)(void *, u32);
88typedef void (*tegra_hsp_sm_empty_fn)(void *, u32);
89
90struct tegra_hsp_sm_pair *of_tegra_hsp_sm_pair_request(
91 const struct device_node *np, u32 index,
92 tegra_hsp_sm_full_fn, tegra_hsp_sm_empty_fn, void *);
93struct tegra_hsp_sm_pair *of_tegra_hsp_sm_pair_by_name(
94 const struct device_node *np, char const *name,
95 tegra_hsp_sm_full_fn, tegra_hsp_sm_empty_fn, void *);
96void tegra_hsp_sm_pair_free(struct tegra_hsp_sm_pair *);
97void tegra_hsp_sm_pair_write(const struct tegra_hsp_sm_pair *, u32 value);
98bool tegra_hsp_sm_pair_is_empty(const struct tegra_hsp_sm_pair *);
99
100#endif