diff options
| author | Igor Nabirushkin <inabirushkin@nvidia.com> | 2018-11-08 05:49:42 -0500 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2019-01-18 02:51:12 -0500 |
| commit | a6614067673a5e61444fcfcb6c9826bdcf60c28e (patch) | |
| tree | 2e6a50c2732a2e75a2abfa7639d594671c32a07d /include/linux/tegra_profiler.h | |
| parent | 7361e6a275affd6eb5231d6c4b5dae79ad514438 (diff) | |
tegra-profiler: dwarf: support multiple processes
- Support DWARF/ARM-EHABI unwinding for multiple processes.
- Add cpu_id for MMAP samples.
Bug 2438564
Jira DTSP-824
Jira DTSP-1599
Change-Id: I998906011cff240b9a554cd40679cd9ec9c0f7b7
Signed-off-by: Igor Nabirushkin <inabirushkin@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1945653
(cherry picked from commit 20e2cf7d2509dfc4708f4a3720aee26852998f13)
Reviewed-on: https://git-master.nvidia.com/r/1992080
Reviewed-by: Dmitry Antipov <dantipov@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'include/linux/tegra_profiler.h')
| -rw-r--r-- | include/linux/tegra_profiler.h | 64 |
1 files changed, 37 insertions, 27 deletions
diff --git a/include/linux/tegra_profiler.h b/include/linux/tegra_profiler.h index 08f898abe..97495c60c 100644 --- a/include/linux/tegra_profiler.h +++ b/include/linux/tegra_profiler.h | |||
| @@ -19,8 +19,8 @@ | |||
| 19 | 19 | ||
| 20 | #include <linux/ioctl.h> | 20 | #include <linux/ioctl.h> |
| 21 | 21 | ||
| 22 | #define QUADD_SAMPLES_VERSION 44 | 22 | #define QUADD_SAMPLES_VERSION 45 |
| 23 | #define QUADD_IO_VERSION 25 | 23 | #define QUADD_IO_VERSION 26 |
| 24 | 24 | ||
| 25 | #define QUADD_IO_VERSION_DYNAMIC_RB 5 | 25 | #define QUADD_IO_VERSION_DYNAMIC_RB 5 |
| 26 | #define QUADD_IO_VERSION_RB_MAX_FILL_COUNT 6 | 26 | #define QUADD_IO_VERSION_RB_MAX_FILL_COUNT 6 |
| @@ -43,6 +43,7 @@ | |||
| 43 | #define QUADD_IO_VERSION_SAMPLING_MODE 23 | 43 | #define QUADD_IO_VERSION_SAMPLING_MODE 23 |
| 44 | #define QUADD_IO_VERSION_FORCE_ARCH_TIMER 24 | 44 | #define QUADD_IO_VERSION_FORCE_ARCH_TIMER 24 |
| 45 | #define QUADD_IO_VERSION_SAMPLE_ALL_TASKS 25 | 45 | #define QUADD_IO_VERSION_SAMPLE_ALL_TASKS 25 |
| 46 | #define QUADD_IO_VERSION_EXTABLES_PID 26 | ||
| 46 | 47 | ||
| 47 | #define QUADD_SAMPLE_VERSION_THUMB_MODE_FLAG 17 | 48 | #define QUADD_SAMPLE_VERSION_THUMB_MODE_FLAG 17 |
| 48 | #define QUADD_SAMPLE_VERSION_GROUP_SAMPLES 18 | 49 | #define QUADD_SAMPLE_VERSION_GROUP_SAMPLES 18 |
| @@ -70,6 +71,7 @@ | |||
| 70 | #define QUADD_SAMPLE_VERSION_SAMPLING_MODE 42 | 71 | #define QUADD_SAMPLE_VERSION_SAMPLING_MODE 42 |
| 71 | #define QUADD_SAMPLE_VERSION_SAMPLE_ALL_TASKS 43 | 72 | #define QUADD_SAMPLE_VERSION_SAMPLE_ALL_TASKS 43 |
| 72 | #define QUADD_SAMPLE_VERSION_KTHREAD_TSK_FLAG 44 | 73 | #define QUADD_SAMPLE_VERSION_KTHREAD_TSK_FLAG 44 |
| 74 | #define QUADD_SAMPLE_VERSION_MMAP_CPUID 45 | ||
| 73 | 75 | ||
| 74 | #define QUADD_MMAP_HEADER_VERSION 1 | 76 | #define QUADD_MMAP_HEADER_VERSION 1 |
| 75 | 77 | ||
| @@ -256,16 +258,20 @@ struct quadd_sample_data { | |||
| 256 | u32 events_flags; | 258 | u32 events_flags; |
| 257 | }; | 259 | }; |
| 258 | 260 | ||
| 259 | #define QUADD_MMAP_ED_IS_FILE_EXISTS (1 << 0) | 261 | #define QUADD_MMAP_FLAG_LP_MODE (1 << 0) |
| 262 | #define QUADD_MMAP_FLAG_USER_MODE (1 << 1) | ||
| 263 | #define QUADD_MMAP_FLAG_IS_FILE_EXISTS (1 << 2) | ||
| 260 | 264 | ||
| 261 | struct quadd_mmap_data { | 265 | struct quadd_mmap_data { |
| 262 | u32 pid; | 266 | u32 pid; |
| 263 | u64 time; | 267 | u64 time; |
| 264 | 268 | ||
| 269 | u8 cpu_id; | ||
| 270 | u16 flags; | ||
| 271 | |||
| 265 | u64 addr; | 272 | u64 addr; |
| 266 | u64 len; | 273 | u64 len; |
| 267 | 274 | ||
| 268 | u8 user_mode:1; | ||
| 269 | u16 filename_length; | 275 | u16 filename_length; |
| 270 | }; | 276 | }; |
| 271 | 277 | ||
| @@ -301,10 +307,10 @@ struct quadd_additional_sample { | |||
| 301 | u16 extra_length; | 307 | u16 extra_length; |
| 302 | }; | 308 | }; |
| 303 | 309 | ||
| 304 | #define QUADD_SCHED_FLAG_LP_MODE (1 << 0) | 310 | #define QUADD_SCHED_FLAG_LP_MODE (1ULL << 0) |
| 305 | #define QUADD_SCHED_FLAG_SCHED_IN (1 << 1) | 311 | #define QUADD_SCHED_FLAG_SCHED_IN (1ULL << 1) |
| 306 | #define QUADD_SCHED_FLAG_IS_VPID (1 << 2) | 312 | #define QUADD_SCHED_FLAG_IS_VPID (1ULL << 2) |
| 307 | #define QUADD_SCHED_FLAG_PF_KTHREAD (1 << 3) | 313 | #define QUADD_SCHED_FLAG_PF_KTHREAD (1ULL << 3) |
| 308 | 314 | ||
| 309 | struct quadd_sched_data { | 315 | struct quadd_sched_data { |
| 310 | u32 pid; | 316 | u32 pid; |
| @@ -349,24 +355,24 @@ struct quadd_debug_data { | |||
| 349 | 355 | ||
| 350 | #define QUADD_HEADER_MAGIC 0x1122 | 356 | #define QUADD_HEADER_MAGIC 0x1122 |
| 351 | 357 | ||
| 352 | #define QUADD_HDR_FLAG_BACKTRACE (1 << 0) | 358 | #define QUADD_HDR_FLAG_BACKTRACE (1ULL << 0) |
| 353 | #define QUADD_HDR_FLAG_USE_FREQ (1 << 1) | 359 | #define QUADD_HDR_FLAG_USE_FREQ (1ULL << 1) |
| 354 | #define QUADD_HDR_FLAG_POWER_RATE (1 << 2) | 360 | #define QUADD_HDR_FLAG_POWER_RATE (1ULL << 2) |
| 355 | #define QUADD_HDR_FLAG_DEBUG_SAMPLES (1 << 3) | 361 | #define QUADD_HDR_FLAG_DEBUG_SAMPLES (1ULL << 3) |
| 356 | #define QUADD_HDR_FLAG_GET_MMAP (1 << 4) | 362 | #define QUADD_HDR_FLAG_GET_MMAP (1ULL << 4) |
| 357 | #define QUADD_HDR_FLAG_BT_FP (1 << 5) | 363 | #define QUADD_HDR_FLAG_BT_FP (1ULL << 5) |
| 358 | #define QUADD_HDR_FLAG_BT_UT (1 << 6) | 364 | #define QUADD_HDR_FLAG_BT_UT (1ULL << 6) |
| 359 | #define QUADD_HDR_FLAG_BT_UT_CE (1 << 7) | 365 | #define QUADD_HDR_FLAG_BT_UT_CE (1ULL << 7) |
| 360 | #define QUADD_HDR_FLAG_BT_DWARF (1 << 8) | 366 | #define QUADD_HDR_FLAG_BT_DWARF (1ULL << 8) |
| 361 | #define QUADD_HDR_FLAG_USE_ARCH_TIMER (1 << 9) | 367 | #define QUADD_HDR_FLAG_USE_ARCH_TIMER (1ULL << 9) |
| 362 | #define QUADD_HDR_FLAG_STACK_OFFSET (1 << 10) | 368 | #define QUADD_HDR_FLAG_STACK_OFFSET (1ULL << 10) |
| 363 | #define QUADD_HDR_FLAG_HAS_CPUID (1 << 11) | 369 | #define QUADD_HDR_FLAG_HAS_CPUID (1ULL << 11) |
| 364 | #define QUADD_HDR_FLAG_MODE_SAMPLING (1 << 12) | 370 | #define QUADD_HDR_FLAG_MODE_SAMPLING (1ULL << 12) |
| 365 | #define QUADD_HDR_FLAG_MODE_TRACING (1 << 13) | 371 | #define QUADD_HDR_FLAG_MODE_TRACING (1ULL << 13) |
| 366 | #define QUADD_HDR_FLAG_MODE_SAMPLE_ALL (1 << 14) | 372 | #define QUADD_HDR_FLAG_MODE_SAMPLE_ALL (1ULL << 14) |
| 367 | #define QUADD_HDR_FLAG_MODE_TRACE_ALL (1 << 15) | 373 | #define QUADD_HDR_FLAG_MODE_TRACE_ALL (1ULL << 15) |
| 368 | #define QUADD_HDR_FLAG_MODE_SAMPLE_TREE (1 << 16) | 374 | #define QUADD_HDR_FLAG_MODE_SAMPLE_TREE (1ULL << 16) |
| 369 | #define QUADD_HDR_FLAG_MODE_TRACE_TREE (1 << 17) | 375 | #define QUADD_HDR_FLAG_MODE_TRACE_TREE (1ULL << 17) |
| 370 | 376 | ||
| 371 | struct quadd_header_data { | 377 | struct quadd_header_data { |
| 372 | u16 magic; | 378 | u16 magic; |
| @@ -578,6 +584,8 @@ struct quadd_sec_info { | |||
| 578 | u64 mmap_offset; | 584 | u64 mmap_offset; |
| 579 | }; | 585 | }; |
| 580 | 586 | ||
| 587 | #define QUADD_SECTIONS_FLAG_IS_SHARED (1ULL << 0) | ||
| 588 | |||
| 581 | struct quadd_sections { | 589 | struct quadd_sections { |
| 582 | u64 vm_start; | 590 | u64 vm_start; |
| 583 | u64 vm_end; | 591 | u64 vm_end; |
| @@ -585,8 +593,10 @@ struct quadd_sections { | |||
| 585 | struct quadd_sec_info sec[QUADD_SEC_TYPE_MAX]; | 593 | struct quadd_sec_info sec[QUADD_SEC_TYPE_MAX]; |
| 586 | 594 | ||
| 587 | u64 user_mmap_start; | 595 | u64 user_mmap_start; |
| 596 | u32 file_hash; | ||
| 588 | 597 | ||
| 589 | u64 reserved[4]; /* reserved fields for future extensions */ | 598 | u32 pid; |
| 599 | u64 flags; | ||
| 590 | }; | 600 | }; |
| 591 | 601 | ||
| 592 | struct quadd_mmap_rb_info { | 602 | struct quadd_mmap_rb_info { |
