diff options
| author | Rohit Khanna <rokhanna@nvidia.com> | 2016-09-13 16:27:10 -0400 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2016-09-22 14:36:49 -0400 |
| commit | b4dfd8bbd24ebef4229683feff0dfb077ab45440 (patch) | |
| tree | 62e10f8d94f839f227027ec41e9839447f0836d6 /include/linux/platform | |
| parent | 37c96c9a966848b4d4fc4f43c7a1ed84932b16de (diff) | |
arm64: platform: tegra: support for Denver MCA
This patch :
- defines MCA_ARI_SERR_IDX_OFF
which is used to caculate the ARI index which is
required to read another Denver's core MCAs banks.
- adds macro for converting logical cpu number to
phycial cpu number
Change-Id: I13f27c5a8094c397f6b7a8095ec8d1451c596947
Signed-off-by: Rohit Khanna <rokhanna@nvidia.com>
Reviewed-on: http://git-master/r/1220279
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Diffstat (limited to 'include/linux/platform')
| -rw-r--r-- | include/linux/platform/tegra/ari_mca.h | 2 | ||||
| -rw-r--r-- | include/linux/platform/tegra/tegra18_cpu_map.h | 6 |
2 files changed, 8 insertions, 0 deletions
diff --git a/include/linux/platform/tegra/ari_mca.h b/include/linux/platform/tegra/ari_mca.h index a707d2cb6..b070ad5f4 100644 --- a/include/linux/platform/tegra/ari_mca.h +++ b/include/linux/platform/tegra/ari_mca.h | |||
| @@ -61,6 +61,8 @@ enum { | |||
| 61 | MCA_ARI_CMD_RD_PREBOOT_SERR = 0x08, | 61 | MCA_ARI_CMD_RD_PREBOOT_SERR = 0x08, |
| 62 | }; | 62 | }; |
| 63 | 63 | ||
| 64 | #define MCA_ARI_SERR_IDX_OFF 6 | ||
| 65 | |||
| 64 | enum { | 66 | enum { |
| 65 | MCA_ARI_IDX_ASERR0 = 0x00, | 67 | MCA_ARI_IDX_ASERR0 = 0x00, |
| 66 | MCA_ARI_IDX_ASERR1 = 0x01, | 68 | MCA_ARI_IDX_ASERR1 = 0x01, |
diff --git a/include/linux/platform/tegra/tegra18_cpu_map.h b/include/linux/platform/tegra/tegra18_cpu_map.h index 9b79700e1..826498c20 100644 --- a/include/linux/platform/tegra/tegra18_cpu_map.h +++ b/include/linux/platform/tegra/tegra18_cpu_map.h | |||
| @@ -20,3 +20,9 @@ static inline int tegra18_is_cpu_arm(u8 cpu) | |||
| 20 | { | 20 | { |
| 21 | return tegra18_logical_to_cluster(cpu) == 1; | 21 | return tegra18_logical_to_cluster(cpu) == 1; |
| 22 | } | 22 | } |
| 23 | |||
| 24 | static inline int tegra18_logical_to_physical_cpu(u8 cpu) | ||
| 25 | { | ||
| 26 | return (tegra18_logical_to_cluster(cpu) << 2) + | ||
| 27 | tegra18_logical_to_cpu(cpu); | ||
| 28 | } | ||
