diff options
| author | Allen Yu <alleny@nvidia.com> | 2015-09-11 13:06:20 -0400 |
|---|---|---|
| committer | Alex Van Brunt <avanbrunt@nvidia.com> | 2015-10-02 19:21:36 -0400 |
| commit | a2bc4e88b723c36d4d8ff16311b9b94d9a60f5e2 (patch) | |
| tree | dfab4dbc79f32a4b40eab68265546c02e1c2969d /include/linux/platform | |
| parent | 01f429cf99b46929ccdd3c45a8069f0b1aefda3e (diff) | |
watchdog: t18x: refactor WDT affinity and on/off
1. Use cluster ID instead of CPU ID for WDT instances since CPU index can
vary depending on the configuration. Essentially, each WDT instance is
responsible for the associated cluster.
2. Bind WDT IRQ and WDT enablement to the first CPU of associated cluster.
The CPU is representive of cluster health and responsible for WDT petting.
3. Remove the cpu notifier. To be safe, WDTs should always be active to detect
any system lockup condition, irrespective of cpu/cluster power states. Deep
sleep is an exception since WDT/timer blocks are powered off in this state.
Bug 1617276
Change-Id: I9d1b2d8dedb62f9cb9d07d70801c8e51e46a66c1
Signed-off-by: Allen Yu <alleny@nvidia.com>
Reviewed-on: http://git-master/r/796054
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Diffstat (limited to 'include/linux/platform')
| -rw-r--r-- | include/linux/platform/tegra/tegra18_cpu_map.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/platform/tegra/tegra18_cpu_map.h b/include/linux/platform/tegra/tegra18_cpu_map.h index ee6924483..9b79700e1 100644 --- a/include/linux/platform/tegra/tegra18_cpu_map.h +++ b/include/linux/platform/tegra/tegra18_cpu_map.h | |||
| @@ -1,6 +1,7 @@ | |||
| 1 | #include <linux/types.h> | 1 | #include <linux/types.h> |
| 2 | #include <asm/cputype.h> | 2 | #include <asm/cputype.h> |
| 3 | #include <asm/cpu.h> | 3 | #include <asm/cpu.h> |
| 4 | #include <asm/smp_plat.h> | ||
| 4 | 5 | ||
| 5 | static inline u8 tegra18_logical_to_cluster(u8 cpu) { | 6 | static inline u8 tegra18_logical_to_cluster(u8 cpu) { |
| 6 | return MPIDR_AFFINITY_LEVEL(cpu_logical_map(cpu), 1); | 7 | return MPIDR_AFFINITY_LEVEL(cpu_logical_map(cpu), 1); |