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authorPekka Pessi <ppessi@nvidia.com>2018-08-20 13:25:22 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-09-12 20:47:24 -0400
commita16f79eeff8f61dccc679dd84a0ecb1f138c506e (patch)
treeabca699a8e25f576a258c51c17b43cb11eb17399 /include/linux/platform
parentc100fa4ba34599cde78e770785a6c8949a14b34b (diff)
tegra: camera: rtcpu: fix boot timeouts
The t186-sce boot time sometimes exceeds 2000 milliseconds. The undue boot time is because the memory bandwidth problems. During the boot the DRAM image is read twice (once when copying, once when calculating SHA1). Calculate time from deasserting resets to the first mailbox handshake with camrtc. Add a dedicated bandwidth manager client for camrtc. Request for extra memory bandwidth during boot time. Retry camrtc boot if it fails. Report failed boot handshake correctly to the platform, avoid corruption. Bug 2305627 Change-Id: Ia96e369ee1b09d6298268f7bd309db1c8f326564 Signed-off-by: Pekka Pessi <ppessi@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1803895 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Semi Malinen <smalinen@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'include/linux/platform')
-rw-r--r--include/linux/platform/tegra/emc_bwmgr.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/platform/tegra/emc_bwmgr.h b/include/linux/platform/tegra/emc_bwmgr.h
index 64d6f6f89..cbc79b03b 100644
--- a/include/linux/platform/tegra/emc_bwmgr.h
+++ b/include/linux/platform/tegra/emc_bwmgr.h
@@ -50,6 +50,7 @@ enum tegra_bwmgr_client_id {
50 TEGRA_BWMGR_CLIENT_ISPB, 50 TEGRA_BWMGR_CLIENT_ISPB,
51 TEGRA_BWMGR_CLIENT_CAMERA, 51 TEGRA_BWMGR_CLIENT_CAMERA,
52 TEGRA_BWMGR_CLIENT_CAMERA_NON_ISO, 52 TEGRA_BWMGR_CLIENT_CAMERA_NON_ISO,
53 TEGRA_BWMGR_CLIENT_CAMRTC,
53 TEGRA_BWMGR_CLIENT_ISOMGR, 54 TEGRA_BWMGR_CLIENT_ISOMGR,
54 TEGRA_BWMGR_CLIENT_THERMAL_CAP, 55 TEGRA_BWMGR_CLIENT_THERMAL_CAP,
55 TEGRA_BWMGR_CLIENT_VIC, 56 TEGRA_BWMGR_CLIENT_VIC,