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authorTejal Kudav <tkudav@nvidia.com>2016-08-19 19:20:30 -0400
committerTejal Kudav <tkudav@nvidia.com>2016-08-29 15:10:54 -0400
commit558245391bc7aebb2cc5244b31a7de46f5574ecc (patch)
tree7cfdfcf84289cf77ec8d813f8a0bd83731f1f7ea /include/linux/platform
parent7719822d9d64c914add12cddfce1a95f188a4a58 (diff)
bmwgr: t186: Add API for EMC to DRAM conversion factor
Based on DRAM type, we decide the ratio between dram and memory controller frequency. For LP4: EMC Freq MHz = 0.5 * DRAM Freq MHz For LP3/DDR3: EMC Freq MHz = DRAM Freq MHz Bug 1801042 Bug 1764786 Change-Id: Icc8468f9debdc67029a112a49d91fb94883e6440 Signed-off-by: Tejal Kudav <tkudav@nvidia.com> Reviewed-on: http://git-master/r/1205361 Reviewed-by: Krishna Sitaraman <ksitaraman@nvidia.com> Reviewed-by: Ayoosh Bansal <ayooshb@nvidia.com> Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com> GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'include/linux/platform')
-rw-r--r--include/linux/platform/tegra/bwmgr_mc.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/platform/tegra/bwmgr_mc.h b/include/linux/platform/tegra/bwmgr_mc.h
index 35f641f22..e6b81a7f0 100644
--- a/include/linux/platform/tegra/bwmgr_mc.h
+++ b/include/linux/platform/tegra/bwmgr_mc.h
@@ -28,5 +28,5 @@ unsigned long bwmgr_bw_to_freq(unsigned long bw);
28 28
29u32 bwmgr_dvfs_latency(u32 ufreq); 29u32 bwmgr_dvfs_latency(u32 ufreq);
30int bwmgr_iso_bw_percentage_max(void); 30int bwmgr_iso_bw_percentage_max(void);
31 31int bwmgr_get_emc_to_dram_freq_factor(void);
32#endif /* __BWMGR_MC_H */ 32#endif /* __BWMGR_MC_H */