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authorTejal Kudav <tkudav@nvidia.com>2017-12-21 06:10:24 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2018-01-19 22:49:01 -0500
commit544501bc7618d42408b036e5eef5aad55f36f5ae (patch)
treec3fd6e2cb2a840e7ef5c1a6d9b14676ffe28c60f /include/linux/platform
parent0c54e2afbd06aec00b57773686bb288195249d24 (diff)
nvlink: Add nvlink_enumerate to bringup nvlink
The master device in nvlink topology will call nvlink_enumerate to initialize both the endpoint devices and transition the link to safe and eventually to High speed. Nvlink_enumerate will co-ordinate the state transitions between the two endpoints and get the link ready for data transfer over high speed. The callbacks registered by master and slave for device and link level initialization will be called sequentially. init_state is maintained to allow us to call nvlink_enumerate multiple times. Based on the init state and the link mode, only necessary steps will be executed. Move the interface definitions to /include. Some APIs and struct definition need to exposed to dGPU or other endpoint driver. These represent the interface between the core nvlink driver and the endpoint drivers. As nvlink driver is tegra specific, we move the file to /include/linux/platform/tegra folder. JIRA NVLINK-66 JIRA NVLINK-67 JIRA NVLINK-70 JIRA NVLINK-73 JIRA NVLINK-79 JIRA NVLINK-103 JIRA NVLINK-110 JIRA NVLINK-114 Change-Id: I7907825e4344833344ad6aaa6f2017b58b258649 Signed-off-by: Tejal Kudav <tkudav@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1640795 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Adeel Raza <araza@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'include/linux/platform')
-rw-r--r--include/linux/platform/tegra/tegra-nvlink.h421
1 files changed, 421 insertions, 0 deletions
diff --git a/include/linux/platform/tegra/tegra-nvlink.h b/include/linux/platform/tegra/tegra-nvlink.h
new file mode 100644
index 000000000..3d802f9a5
--- /dev/null
+++ b/include/linux/platform/tegra/tegra-nvlink.h
@@ -0,0 +1,421 @@
1/*
2 * tegra-nvlink.h:
3 * This header contains the structures and APIs needed by Tegra NVLINK core and
4 * endpoint drivers for interacting with each other.
5 *
6 * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21#ifndef TEGRA_NVLINK_H
22#define TEGRA_NVLINK_H
23
24#include <linux/device.h>
25#include <linux/cdev.h>
26
27#define NVLINK_MAX_DEVICES 2
28#define NVLINK_MAX_LINKS 2
29
30struct nvlink_link;
31struct nvlink_device;
32
33enum nvlink_log_categories {
34 nvlink_log_err = BIT(0), /* Error prints - these will be printed
35 unconditionally */
36 nvlink_log_dbg = BIT(1), /* Debug prints */
37};
38
39#ifdef CONFIG_DEBUG_FS
40/* This is the root debugfs directory for the entire NVLINK driver stack */
41extern struct dentry *nvlink_debugfs;
42#endif /* CONFIG_DEBUG_FS */
43
44extern u32 nvlink_log_mask;
45#define NVLINK_DEFAULT_LOG_MASK nvlink_log_err
46
47#define nvlink_print(log_mask, fmt, arg...) \
48 do { \
49 if ((log_mask) & nvlink_log_mask) \
50 printk("%s: %s: %d: " fmt "\n", \
51 NVLINK_DRV_NAME, \
52 __func__, \
53 __LINE__, \
54 ##arg); \
55 } while (0)
56
57#define nvlink_err(fmt, arg...) nvlink_print(nvlink_log_err, fmt, ##arg)
58#define nvlink_dbg(fmt, arg...) nvlink_print(nvlink_log_dbg, fmt, ##arg)
59
60/* Enum nvlink_endpt will be used to initialize device ID in device struct */
61enum nvlink_endpt {
62 NVLINK_ENDPT_T19X,
63 NVLINK_ENDPT_GV100
64};
65
66/*
67 * Link modes are SW defined. Some modes map to HW link state, while some
68 * falicitate transiting to a power state or off state.
69 */
70enum link_mode {
71 NVLINK_LINK_OFF,
72 NVLINK_LINK_HS,
73 NVLINK_LINK_SAFE,
74 NVLINK_LINK_FAULT,
75 NVLINK_LINK_RECOVERY,
76 NVLINK_LINK_DETECT,
77 NVLINK_LINK_RESET,
78 NVLINK_LINK_ENABLE_PM,
79 NVLINK_LINK_DISABLE_PM,
80 NVLINK_LINK_DISABLE_ERR_DETECT,
81 NVLINK_LINK_LANE_DISABLE,
82 NVLINK_LINK_LANE_SHUTDOWN
83};
84
85/*
86 * TX_mode and RX_mode contains SW defined sublink modes. Some modes map to HW
87 * sublink states while some are intermediate states needed for link training
88 * and other sequences.
89 */
90enum tx_mode {
91 NVLINK_TX_HS,
92 NVLINK_TX_ENABLE_PM,
93 NVLINK_TX_DISABLE_PM,
94 NVLINK_TX_SINGLE_LANE,
95 NVLINK_TX_SAFE,
96 NVLINK_TX_OFF,
97 NVLINK_TX_COMMON,
98 NVLINK_TX_COMMON_DISABLE,
99 NVLINK_TX_DATA_READY,
100 NVLINK_TX_PRBS_EN,
101};
102
103enum rx_mode {
104 NVLINK_RX_HS,
105 NVLINK_RX_ENABLE_PM,
106 NVLINK_RX_DISABLE_PM,
107 NVLINK_RX_SINGLE_LANE,
108 NVLINK_RX_SAFE,
109 NVLINK_RX_OFF,
110 NVLINK_RX_RXCAL,
111};
112
113/* Enum to represent link speed. Nvlink 2.0 can support below 2 speeds */
114enum nvlink_speed {
115 NVLINK_SPEED_20,
116 NVLINK_SPEED_25
117};
118
119enum nvlink_refclk {
120 NVLINK_REFCLK_150,
121 NVLINK_REFCLK_156
122};
123
124/*
125 * During nvlink device initialization, we use enum init_state to keep track of
126 * what state we have reached. Based on the init state and the link mode, only
127 * necessary steps will be executed. This allows us to call enumerate function
128 * multiple times.
129 *
130 * NVLINK_DEV_OFF : The device is off and no part of nvlink controller hardware
131 * is out of reset and clocked.
132 *
133 * NVLINK_DEV_EARLY_INIT_DONE: The clocks are up, all resets deasserted, the
134 * minion has booted and device level interrupts are initialized.
135 *
136 * NVLINK_LINK_EARLY_INIT_DONE: The link level initialization is done like -
137 * initialization of PHY, link interrupts and TLC buffers.
138 *
139 * NVLINK_DEV_INTERFACE_INIT_DONE: The memory interface is initialized.
140 *
141 * NVLINK_REG_INIT_DONE: The prod settings are incorporated. At this point
142 * the link is ready to transition to safe mode and eventually to
143 * High-Speed mode.
144 */
145enum init_state {
146 NVLINK_DEV_OFF,
147 NVLINK_DEV_EARLY_INIT_DONE,
148 NVLINK_LINK_EARLY_INIT_DONE,
149 NVLINK_DEV_INTERFACE_INIT_DONE,
150 NVLINK_DEV_REG_INIT_DONE,
151 NVLINK_INIT_STATE_INVALID
152};
153
154/*
155 * These callbacks should be registered with core-driver during link
156 * registration. These link_ops allow core-driver to enquire/set link and
157 * sublink modes. Some help during link initializatiion.
158 *
159 * TODO: Pass struct nvlink_link as argument to below link_ops instead of using
160 * struct nvlink_device. All the link level readl/writel functions need to
161 * use link struct instead of device struct for above change.
162 */
163struct link_operations {
164 u32 (*get_link_mode)(struct nvlink_device *ndev);
165 int (*set_link_mode)(struct nvlink_device *ndev, u32 mode);
166 u32 (*get_sublink_mode)(struct nvlink_device *ndev, bool is_rx_sublink);
167 int (*set_sublink_mode)(struct nvlink_device *ndev, bool is_rx_sublink,
168 u32 mode);
169 u32 (*get_link_state)(struct nvlink_device *ndev);
170 void (*get_tx_sublink_state)(struct nvlink_device *ndev,
171 u32 *tx_sublink_state);
172 void (*get_rx_sublink_state)(struct nvlink_device *ndev,
173 u32 *rx_sublink_state);
174 int (*link_early_init)(struct nvlink_device *ndev);
175 int (*link_interface_init)(struct nvlink_device *ndev);
176};
177
178/* These dev_ops expose interface between the core driver and endpoint device */
179struct device_operations {
180 int (*dev_early_init)(struct nvlink_device *ndev);
181 int (*dev_interface_init)(struct nvlink_device *ndev);
182 int (*dev_reg_init)(struct nvlink_device *ndev);
183 int (*dev_shutdown)(struct nvlink_device *ndev);
184};
185
186/*
187 * The core-driver maintains the topology information. The endpoint can also
188 * keep a record of same in remote_device_info struct. Note: We do not save
189 * pointers to remote device and link.
190 */
191struct remote_device_info {
192 /* Device id of remote device connected */
193 enum nvlink_endpt device_id;
194 /* Link id of the remote link connected */
195 u32 link_id;
196};
197
198/*
199 * This structure is used for storing parameters which describe the Single-Lane
200 * (SL / 1/8th) mode policy. A few acronyms that are used in this structure are
201 * as follows:
202 * - SL = Single-Lane / 1/8th mode - sublink low power mode where only 1 of
203 * the 8 lanes is used
204 * - FB = Full Bandwidth (i.e. HISPEED mode)
205 * - LP = Low Power (i.e. SL / 1/8th mode)
206 * - IC = Idle Counter - the idle counter is used to monitor traffic per
207 * sub-link
208 */
209struct single_lane_params {
210 /* Is Single-Lane (SL) mode enabled? */
211 bool enabled;
212
213 /* Idle counter increment in FB */
214 u16 fb_ic_inc;
215
216 /* Idle counter increment in LP */
217 u16 lp_ic_inc;
218
219 /* Idle counter decrement in FB */
220 u16 fb_ic_dec;
221
222 /* Idle counter decrement in LP */
223 u16 lp_ic_dec;
224
225 /* SL entry threshold */
226 u32 enter_thresh;
227
228 /* SL exit threshold */
229 u32 exit_thresh;
230
231 /* Idle counter saturation limit */
232 u32 ic_limit;
233};
234
235/* nvlink_link struct stores all link specific data. */
236struct nvlink_link {
237 /*
238 * The link id is unique across the entire nvlink system. Same link_id
239 * should not be used in different device structs. This is a HACK we
240 * need while we hardcode the topology in device tree.
241 * TODO: Add an enum for link_id like we have for device_id.
242 */
243 u32 link_id;
244 /* ID of the device that this link belongs to */
245 enum nvlink_endpt device_id;
246 /* link mode TODO: Add locks to protect the link_mode changes */
247 enum link_mode mode;
248 /* base address of DLPL */
249 void __iomem *nvlw_nvl_base;
250 /* base address of TL */
251 void __iomem *nvlw_nvltlc_base;
252 /* bit index of enable bit within nvlink enable_register */
253 u8 intr_bit_idx;
254 /* bit index of reset bit within nvlink reset_register */
255 u8 reset_bit_idx;
256 /*
257 * is the link connected to an endpt. Useful for devices with multiple
258 * links. Currenly unused on Tegra.
259 * TODO: Set this before registering the link
260 */
261 bool is_connected;
262 /* Pointer to device info of connected end point */
263 struct remote_device_info remote_dev_info;
264 /*
265 * Pointer to struct containing callback functions to do link specific
266 * operation from core driver
267 */
268 struct link_operations link_ops;
269 /* Pointer to implementations specific private data */
270 void *priv;
271 /* TLC errors status. TODO: Add more description here */
272 u32 tlc_tx_err_status0;
273 u32 tlc_rx_err_status0;
274 u32 tlc_rx_err_status1;
275 /* Successful error recoveries */
276 u32 error_recoveries;
277 /* Parameters which describe the selected Single-Lane policy */
278 struct single_lane_params sl_params;
279};
280
281/* Structure representing the MINION ucode header */
282struct minion_hdr {
283 u32 os_code_offset;
284 u32 os_code_size;
285 u32 os_data_offset;
286 u32 os_data_size;
287 u32 num_apps;
288 u32 *app_code_offsets;
289 u32 *app_code_sizes;
290 u32 *app_data_offsets;
291 u32 *app_data_sizes;
292 u32 ovl_offset;
293 u32 ovl_size;
294 u32 ucode_img_size;
295};
296
297/* nvlink_device struct stores all device specific data. */
298struct nvlink_device {
299 /* device_id */
300 enum nvlink_endpt device_id;
301 /* init state */
302 enum init_state init_state;
303 /* Mutex to protect init_state access */
304 struct mutex init_state_mutex;
305 /*
306 * Only the master device can initiate enumeration and data transfer
307 * on nvlink. bool to check this device is master.
308 */
309 bool is_master;
310 /* base address of NVLIPT */
311 void __iomem *nvlw_nvlipt_base;
312 /* base address of minion */
313 void __iomem *nvlw_minion_base;
314 /* base address of IOCTRL */
315 void __iomem *nvlw_tioctrl_base;
316 /* TODO: Add more information here */
317 int irq;
318 struct class class;
319 dev_t dev_t;
320 struct cdev cdev;
321 struct device *dev;
322 /*nvlink link data. We assume there is single link per device*/
323 struct nvlink_link link;
324 /* Pointer to struct containing callback functions to do device specific
325 * operation from core driver
326 */
327 struct device_operations dev_ops;
328 /* pointer to private data of this device */
329 /* MINION FW - contains both the ucode header and image */
330 const struct firmware *minion_fw;
331 /* MINION ucode header */
332 struct minion_hdr minion_hdr;
333 /* MINION ucode image */
334 const u8 *minion_img;
335 void *priv;
336 /* Nvlink Speed */
337 enum nvlink_speed speed;
338 /* Nvlink refclk*/
339 enum nvlink_refclk refclk;
340};
341
342/* Struct used for passing around error masks in error handling functions */
343struct nvlink_link_error_masks {
344 u32 dl;
345 u32 tl;
346 u32 tl_injected;
347 u32 tlc_rx0;
348 u32 tlc_rx0_injected;
349 u32 tlc_rx1;
350 u32 tlc_rx1_injected;
351 u32 tlc_tx;
352 u32 tlc_tx_injected;
353};
354
355/* Fatal Errors */
356enum inforom_nvlink_fatal_err {
357 /* NVLink 2.0 */
358 TLC_RX_DL_DATA_PARITY,
359 TLC_RX_DL_CTRL_PARITY,
360 TLC_RX_RAM_DATA_PARITY,
361 TLC_RX_RAM_HDR_PARITY,
362 TLC_RX_DATA_POISONED_PKT_RCVD,
363 TLC_TX_RAM_DATA_PARITY,
364 TLC_TX_RAM_HDR_PARITY,
365 TLC_TX_DL_FLOW_CONTROL_PARITY,
366 DL_TX_RECOVERY_LONG,
367 DL_TX_FAULT_RAM,
368 DL_TX_FAULT_INTERFACE,
369 DL_TX_FAULT_SUBLINK_CHANGE,
370 DL_RX_FAULT_SUBLINK_CHANGE,
371 DL_RX_FAULT_DL_PROTOCOL,
372 DL_LTSSM_FAULT,
373 TLC_RX_DL_HDR_PARITY,
374 TLC_RX_INVALID_AE_FLIT_RCVD,
375 TLC_RX_INVALID_BE_FLIT_RCVD,
376 TLC_RX_INVALID_ADDR_ALIGN,
377 TLC_RX_PKT_LEN,
378 TLC_RX_RSVD_CMD_ENC,
379 TLC_RX_RSVD_DAT_LEN_ENC,
380 TLC_RX_RSVD_ADDR_TYPE,
381 TLC_RX_RSVD_RSP_STATUS,
382 TLC_RX_RSVD_PKT_STATUS,
383 TLC_RX_RSVD_CACHE_ATTR_ENC_IN_PROBE_REQ,
384 TLC_RX_RSVD_CACHE_ATTR_ENC_IN_PROBE_RESP,
385 TLC_RX_DAT_LEN_GT_ATOMIC_REQ_MAX_SIZE,
386 TLC_RX_DAT_LEN_GT_RMW_REQ_MAX_SIZE,
387 TLC_RX_DAT_LEN_LT_ATR_RESP_MIN_SIZE,
388 TLC_RX_INVALID_PO_FOR_CACHE_ATTR,
389 TLC_RX_INVALID_COMPRESSED_RESP,
390 TLC_RX_RESP_STATUS_TARGET,
391 TLC_RX_RESP_STATUS_UNSUPPORTED_REQUEST,
392 TLC_RX_HDR_OVERFLOW,
393 TLC_RX_DATA_OVERFLOW,
394 TLC_RX_STOMPED_PKT_RCVD,
395 TLC_RX_CORRECTABLE_INTERNAL,
396 TLC_RX_UNSUPPORTED_VC_OVERFLOW,
397 TLC_RX_UNSUPPORTED_NVLINK_CREDIT_RELEASE,
398 TLC_RX_UNSUPPORTED_NCISOC_CREDIT_RELEASE,
399 TLC_TX_HDR_CREDIT_OVERFLOW,
400 TLC_TX_DATA_CREDIT_OVERFLOW,
401 TLC_TX_DL_REPLAY_CREDIT_OVERFLOW,
402 TLC_TX_UNSUPPORTED_VC_OVERFLOW,
403 TLC_TX_STOMPED_PKT_SENT,
404 TLC_TX_DATA_POISONED_PKT_SENT,
405 TLC_TX_RESP_STATUS_TARGET,
406 TLC_TX_RESP_STATUS_UNSUPPORTED_REQUEST,
407};
408
409/* APIs used by endpoint drivers for interfacing with the core driver */
410void nvlink_print_topology(void);
411int nvlink_register_device(struct nvlink_device* device);
412int nvlink_register_link(struct nvlink_link* link);
413int nvlink_unregister_device(struct nvlink_device* device);
414int nvlink_unregister_link(struct nvlink_link* link);
415int nvlink_get_init_state(struct nvlink_device *ndev, enum init_state *state);
416int nvlink_set_init_state(struct nvlink_device *ndev, enum init_state state);
417int nvlink_enumerate(struct nvlink_device *ndev);
418int nvlink_transition_intranode_conn_off_to_safe(struct nvlink_device *ndev);
419int nvlink_train_intranode_conn_safe_to_hs(struct nvlink_device *ndev);
420int nvlink_transition_intranode_conn_hs_to_safe(struct nvlink_device *ndev);
421#endif /* TEGRA_NVLINK_H */