t19x: cpuidle: c6 exit latency measurement

Add support to measure C6 exit latency. This patch implements some
of the helper functions required for this functionality.
Measurement technique
1. Force cores 1 to 7 to enter C6 state.
2. Send an IPI from core 0 to wake all other cores
3. Measure exit latency based on trace printks
4. Check C6 entry count before and after "wfi" to make sure C6 was
   entered.
   
JIRA: TPM-1217

Change-Id: I1d9943b09cf880631ad17f915bbf84959b899d2f
Signed-off-by: Sanjay Chandrashekara <sanjayc@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1757458
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 8 insertions, 0 deletions

diff --git a/include/linux/platform/tegra/t19x-cpuidle.h b/include/linux/platform/tegra/t19x-cpuidle.h
new file mode 100644
index 000000000..5c9275d78
--- /dev/null
+++ b/include/linux/platform/tegra/t19x-cpuidle.h
@@ -0,0 +1,8 @@
+#ifndef __T19x_CPUIDLE_C6_LATENCY__
+#define __T19x_CPUIDLE_C6_LATENCY__
+
+void force_idle_c6(u64 delay);
+int read_cpu_counter(void);
+void clear_cpu_counter(void);
+#endif
+