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authorPavan Kunapuli <pkunapuli@nvidia.com>2016-07-18 04:59:32 -0400
committerPavan Kunapuli <pkunapuli@nvidia.com>2016-07-22 03:00:50 -0400
commit504741b53991643b5550b206d089901716f8275c (patch)
tree76dd1a273249e5132e4004cc70ecd14ad909bb4d /drivers/video/tegra/dc
parent7bffc7f6e35dded3d2d8bbe69ae0e1e3d663572a (diff)
video: tegra: dc: When DSI is disabled, set PAD_PDVREG in MIPI_BIAS_PAD_CFG2
As per recommendation from HW team, when DSI is disabled, power down voltage regulator in MIPI bias pad configuration register 2. Bug 200149284 Change-Id: I026c72010972e33e8adc71207c2891ed5daf92df Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/1182695 Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Diffstat (limited to 'drivers/video/tegra/dc')
-rw-r--r--drivers/video/tegra/dc/dsi.c31
1 files changed, 27 insertions, 4 deletions
diff --git a/drivers/video/tegra/dc/dsi.c b/drivers/video/tegra/dc/dsi.c
index c499f1d69..234de06ce 100644
--- a/drivers/video/tegra/dc/dsi.c
+++ b/drivers/video/tegra/dc/dsi.c
@@ -4574,12 +4574,30 @@ static void tegra_dc_dsi_enable(struct tegra_dc *dc)
4574{ 4574{
4575 struct tegra_dc_dsi_data *dsi = tegra_dc_get_outdata(dc); 4575 struct tegra_dc_dsi_data *dsi = tegra_dc_get_outdata(dc);
4576 int err = 0; 4576 int err = 0;
4577#if defined(CONFIG_ARCH_TEGRA_18x_SOC)
4578 int val;
4579#endif
4580
4577#ifdef CONFIG_SYSEDP_FRAMEWORK 4581#ifdef CONFIG_SYSEDP_FRAMEWORK
4578 sysedp_set_state(dsi->sysedpc, 1); 4582 sysedp_set_state(dsi->sysedpc, 1);
4579#endif 4583#endif
4580 mutex_lock(&dsi->lock); 4584 mutex_lock(&dsi->lock);
4581 tegra_dc_io_start(dc); 4585 tegra_dc_io_start(dc);
4582 4586
4587#if defined(CONFIG_ARCH_TEGRA_18x_SOC)
4588 if (dsi->pad_ctrl)
4589 tegra_dsi_padctrl_enable(dsi->pad_ctrl);
4590
4591 /* Disable mipi bias pad power down */
4592 tegra_mipi_cal_clk_enable(dsi->mipi_cal);
4593 val = tegra_mipi_cal_read(dsi->mipi_cal,
4594 MIPI_CAL_MIPI_BIAS_PAD_CFG2_0);
4595 val &= ~PAD_PDVREG(1);
4596 tegra_mipi_cal_write(dsi->mipi_cal, val,
4597 MIPI_CAL_MIPI_BIAS_PAD_CFG2_0);
4598 tegra_mipi_cal_clk_disable(dsi->mipi_cal);
4599#endif
4600
4583 /* 4601 /*
4584 * Do not program this panel as the bootloader as has already 4602 * Do not program this panel as the bootloader as has already
4585 * initialized it. This avoids periods of blanking during boot. 4603 * initialized it. This avoids periods of blanking during boot.
@@ -4589,10 +4607,6 @@ static void tegra_dc_dsi_enable(struct tegra_dc *dc)
4589 goto fail; 4607 goto fail;
4590 } 4608 }
4591 4609
4592#if defined(CONFIG_ARCH_TEGRA_18x_SOC)
4593 if (dsi->pad_ctrl)
4594 tegra_dsi_padctrl_enable(dsi->pad_ctrl);
4595#endif
4596 /* Stop DC stream before configuring DSI registers 4610 /* Stop DC stream before configuring DSI registers
4597 * to avoid visible glitches on panel during transition 4611 * to avoid visible glitches on panel during transition
4598 * from bootloader to kernel driver 4612 * from bootloader to kernel driver
@@ -5565,6 +5579,15 @@ static int tegra_dsi_deep_sleep(struct tegra_dc *dc,
5565#if defined(CONFIG_ARCH_TEGRA_18x_SOC) 5579#if defined(CONFIG_ARCH_TEGRA_18x_SOC)
5566 if (dsi->pad_ctrl) 5580 if (dsi->pad_ctrl)
5567 tegra_dsi_padctrl_disable(dsi->pad_ctrl); 5581 tegra_dsi_padctrl_disable(dsi->pad_ctrl);
5582
5583 /* Enable mipi bias pad power down */
5584 tegra_mipi_cal_clk_enable(dsi->mipi_cal);
5585 val = tegra_mipi_cal_read(dsi->mipi_cal,
5586 MIPI_CAL_MIPI_BIAS_PAD_CFG2_0);
5587 val |= PAD_PDVREG(1);
5588 tegra_mipi_cal_write(dsi->mipi_cal, val,
5589 MIPI_CAL_MIPI_BIAS_PAD_CFG2_0);
5590 tegra_mipi_cal_clk_disable(dsi->mipi_cal);
5568#endif 5591#endif
5569 5592
5570 dsi->enabled = false; 5593 dsi->enabled = false;