diff options
author | Jon Mayo <jmayo@nvidia.com> | 2016-06-23 18:44:36 -0400 |
---|---|---|
committer | Jon Mayo <jmayo@nvidia.com> | 2016-06-27 18:05:25 -0400 |
commit | c4f69fae821bf8b806c4f1afcfa6788d845d0e28 (patch) | |
tree | fef7e8bd9f9fcabbc318d86433c5d568c0b9f2b5 /drivers/video/tegra/dc/dsi.c | |
parent | ace01f0947fb1de0d5d24c64547c54ec37421c77 (diff) |
video: tegra: dc: conditionally support dvfs
Only call DVFS and Tegra clock framework when it is supported.
Change-Id: I7d7968ab611678ccb05758f6707ddc8bfbc367c2
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/1170649
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/video/tegra/dc/dsi.c')
-rw-r--r-- | drivers/video/tegra/dc/dsi.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/video/tegra/dc/dsi.c b/drivers/video/tegra/dc/dsi.c index b727a87e3..f23756c57 100644 --- a/drivers/video/tegra/dc/dsi.c +++ b/drivers/video/tegra/dc/dsi.c | |||
@@ -1975,7 +1975,9 @@ static void tegra_dsi_start_dc_stream(struct tegra_dc *dc, | |||
1975 | u32 val; | 1975 | u32 val; |
1976 | 1976 | ||
1977 | tegra_dc_get(dc); | 1977 | tegra_dc_get(dc); |
1978 | #ifdef CONFIG_TEGRA_CORE_DVFS | ||
1978 | tegra_dvfs_set_rate(dc->clk, dc->mode.pclk); | 1979 | tegra_dvfs_set_rate(dc->clk, dc->mode.pclk); |
1980 | #endif | ||
1979 | 1981 | ||
1980 | tegra_dc_writel(dc, DSI_ENABLE, DC_DISP_DISP_WIN_OPTIONS); | 1982 | tegra_dc_writel(dc, DSI_ENABLE, DC_DISP_DISP_WIN_OPTIONS); |
1981 | 1983 | ||
@@ -5336,7 +5338,9 @@ static int _tegra_dsi_host_suspend(struct tegra_dc *dc, | |||
5336 | "is not supported.\n"); | 5338 | "is not supported.\n"); |
5337 | } | 5339 | } |
5338 | 5340 | ||
5341 | #ifdef CONFIG_TEGRA_CORE_DVFS | ||
5339 | tegra_dvfs_set_rate(dc->clk, 0); | 5342 | tegra_dvfs_set_rate(dc->clk, 0); |
5343 | #endif | ||
5340 | 5344 | ||
5341 | return 0; | 5345 | return 0; |
5342 | fail: | 5346 | fail: |
@@ -5397,7 +5401,9 @@ static int _tegra_dsi_host_resume(struct tegra_dc *dc, | |||
5397 | "is not supported.\n"); | 5401 | "is not supported.\n"); |
5398 | } | 5402 | } |
5399 | 5403 | ||
5404 | #ifdef CONFIG_TEGRA_CORE_DVFS | ||
5400 | tegra_dvfs_set_rate(dc->clk, dc->mode.pclk); | 5405 | tegra_dvfs_set_rate(dc->clk, dc->mode.pclk); |
5406 | #endif | ||
5401 | return 0; | 5407 | return 0; |
5402 | fail: | 5408 | fail: |
5403 | return err; | 5409 | return err; |
@@ -5872,7 +5878,9 @@ static long tegra_dc_dsi_setup_clk(struct tegra_dc *dc, struct clk *clk) | |||
5872 | clk_set_parent(clk, parent_clk); | 5878 | clk_set_parent(clk, parent_clk); |
5873 | 5879 | ||
5874 | skip_setup: | 5880 | skip_setup: |
5881 | #ifdef CONFIG_TEGRA_CORE_DVFS | ||
5875 | tegra_dvfs_set_rate(dc->clk, dc->mode.pclk); | 5882 | tegra_dvfs_set_rate(dc->clk, dc->mode.pclk); |
5883 | #endif | ||
5876 | return tegra_dc_pclk_round_rate(dc, dc->mode.pclk); | 5884 | return tegra_dc_pclk_round_rate(dc, dc->mode.pclk); |
5877 | } | 5885 | } |
5878 | 5886 | ||