diff options
author | Boris Suvorov <bsuvorov@nvidia.com> | 2012-02-24 16:22:28 -0500 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:02:09 -0400 |
commit | 58a92e20d167064a4d68b6b814786099a092d3c7 (patch) | |
tree | 91d3cca2ea8d9aade9df5f8106d0f612db3a16f8 /drivers/video/tegra/dc/dsi.c | |
parent | 42f51a40bd2eb5afe0d0c5cf570f9e5ee157a24b (diff) |
video: tegra: dsi: fix DSI_PAD_CONTROL reg wr value on resume
In panel resume path DSI_PAD_CONTROL value gets calibrated,
however later on values are overwritten with bit settings
for ulpm mode.
refactor value for reg write to only change ulpm related bits.
Change-Id: I9f9713bdf376c06b0e1b9f43b3e6c9f719bbd855
Signed-off-by: Boris Suvorov <bsuvorov@nvidia.com>
Reviewed-on: http://git-master/r/85873
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Rebase-Id: R192c61a086759bf4a5e76fec91907fbf3fa0756d
Diffstat (limited to 'drivers/video/tegra/dc/dsi.c')
-rw-r--r-- | drivers/video/tegra/dc/dsi.c | 21 |
1 files changed, 16 insertions, 5 deletions
diff --git a/drivers/video/tegra/dc/dsi.c b/drivers/video/tegra/dc/dsi.c index fb197c9bb..982b10daf 100644 --- a/drivers/video/tegra/dc/dsi.c +++ b/drivers/video/tegra/dc/dsi.c | |||
@@ -2419,10 +2419,18 @@ static void tegra_dc_dsi_enable(struct tegra_dc *dc) | |||
2419 | "DSI failed to enter ulpm\n"); | 2419 | "DSI failed to enter ulpm\n"); |
2420 | goto fail; | 2420 | goto fail; |
2421 | } | 2421 | } |
2422 | val = DSI_PAD_CONTROL_PAD_PDIO(0) | | 2422 | |
2423 | val = tegra_dsi_readl(dsi, DSI_PAD_CONTROL); | ||
2424 | |||
2425 | /* erase bits we're about to set */ | ||
2426 | val &= ~(DSI_PAD_CONTROL_PAD_PDIO(0x3) | | ||
2427 | DSI_PAD_CONTROL_PAD_PDIO_CLK(0x1) | | ||
2428 | DSI_PAD_CONTROL_PAD_PULLDN_ENAB(TEGRA_DSI_ENABLE)); | ||
2429 | |||
2430 | val |= (DSI_PAD_CONTROL_PAD_PDIO(0) | | ||
2423 | DSI_PAD_CONTROL_PAD_PDIO_CLK(0) | | 2431 | DSI_PAD_CONTROL_PAD_PDIO_CLK(0) | |
2424 | DSI_PAD_CONTROL_PAD_PULLDN_ENAB | 2432 | DSI_PAD_CONTROL_PAD_PULLDN_ENAB(TEGRA_DSI_DISABLE)); |
2425 | (TEGRA_DSI_DISABLE); | 2433 | |
2426 | tegra_dsi_writel(dsi, val, DSI_PAD_CONTROL); | 2434 | tegra_dsi_writel(dsi, val, DSI_PAD_CONTROL); |
2427 | if (tegra_dsi_exit_ulpm(dsi) < 0) { | 2435 | if (tegra_dsi_exit_ulpm(dsi) < 0) { |
2428 | dev_err(&dc->ndev->dev, | 2436 | dev_err(&dc->ndev->dev, |
@@ -2792,8 +2800,11 @@ static int tegra_dsi_deep_sleep(struct tegra_dc *dc, | |||
2792 | } | 2800 | } |
2793 | } | 2801 | } |
2794 | 2802 | ||
2795 | /* Suspend pad */ | 2803 | /* |
2796 | val = tegra_dsi_readl(dsi, DSI_PAD_CONTROL); | 2804 | * Suspend pad |
2805 | * It is ok to overwrite previous value of DSI_PAD_CONTROL reg | ||
2806 | * because it will be restored properly in resume sequence | ||
2807 | */ | ||
2797 | val = DSI_PAD_CONTROL_PAD_PDIO(0x3) | | 2808 | val = DSI_PAD_CONTROL_PAD_PDIO(0x3) | |
2798 | DSI_PAD_CONTROL_PAD_PDIO_CLK(0x1) | | 2809 | DSI_PAD_CONTROL_PAD_PDIO_CLK(0x1) | |
2799 | DSI_PAD_CONTROL_PAD_PULLDN_ENAB(TEGRA_DSI_ENABLE); | 2810 | DSI_PAD_CONTROL_PAD_PULLDN_ENAB(TEGRA_DSI_ENABLE); |