summaryrefslogtreecommitdiffstats
path: root/drivers/video/tegra/dc/dsi.c
diff options
context:
space:
mode:
authorPavan Kunapuli <pkunapuli@nvidia.com>2016-08-29 07:08:24 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2016-08-31 11:03:27 -0400
commit118f6eeb02e900015f1506c3861d585e3460ff10 (patch)
tree5eb700e7664c02c4b7938075fa26841bef388644 /drivers/video/tegra/dc/dsi.c
parentfeeb9b62f21b73cc092607840c3b1f24b58119f7 (diff)
video: tegra: dsi: Wait for 2-frames time before enabling sideband transfers
Due to HW bug, EoTP could sometimes not be masked when sending init sequence data in less than one line time from Lt4 start. This could mean the panel discarding init sequence data. To avoid this issue, WAR is to wait for 2 frames time before enabling sideband transfers. Similar wait is already present in the driver before disabling sideband transfers. Bug 200222278 Change-Id: I38ca3501a631780c74b9535f5e139eede799af7d Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/1209037 Reviewed-by: Animesh Kishore <ankishore@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Diffstat (limited to 'drivers/video/tegra/dc/dsi.c')
-rw-r--r--drivers/video/tegra/dc/dsi.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/video/tegra/dc/dsi.c b/drivers/video/tegra/dc/dsi.c
index 211a594fc..1dbe56305 100644
--- a/drivers/video/tegra/dc/dsi.c
+++ b/drivers/video/tegra/dc/dsi.c
@@ -3948,6 +3948,7 @@ int tegra_dsi_start_host_cmd_v_blank_dcs(struct tegra_dc_dsi_data *dsi,
3948#if DSI_USE_SYNC_POINTS 3948#if DSI_USE_SYNC_POINTS
3949 atomic_set(&dsi_syncpt_rst, 1); 3949 atomic_set(&dsi_syncpt_rst, 1);
3950#endif 3950#endif
3951 tegra_dsi_wait_frame_end(dc, dsi, 2);
3951 3952
3952 err = tegra_dsi_dcs_pkt_seq_ctrl_init(dsi, cmd); 3953 err = tegra_dsi_dcs_pkt_seq_ctrl_init(dsi, cmd);
3953 if (err < 0) { 3954 if (err < 0) {