diff options
| author | Seema Khowala <seemaj@nvidia.com> | 2018-08-17 14:12:17 -0400 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-08-21 17:54:47 -0400 |
| commit | 77ac7d3e328166feb8e8d67dccd3673c2c3cb29e (patch) | |
| tree | 19489d375a9db1a045e248656692ef15b3c8c119 /drivers/nvlink | |
| parent | d808df5b12bbd962d13db61d955dcb61b589b485 (diff) | |
nvlink: do not power ungate and gate nvl partition
Never powergate NVLINK with the intention to restart it later.
Power gating should be done for platforms that do not use NVLINK.
Bug 2258148
Bug 200433994
Change-Id: Ie4046bd3207a7a079404f503373b1d47b0186aac
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1802171
Reviewed-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-by: Petlozu Pravareshwar <petlozup@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/nvlink')
| -rw-r--r-- | drivers/nvlink/t19x-nvlink-endpt.c | 40 | ||||
| -rw-r--r-- | drivers/nvlink/t19x-nvlink-endpt.h | 3 |
2 files changed, 9 insertions, 34 deletions
diff --git a/drivers/nvlink/t19x-nvlink-endpt.c b/drivers/nvlink/t19x-nvlink-endpt.c index 97bf0ef4a..80b3038d1 100644 --- a/drivers/nvlink/t19x-nvlink-endpt.c +++ b/drivers/nvlink/t19x-nvlink-endpt.c | |||
| @@ -31,8 +31,6 @@ | |||
| 31 | #include <linux/platform/tegra/mc-regs-t19x.h> | 31 | #include <linux/platform/tegra/mc-regs-t19x.h> |
| 32 | #include <linux/clk.h> | 32 | #include <linux/clk.h> |
| 33 | #include <linux/reset.h> | 33 | #include <linux/reset.h> |
| 34 | #include <linux/tegra_pm_domains.h> | ||
| 35 | #include <linux/tegra-powergate.h> | ||
| 36 | #include <soc/tegra/fuse.h> | 34 | #include <soc/tegra/fuse.h> |
| 37 | 35 | ||
| 38 | #include "t19x-nvlink-endpt.h" | 36 | #include "t19x-nvlink-endpt.h" |
| @@ -53,13 +51,6 @@ static struct of_device_id t19x_nvlink_controller_of_match[] = { | |||
| 53 | }, | 51 | }, |
| 54 | }; | 52 | }; |
| 55 | 53 | ||
| 56 | #if IS_ENABLED(CONFIG_PM_GENERIC_DOMAINS) | ||
| 57 | static struct of_device_id tegra_nvl_pd[] = { | ||
| 58 | { .compatible = "nvidia,tegra194-nvl-pd", }, | ||
| 59 | {}, | ||
| 60 | }; | ||
| 61 | #endif | ||
| 62 | |||
| 63 | MODULE_DEVICE_TABLE(of, t19x_nvlink_controller_of_match); | 54 | MODULE_DEVICE_TABLE(of, t19x_nvlink_controller_of_match); |
| 64 | 55 | ||
| 65 | u32 nvlw_tioctrl_readl(struct tnvlink_dev *tdev, u32 reg) | 56 | u32 nvlw_tioctrl_readl(struct tnvlink_dev *tdev, u32 reg) |
| @@ -214,13 +205,8 @@ static int tegra_nvlink_car_enable(struct tnvlink_dev *tdev) | |||
| 214 | goto nvlink_sys_set_parent_fail; | 205 | goto nvlink_sys_set_parent_fail; |
| 215 | } | 206 | } |
| 216 | 207 | ||
| 217 | #if IS_ENABLED(CONFIG_PM_GENERIC_DOMAINS) | 208 | reset_control_reset(tdev->rst_nvlink); |
| 218 | ret = tegra_unpowergate_partition(tdev->pgid_nvl); | 209 | |
| 219 | if (ret < 0) { | ||
| 220 | nvlink_err("Couldn't unpowergate : %d", ret); | ||
| 221 | goto unpowergate_partition_fail; | ||
| 222 | } | ||
| 223 | #endif | ||
| 224 | /* Take link out of reset */ | 210 | /* Take link out of reset */ |
| 225 | reg_val = nvlw_tioctrl_readl(tdev, NVLW_RESET) | | 211 | reg_val = nvlw_tioctrl_readl(tdev, NVLW_RESET) | |
| 226 | BIT(NVLW_RESET_LINKRESET); | 212 | BIT(NVLW_RESET_LINKRESET); |
| @@ -276,10 +262,6 @@ static int tegra_nvlink_car_enable(struct tnvlink_dev *tdev) | |||
| 276 | return ret; | 262 | return ret; |
| 277 | 263 | ||
| 278 | pllnvhs_fail: | 264 | pllnvhs_fail: |
| 279 | #if IS_ENABLED(CONFIG_PM_GENERIC_DOMAINS) | ||
| 280 | tegra_powergate_partition(tdev->pgid_nvl); | ||
| 281 | #endif | ||
| 282 | unpowergate_partition_fail: | ||
| 283 | nvlink_sys_set_parent_fail: | 265 | nvlink_sys_set_parent_fail: |
| 284 | clk_disable_unprepare(tdev->clk_nvlink_sys); | 266 | clk_disable_unprepare(tdev->clk_nvlink_sys); |
| 285 | nvlink_sys_enable_fail: | 267 | nvlink_sys_enable_fail: |
| @@ -829,14 +811,6 @@ int t19x_nvlink_dev_car_disable(struct nvlink_device *ndev) | |||
| 829 | goto fail; | 811 | goto fail; |
| 830 | } | 812 | } |
| 831 | 813 | ||
| 832 | #if IS_ENABLED(CONFIG_PM_GENERIC_DOMAINS) | ||
| 833 | ret = tegra_powergate_partition(tdev->pgid_nvl); | ||
| 834 | if (ret < 0) { | ||
| 835 | nvlink_err("Powergate nvlink partition failed"); | ||
| 836 | goto fail; | ||
| 837 | } | ||
| 838 | #endif | ||
| 839 | |||
| 840 | clk_disable_unprepare(tdev->clk_nvlink_sys); | 814 | clk_disable_unprepare(tdev->clk_nvlink_sys); |
| 841 | 815 | ||
| 842 | ret = reset_control_assert(tdev->rst_nvhs_uphy_pm); | 816 | ret = reset_control_assert(tdev->rst_nvhs_uphy_pm); |
| @@ -973,10 +947,12 @@ static int tegra_nvlink_clk_rst_init(struct tnvlink_dev *tdev) | |||
| 973 | nvlink_err("missing rst_nvhs_uphy_l7 reset"); | 947 | nvlink_err("missing rst_nvhs_uphy_l7 reset"); |
| 974 | return PTR_ERR(tdev->rst_nvhs_uphy_l7); | 948 | return PTR_ERR(tdev->rst_nvhs_uphy_l7); |
| 975 | } | 949 | } |
| 976 | 950 | tdev->rst_nvlink = devm_reset_control_get(tdev->dev, | |
| 977 | #if IS_ENABLED(CONFIG_PM_GENERIC_DOMAINS) | 951 | "nvlink"); |
| 978 | tdev->pgid_nvl = tegra_pd_get_powergate_id(tegra_nvl_pd); | 952 | if (IS_ERR(tdev->rst_nvlink)) { |
| 979 | #endif | 953 | nvlink_err("missing rst_nvlink reset"); |
| 954 | return PTR_ERR(tdev->rst_nvlink); | ||
| 955 | } | ||
| 980 | 956 | ||
| 981 | return 0; | 957 | return 0; |
| 982 | } | 958 | } |
diff --git a/drivers/nvlink/t19x-nvlink-endpt.h b/drivers/nvlink/t19x-nvlink-endpt.h index 583b33cd7..fdcd9ef94 100644 --- a/drivers/nvlink/t19x-nvlink-endpt.h +++ b/drivers/nvlink/t19x-nvlink-endpt.h | |||
| @@ -216,8 +216,7 @@ struct tnvlink_dev { | |||
| 216 | struct reset_control *rst_nvhs_uphy_l5; | 216 | struct reset_control *rst_nvhs_uphy_l5; |
| 217 | struct reset_control *rst_nvhs_uphy_l6; | 217 | struct reset_control *rst_nvhs_uphy_l6; |
| 218 | struct reset_control *rst_nvhs_uphy_l7; | 218 | struct reset_control *rst_nvhs_uphy_l7; |
| 219 | /* Powergate id */ | 219 | struct reset_control *rst_nvlink; |
| 220 | int pgid_nvl; | ||
| 221 | struct tegra_prod *prod_list; | 220 | struct tegra_prod *prod_list; |
| 222 | bool is_nea; | 221 | bool is_nea; |
| 223 | /* Nvlink refclk*/ | 222 | /* Nvlink refclk*/ |
