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authorVenkat Reddy Talla <vreddytalla@nvidia.com>2016-09-09 05:00:18 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2016-09-10 12:44:07 -0400
commit158d8e7d970b27db1bbba08a37c7b0ef009574d0 (patch)
treed91c784768463bd244e908d0869fe5e64c4947c0 /arch
parent70bff55d7c731123f09d79ca76c93f800651c491 (diff)
ARM64: dts: remove quill-internal dts build support
Quill internal platform dts files and include files moved to new repo $TOP/hardware/nvidia/platform/t18x/quill-internal, removing quill-internal dts build support from old repo Makefile and compiling from new repo. Bug 200217137 Change-Id: I205faa8717953843e12e65c9fa2209f6bdcb9d72 Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com> Reviewed-on: http://git-master/r/1217841 GVS: Gerrit_Virtual_Submit Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/nvidia/t18x/Makefile8
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/nvidia/t18x/Makefile b/arch/arm64/boot/dts/nvidia/t18x/Makefile
index 52bf554b9..e9e10a45d 100644
--- a/arch/arm64/boot/dts/nvidia/t18x/Makefile
+++ b/arch/arm64/boot/dts/nvidia/t18x/Makefile
@@ -3,11 +3,3 @@ dtb-$(CONFIG_ARCH_TEGRA_18x_SOC) += tegra186-fpga-cl34563539-vm.dtb
3dtb-$(CONFIG_ARCH_TEGRA_18x_SOC) += tegra186-fpga-cl34563539-vm1.dtb 3dtb-$(CONFIG_ARCH_TEGRA_18x_SOC) += tegra186-fpga-cl34563539-vm1.dtb
4dtb-$(CONFIG_ARCH_TEGRA_18x_SOC) += tegra186-fpga-cl34563539-vm2.dtb 4dtb-$(CONFIG_ARCH_TEGRA_18x_SOC) += tegra186-fpga-cl34563539-vm2.dtb
5dtb-$(CONFIG_ARCH_TEGRA_18x_SOC) += tegra186-sim-cl34563539.dtb 5dtb-$(CONFIG_ARCH_TEGRA_18x_SOC) += tegra186-sim-cl34563539.dtb
6dtb-$(CONFIG_ARCH_TEGRA_18x_SOC) += tegra186-quill-atv-p3310-1000-a00-00-base.dtb
7dtb-$(CONFIG_ARCH_TEGRA_18x_SOC) += tegra186-quill-sata-p3310-1000-a00-00-base.dtb
8dtb-$(CONFIG_ARCH_TEGRA_18x_SOC) += tegra186-quill-sata-atv-p3310-1000-a00-00-base.dtb
9dtb-$(CONFIG_ARCH_TEGRA_18x_SOC) += tegra186-quill-char-e3301-1080-a00-00-base.dtb
10dtb-$(CONFIG_ARCH_TEGRA_18x_SOC) += tegra186-quill-mfg-p3310-1000-a00-00-base.dtb
11dtb-$(CONFIG_ARCH_TEGRA_18x_SOC) += tegra186-quill-pb-e3301-1000-a00-00-base.dtb
12dtb-$(CONFIG_ARCH_TEGRA_18x_SOC) += tegra186-quill-pb-e3301-1000-a02-00-base.dtb
13dtb-$(CONFIG_ARCH_TEGRA_18x_SOC) += tegra186-quill-slt-e3301-1099-a00-00-base.dtb