eqos: use phy reset low power mode from DT

Issue:
Some ethernet PHY consume low power only when
they are put in reset mode otherwise power
consumption is high.

Fix:
Add DT flag which can be set for the PHYs which
consume low power when they are in reset. Driver
puts those phy chip to reset mode for low power
consumption state if the corresponding dt flag is
set, else use supported low power mode operation
for the selected phy. Default operation is to use
phy reset mode for low power consumption.

Bug 200627703

Change-Id: If86c37b43c8f737c332c46188ab2e91ae9c72343
Signed-off-by: Sushil Singh <sushilkumars@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2447746
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Nagaraj Annaiah <nannaiah@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Aaron Tian <atian@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

4 files changed, 24 insertions, 6 deletions

diff --git a/Documentation/devicetree/bindings/platform/tegra/tegra-eqos.txt b/Documentation/devicetree/bindings/platform/tegra/tegra-eqos.txt
index c3d710ad3..cf30d6adf 100644
--- a/Documentation/devicetree/bindings/platform/tegra/tegra-eqos.txt
+++ b/Documentation/devicetree/bindings/platform/tegra/tegra-eqos.txt
@@ -133,6 +133,8 @@ Optional properties:
 - nvidia,rx_riwt:               Specifies the RX wathcdog interrupt timeout in usec
                                 for an Rx descriptor for which IOC bit is not set.
                                 The RIWT field is programmed as (<val> * 256) / 62.5
+- phy_rst_lp_mode               Specifies that the phy should be put in reset for low
+                                power mode when it is set.
 
 Example:
 
diff --git a/drivers/net/ethernet/nvidia/eqos/drv.c b/drivers/net/ethernet/nvidia/eqos/drv.c
index ff46b675e..b9f19fdeb 100644
--- a/drivers/net/ethernet/nvidia/eqos/drv.c
+++ b/drivers/net/ethernet/nvidia/eqos/drv.c
@@ -29,7 +29,7 @@
  * DAMAGE.
  * ========================================================================= */
 /*
- * Copyright (c) 2015-2020, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2015-2021, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -1219,7 +1219,7 @@ static int eqos_close(struct net_device *dev)
                 phy_stop(pdata->phydev);
                 phy_disconnect(pdata->phydev);
                 if (gpio_is_valid(pdata->phy_reset_gpio) &&
-                                 (pdata->mac_ver > EQOS_MAC_CORE_4_10))
+                                 (pdata->dt_cfg.phyrst_lpmode == 1U))
                         gpio_set_value(pdata->phy_reset_gpio, 0);
                 pdata->phydev = NULL;
         }
diff --git a/drivers/net/ethernet/nvidia/eqos/init.c b/drivers/net/ethernet/nvidia/eqos/init.c
index b77e651d3..c01456856 100644
--- a/drivers/net/ethernet/nvidia/eqos/init.c
+++ b/drivers/net/ethernet/nvidia/eqos/init.c
@@ -1036,6 +1036,7 @@ int eqos_probe(struct platform_device *pdev)
         u8 mac_addr[6];
         struct eqos_cfg *pdt_cfg;
         bool    use_multi_q;
+        uint    phyrst_lp_mode;
         uint    num_chans, chan;
 
         pr_debug("-->%s()\n", __func__);
@@ -1370,6 +1371,20 @@ int eqos_probe(struct platform_device *pdev)
                 pdata->phy_node = of_node_get(node);
         }
 
+        /* Read the supported phy low power mode for the attached phy.
+         * Default is to put phy in reset mode, if not set then use the
+         * low power mode supported by the particular phy chip.
+         */
+        ret = of_property_read_u32(pdata->phy_node, "phy_rst_lp_mode",
+                                   &phyrst_lp_mode);
+        if (ret < 0) {
+                pr_info("Using default phy reset low power mode\n");
+                pdata->dt_cfg.phyrst_lpmode = 1U;
+        } else {
+                pr_info("Using phyrst_lpmode = %d from DT\n", phyrst_lp_mode);
+                pdata->dt_cfg.phyrst_lpmode = phyrst_lp_mode ? 1U : 0U;
+        }
+
         if (pdata->mdio_node) {
                 ret = eqos_mdio_register(ndev);
                 if (ret < 0) {
@@ -1492,7 +1507,7 @@ int eqos_probe(struct platform_device *pdev)
 
         /* put Ethernet PHY in reset for power save */
         if (gpio_is_valid(pdata->phy_reset_gpio) &&
-            (pdata->mac_ver > EQOS_MAC_CORE_4_10))
+            (pdata->dt_cfg.phyrst_lpmode == 1U))
                 gpio_set_value(pdata->phy_reset_gpio, 0);
 
         return 0;
@@ -1655,8 +1670,8 @@ static int eqos_suspend_noirq(struct device *dev)
                         enable_irq_wake(pdata->phydev->irq);
                 } else {
                         phy_stop(pdata->phydev);
-                        if ((gpio_is_valid(pdata->phy_reset_gpio) &&
-                            (pdata->mac_ver > EQOS_MAC_CORE_4_10))) {
+                        if (gpio_is_valid(pdata->phy_reset_gpio) &&
+                            (pdata->dt_cfg.phyrst_lpmode == 1U)) {
                                 gpio_set_value(pdata->phy_reset_gpio, 0);
                                 usleep_range(pdata->phy_reset_duration,
                                              pdata->phy_reset_duration + 1);
diff --git a/drivers/net/ethernet/nvidia/eqos/yheader.h b/drivers/net/ethernet/nvidia/eqos/yheader.h
index e12e30eef..f6e1794b2 100644
--- a/drivers/net/ethernet/nvidia/eqos/yheader.h
+++ b/drivers/net/ethernet/nvidia/eqos/yheader.h
@@ -29,7 +29,7 @@
  * DAMAGE.
  * ========================================================================= */
 /*
- * Copyright (c) 2015-2020, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2015-2021, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -1360,6 +1360,7 @@ struct eqos_cfg {
         uint            eth_iso_enable;
         bool            phy_apd_mode;   /* Represents PHY AUTO POWER DOWN mode */
         uint            reg_auto_cal_config_0_val; /* EQOS_AUTO_CAL_CONFIG_0 REG */
+        u8              phyrst_lpmode; /* Phy in rst for low power mode */
         u32             slot_intvl_val; /* Slot Interval Value*/
 };