video: tegra: nvdisp: clear and init bw

1) The display driver should explicitly clear its ISO bw
   when all heads are disabled.
2) When display comes back, it will use the bw settings for
   the max config. These settings will eventually be adjusted
   through IMP, if supported by the client.

Bug 1705477
Bug 1753714

Change-Id: Ibdff1440f2b1f8e4ff464a0ef3966a70fc3f2178
Signed-off-by: Shu Zhong <shuz@nvidia.com>
Reviewed-on: http://git-master/r/1213146
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 files changed, 47 insertions, 34 deletions

diff --git a/drivers/video/tegra/dc/nvdisp/nvdisp.c b/drivers/video/tegra/dc/nvdisp/nvdisp.c
index c71ffc426..6991817c8 100644
--- a/drivers/video/tegra/dc/nvdisp/nvdisp.c
+++ b/drivers/video/tegra/dc/nvdisp/nvdisp.c
@@ -1373,8 +1373,9 @@ int tegra_nvdisp_head_disable(struct tegra_dc *dc)
                         break;
         }
 
-        /* disable hub clock if none of the heads is using it */
+        /* disable hub clock if none of the heads is using it and clear bw */
         if (idx == TEGRA_MAX_DC) {
+                tegra_nvdisp_clear_bandwidth(dc);
                 tegra_disp_clk_disable_unprepare(hubclk);
                 hubclk_already_on = false;
         }
@@ -1410,22 +1411,14 @@ int tegra_nvdisp_head_enable(struct tegra_dc *dc)
         }
         clk_set_parent(hubclk, hubparent_clk);
 
-        /*
-         * WAR for bug 200212319
-         *
-         * IMP will ultimately be responsible for setting the required hubclk
-         * rate in the kernel, but it's not ready yet. As such, explicitly drive
-         * the hubclk rate to 408MHz so that we're not stuck with the rate set
-         * by BL.
-         */
-        clk_set_rate(hubclk, 408000000);
-
         /* set clock status to inuse */
         mutex_lock(&tegra_nvdisp_lock);
         clk_client[dc->ctrl_num].inuse = true;
         clk_client[dc->ctrl_num].dc = dc;
 
+        /* turn on hub clock and init bw */
         if (!hubclk_already_on) {
+                tegra_nvdisp_init_bandwidth(dc);
                 tegra_disp_clk_prepare_enable(hubclk);
                 hubclk_already_on = true;
         }
diff --git a/drivers/video/tegra/dc/nvdisp/nvdisp.h b/drivers/video/tegra/dc/nvdisp/nvdisp.h
index 7641161f4..5bf446d31 100644
--- a/drivers/video/tegra/dc/nvdisp/nvdisp.h
+++ b/drivers/video/tegra/dc/nvdisp/nvdisp.h
@@ -57,4 +57,6 @@ void tegra_nvdisp_program_bandwidth(struct tegra_dc *dc, u32 proposed_bw,
         u32 proposed_latency, u32 proposed_hubclk, bool before_win_udpate);
 int tegra_nvdisp_negotiate_reserved_bw(struct tegra_dc *dc, u32 proposed_bw,
         u32 proposed_latency);
+void tegra_nvdisp_init_bandwidth(struct tegra_dc *dc);
+void tegra_nvdisp_clear_bandwidth(struct tegra_dc *dc);
 #endif
diff --git a/drivers/video/tegra/dc/nvdisp/nvdisp_bandwidth.c b/drivers/video/tegra/dc/nvdisp/nvdisp_bandwidth.c
index e0294cbbe..bdf77d59f 100644
--- a/drivers/video/tegra/dc/nvdisp/nvdisp_bandwidth.c
+++ b/drivers/video/tegra/dc/nvdisp/nvdisp_bandwidth.c
@@ -42,8 +42,8 @@
  *      - Pitch
  *      - LUT disabled
  *
- * NVDISP_BW_MAX_BW_KBPS and NVDISP_BW_TOTAL_MC_LATENCY were calculated with
- * these settings:
+ * NVDISP_BW_MAX_BW_KBPS, NVDISP_BW_TOTAL_MC_LATENCY, and
+ * NVDISP_BW_REQ_HUBCLK_HZ were calculated with these settings:
  * - 3 active heads:
  *      - 4096x2160@60p
  * - 2 active windows on each head:
@@ -73,6 +73,9 @@
 /* Total MC request latency that display can tolerate (usec) */
 #define NVDISP_BW_TOTAL_MC_LATENCY      1
 
+/* Required hubclk rate for max config (Hz) */
+#define NVDISP_BW_REQ_HUBCLK_HZ         362000000
+
 /* Output id that we pass to tegra_dc_ext_process_bandwidth_negotiate */
 #define NVDISP_BW_OUTPUT_ID             0
 
@@ -189,6 +192,40 @@ void tegra_nvdisp_program_bandwidth(struct tegra_dc *dc,
         }
 }
 
+void tegra_nvdisp_init_bandwidth(struct tegra_dc *dc)
+{
+        /*
+         * Use the max config settings. These values will eventually be adjusted
+         * through IMP, if the client supports it.
+         */
+
+        u32 proposed_bw = NVDISP_BW_MAX_BW_KBPS;
+        u32 proposed_latency = NVDISP_BW_TOTAL_MC_LATENCY;
+        u32 proposed_hubclk = NVDISP_BW_REQ_HUBCLK_HZ;
+        bool before_win_update = true;
+
+        tegra_nvdisp_negotiate_reserved_bw(dc, proposed_bw, proposed_latency);
+        tegra_nvdisp_program_bandwidth(dc,
+                                proposed_bw,
+                                proposed_latency,
+                                proposed_hubclk,
+                                before_win_update);
+}
+
+void tegra_nvdisp_clear_bandwidth(struct tegra_dc *dc)
+{
+        u32 proposed_bw = 0;
+        u32 proposed_latency = 1000;
+        u32 proposed_hubclk = 0;
+        bool before_win_update = false;
+
+        tegra_nvdisp_program_bandwidth(dc,
+                                proposed_bw,
+                                proposed_latency,
+                                proposed_hubclk,
+                                before_win_update);
+}
+
 /*
  * tegra_dc_calc_min_bandwidth - returns the minimum dedicated bw
  *
@@ -284,7 +321,6 @@ void tegra_nvdisp_isomgr_attach(struct tegra_dc *dc)
  */
 int tegra_nvdisp_isomgr_register(enum tegra_iso_client client, u32 udedi_bw)
 {
-        u32 latency = 0;
         int err = 0;
 
         mutex_lock(&tegra_nvdisp_lock);
@@ -303,26 +339,6 @@ int tegra_nvdisp_isomgr_register(enum tegra_iso_client client, u32 udedi_bw)
          */
         ihub_bw_info.available_bw = UINT_MAX;
 
-        /*
-         * Reserve and realize the max bw at start-up. There's no need to update
-         * the corresponding fields since these values will be adjusted through
-         * IMP anyways.
-         */
-        latency = tegra_isomgr_reserve(ihub_bw_info.isomgr_handle,
-                                NVDISP_BW_MAX_BW_KBPS,
-                                NVDISP_BW_TOTAL_MC_LATENCY);
-        if (latency) {
-                latency = tegra_isomgr_realize(ihub_bw_info.isomgr_handle);
-                if (!latency) {
-                        WARN_ONCE(!latency, "tegra_isomgr_realize failed\n");
-                        err = -ENOENT;
-                }
-        } else {
-                WARN_ONCE(1, "tegra_isomgr_reserve failed\n");
-                err = -ENOENT;
-        }
-        tegra_dc_set_latency_allowance(NVDISP_BW_MAX_BW_KBPS);
-
 unlock_and_ret:
         mutex_unlock(&tegra_nvdisp_lock);
         return err;
@@ -349,6 +365,8 @@ int tegra_nvdisp_negotiate_reserved_bw(struct tegra_dc *dc, u32 proposed_bw,
 {
         return -ENOSYS;
 }
+void tegra_nvdisp_init_bandwidth(struct tegra_dc *dc) {}
+void tegra_nvdisp_clear_bandwidth(struct tegra_dc *dc) {}
 long tegra_dc_calc_min_bandwidth(struct tegra_dc *dc)
 {
         return -ENOSYS;